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f3f1969f4a
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assembler/vs: add support for dual math operations
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2025-10-23 21:48:11 -05:00 |
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d08f99d36b
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clear_nop.vs.asm: correct number of VE_ADD arguments
This is now being checked.
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2025-10-23 19:57:39 -05:00 |
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b671d30d3a
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us_disassemble: print non-register columns
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2025-10-23 19:53:38 -05:00 |
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8594bc4a38
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assembler/vs: rewrite parser and validator
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2025-10-23 19:51:19 -05:00 |
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f6a0fc4fab
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assembler/fs/emitter: emit addrd
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2025-10-21 19:35:04 -05:00 |
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ae3fa0f2e6
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assembler/lexer: add support for double hypen comments
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2025-10-21 15:39:08 -05:00 |
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fe0684ca5e
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assembler/fs: add support for NOP
In shadertoy_circle.fs.asm, this is required for presubtract dependencies.
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2025-10-21 12:32:24 -05:00 |
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3213edda43
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drm: add shadertoy_sin.fs.asm
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2025-10-21 11:42:41 -05:00 |
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f6105c66b3
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shadertoy_circle.fs.asm : use presubtract to reduce instruction count
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2025-10-21 10:25:41 -05:00 |
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306de6541d
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assembler: add minus token; disable eol tokens
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2025-10-20 22:48:43 -05:00 |
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6f5007525c
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shadertoy: assemble shadertoy.fs.asm from source
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2025-10-20 21:09:52 -05:00 |
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50c53376df
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assembler/fs: allow more concise assembly
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2025-10-20 20:56:01 -05:00 |
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4777be84d4
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assembler/vs/validator: only count temp addresses for macro operations
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2025-10-20 20:44:57 -05:00 |
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44dd480549
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assembler/fs: add support for OUT and TEX_SEM_WAIT
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2025-10-20 18:48:55 -05:00 |
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3df0aed6ba
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assembler/fs/emitter: set default float addr if unspecified
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2025-10-20 18:33:13 -05:00 |
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efecb277c8
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assembler: implement fs emitter and frontend
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2025-10-20 18:21:41 -05:00 |
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72666a8c1f
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assembler: add fs instruction validator
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2025-10-20 16:49:02 -05:00 |
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adca6a1c66
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assembler: add initial fragment shader parser
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2025-10-20 12:54:41 -05:00 |
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59b6b2a0d2
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us_disassemble2: invent a better fragment shader syntax
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2025-10-19 23:02:15 -05:00 |
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13777619d9
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us_disassemble: reduce column widths
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2025-10-19 17:21:22 -05:00 |
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9a989fe545
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us_disassemble: print columns
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2025-10-19 16:30:39 -05:00 |
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6d0bc8538b
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assembler: add support for VE_SAT/ME_SAT
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2025-10-19 15:31:10 -05:00 |
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c0cdfccefa
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pvs_disassemble: add partial support for me_sat/ve_sat
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2025-10-19 15:20:13 -05:00 |
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d2e81516a1
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drm/texture_cube_clear_zwrite_vertex_shader: fixed
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2025-10-18 22:21:32 -05:00 |
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3a0521b76b
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regs/us_disassemble: read input from file
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2025-10-16 21:52:36 -05:00 |
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1f99e67169
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regs/bits: improve vap_reg_prog_stream_cntl* parsing
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2025-10-16 21:12:18 -05:00 |
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be27c747ee
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regs: improve frontend for assembler and disassembler
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2025-10-16 17:23:37 -05:00 |
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d903115964
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assembler: feature parity with the disassembler
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2025-10-16 12:53:28 -05:00 |
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e24b3ada5e
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regs: incomplete pvs assembler
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2025-10-16 00:33:00 -05:00 |
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2604270823
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pvs_disassemble: add more concise disassembly
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2025-10-15 19:17:41 -05:00 |
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564e05f29c
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drm/3d_registers_bits.h: render POSSIBLE VALUES
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2025-10-14 23:40:41 -05:00 |
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9d974cd113
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us_disassemble: us bits were moved to bits/
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2025-10-14 20:02:32 -05:00 |
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d14f1c21dd
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drm: add vertex_color_aos
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2025-10-14 20:00:54 -05:00 |
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9bedf5e1a9
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drm: add vertex_color
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2025-10-13 21:27:28 -05:00 |
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a6e5d755ce
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drm/main: decode bits
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2025-10-13 21:27:28 -05:00 |
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4b49077792
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regs: add 3d_registers_bits.h
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2025-10-13 21:27:28 -05:00 |
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c8b9a0f992
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regs/bits: fix all parse errors
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2025-10-13 21:27:28 -05:00 |
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7dcbf79605
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regs: move bits to regs/bits
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2025-10-13 21:27:28 -05:00 |
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54451811e0
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regs: add bit definitions for all documented 3D registers
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2025-10-13 21:27:24 -05:00 |
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fb0d57c7fb
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regs: us_alu_rgba_inst
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2025-10-12 01:31:53 -05:00 |
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35cd0e07ca
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regs: add us_disassemble
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2025-10-12 01:01:51 -05:00 |
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9b4cc94138
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drm: add more undocumented registers
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2025-10-11 21:48:52 -05:00 |
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62d3aa2b29
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add drm triangle example
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2025-10-11 19:44:32 -05:00 |
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25c004dbe7
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regs: add parse_packets
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2025-10-11 17:59:40 -05:00 |
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06f4c14181
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regs: add pvs_disassemble
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2025-10-11 17:55:04 -05:00 |
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66dca90a98
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3d_registers: generate address-to-string lookup table
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2025-10-11 17:54:52 -05:00 |
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8c883d76f9
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pci: PIO command processor response
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2025-10-07 11:02:38 -05:00 |
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99555adbc2
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regs: add 3d registers
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2025-10-01 16:39:41 -05:00 |
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c2d61ee383
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add regs
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2025-10-01 11:05:07 -05:00 |
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