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use new smpc ireg/oreg struct declaration

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Previously operator[] overloads were used for ireg/oreg indexes.
This commit is contained in:
Zack Buhman 2023-06-23 10:07:19 +00:00
parent d4b5ecd3c8
commit 5ee43d8a29
11 changed files with 51 additions and 36 deletions
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19
Makefile
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@ -3,7 +3,24 @@ OPT ?= -Og
LIBGCC = $(shell $(CC) -print-file-name=libgcc.a) LIBGCC = $(shell $(CC) -print-file-name=libgcc.a)
LIB = ./saturn LIB = ./saturn
all: ALL =
ALL += raytracing/raytracing.cue
ALL += vdp2/nbg0.cue
ALL += vdp1/polygon.cue
ALL += vdp1/normal_sprite.cue
ALL += vdp1/normal_sprite_color_bank.cue
ALL += vdp1/kana.cue
ALL += vdp1/normal_sprite_animated.cue
ALL += vdp1/rgb.cue
ALL += smpc/input_intback.cue
ALL += smpc/input_keyboard.cue
ALL += wordle/wordle.cue
ALL += scsp/slot.cue
ALL += scsp/sound_cpu__slot.cue
ALL += scsp/sound_cpu__interrupt.cue
ALL += editor/main_saturn.cue
all: $(ALL)
include $(LIB)/common.mk include $(LIB)/common.mk

6
common/intback.hpp
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@ -47,7 +47,7 @@ namespace intback {
- multitaps are not parsed correctly - multitaps are not parsed correctly
*/ */
while (state.oreg_ix < 32) { while (state.oreg_ix < 32) {
reg8 const& oreg = smpc.reg.oreg[state.oreg_ix++]; reg8 const& oreg = smpc.reg.OREG[state.oreg_ix++].val;
switch (state.fsm) { switch (state.fsm) {
case PORT_STATUS: case PORT_STATUS:
state.port_connected = (PORT_STATUS__CONNECTORS(oreg) == 1); state.port_connected = (PORT_STATUS__CONNECTORS(oreg) == 1);
@ -97,10 +97,10 @@ namespace intback {
} }
if ((smpc.reg.SR & SR__NPE) != 0) { if ((smpc.reg.SR & SR__NPE) != 0) {
smpc.reg.ireg[0] = INTBACK__IREG0__CONTINUE; smpc.reg.IREG[0].val = INTBACK__IREG0__CONTINUE;
} else { } else {
abort: abort:
smpc.reg.ireg[0] = INTBACK__IREG0__BREAK; smpc.reg.IREG[0].val = INTBACK__IREG0__BREAK;
} }
} }
} }

6
editor/main_saturn.cpp
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@ -277,12 +277,12 @@ void v_blank_in_int()
smpc.reg.SF = 0; smpc.reg.SF = 0;
smpc.reg.ireg[0] = INTBACK__IREG0__STATUS_DISABLE; smpc.reg.IREG[0].val = INTBACK__IREG0__STATUS_DISABLE;
smpc.reg.ireg[1] = ( INTBACK__IREG1__PERIPHERAL_DATA_ENABLE smpc.reg.IREG[1].val = ( INTBACK__IREG1__PERIPHERAL_DATA_ENABLE
| INTBACK__IREG1__PORT2_15BYTE | INTBACK__IREG1__PORT2_15BYTE
| INTBACK__IREG1__PORT1_15BYTE | INTBACK__IREG1__PORT1_15BYTE
); );
smpc.reg.ireg[2] = INTBACK__IREG2__MAGIC; smpc.reg.IREG[2].val = INTBACK__IREG2__MAGIC;
smpc.reg.COMREG = COMREG__INTBACK; smpc.reg.COMREG = COMREG__INTBACK;
} }

7
m68k/interrupt.cpp
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@ -32,8 +32,8 @@ void auto_vector_1(void)
scsp.reg.ctrl.STATUS = STATUS__MSLC(slot_ix & 31); scsp.reg.ctrl.STATUS = STATUS__MSLC(slot_ix & 31);
scsp_slot& slot = scsp.reg.slot[slot_ix & 31]; scsp_slot& slot = scsp.reg.slot[slot_ix & 31];
slot.LOOP = LOOP__KYONB | LOOP__SA(frame_addr); // kx kb sbctl[1:0] ssctl[1:0] lpctl[1:0] 8b sa[19:16] // start address (bytes)
slot.SA = SA__SA(frame_addr); // start address (bytes) slot.SA = SA__KYONB | SA__SA(frame_addr); // kx kb sbctl[1:0] ssctl[1:0] lpctl[1:0] 8b sa[19:0]
slot.LSA = 0; // loop start address (samples) slot.LSA = 0; // loop start address (samples)
slot.LEA = frame_size; // loop end address (samples) slot.LEA = frame_size; // loop end address (samples)
slot.EG = EG__AR(0x1f) | EG__EGHOLD; // d2r d1r ho ar krs dl rr slot.EG = EG__AR(0x1f) | EG__EGHOLD; // d2r d1r ho ar krs dl rr
@ -59,8 +59,7 @@ void main()
for (int i = 0; i < 32; i++) { for (int i = 0; i < 32; i++) {
scsp_slot& slot = scsp.reg.slot[i]; scsp_slot& slot = scsp.reg.slot[i];
slot.LOOP = 0; slot.SA = 0; // 32-bit access
slot.SA = 0;
slot.LSA = 0; slot.LSA = 0;
slot.LEA = 0; slot.LEA = 0;
slot.EG = 0; slot.EG = 0;

4
m68k/slot.cpp
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@ -16,8 +16,8 @@ void main()
slot.LOOP = 0; slot.LOOP = 0;
slot.LOOP |= LOOP__KYONEX; slot.LOOP |= LOOP__KYONEX;
slot.LOOP = LOOP__KYONB | LOOP__LPCTL__NORMAL | LOOP__SA(sine_start); // kx kb sbctl[1:0] ssctl[1:0] lpctl[1:0] 8b sa[19:16] // start address (bytes)
slot.SA = SA__SA(sine_start); // start address (bytes) slot.SA = SA__KYONB | SA__LPCTL__NORMAL | SA__SA(sine_start); // kx kb sbctl[1:0] ssctl[1:0] lpctl[1:0] 8b sa[19:0]
slot.LSA = 0; // loop start address (samples) slot.LSA = 0; // loop start address (samples)
slot.LEA = 44100; // loop end address (samples) slot.LEA = 44100; // loop end address (samples)
slot.EG = EG__AR(0x1f) | EG__EGHOLD; // d2r d1r ho ar krs dl rr slot.EG = EG__AR(0x1f) | EG__EGHOLD; // d2r d1r ho ar krs dl rr

6
scsp/slot.cpp
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@ -11,7 +11,7 @@ void main()
while ((smpc.reg.SF & 1) != 0); while ((smpc.reg.SF & 1) != 0);
smpc.reg.SF = 1; smpc.reg.SF = 1;
smpc.reg.COMREG = COMREG__SNDON; smpc.reg.COMREG = COMREG__SNDON;
while (smpc.reg.oreg[31] != 0b00000110); while (smpc.reg.OREG[31].val != 0b00000110);
for (long i = 0; i < 807; i++) { asm volatile ("nop"); } // wait for (way) more than 30µs for (long i = 0; i < 807; i++) { asm volatile ("nop"); } // wait for (way) more than 30µs
@ -21,8 +21,8 @@ void main()
copy<uint32_t>(&scsp.ram.u32[0], buf, 44100 * 2); copy<uint32_t>(&scsp.ram.u32[0], buf, 44100 * 2);
scsp_slot& slot = scsp.reg.slot[0]; scsp_slot& slot = scsp.reg.slot[0];
slot.LOOP = LOOP__KYONB | LOOP__LPCTL__NORMAL; // kx kb sbctl[1:0] ssctl[1:0] lpctl[1:0] 8b sa[19:16] // start address (bytes)
slot.SA = 0; // start address (bytes) slot.SA = SA__KYONB | SA__LPCTL__NORMAL | SA__SA(0); // kx kb sbctl[1:0] ssctl[1:0] lpctl[1:0] 8b sa[19:0]
slot.LSA = 0; // loop start address (samples) slot.LSA = 0; // loop start address (samples)
slot.LEA = 44100; // loop end address (samples) slot.LEA = 44100; // loop end address (samples)
slot.EG = EG__EGHOLD; // d2r d1r ho ar krs dl rr slot.EG = EG__EGHOLD; // d2r d1r ho ar krs dl rr

4
scsp/sound_cpu__interrupt.cpp
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@ -86,7 +86,7 @@ void init_sound()
while ((smpc.reg.SF & 1) != 0); while ((smpc.reg.SF & 1) != 0);
smpc.reg.SF = 1; smpc.reg.SF = 1;
smpc.reg.COMREG = COMREG__SNDOFF; smpc.reg.COMREG = COMREG__SNDOFF;
while (smpc.reg.oreg[31] != OREG31__SNDOFF); while (smpc.reg.OREG[31].val != OREG31__SNDOFF);
scsp.reg.ctrl.MIXER = MIXER__MEM4MB; scsp.reg.ctrl.MIXER = MIXER__MEM4MB;
@ -106,7 +106,7 @@ void init_sound()
while ((smpc.reg.SF & 1) != 0); while ((smpc.reg.SF & 1) != 0);
smpc.reg.SF = 1; smpc.reg.SF = 1;
smpc.reg.COMREG = COMREG__SNDON; smpc.reg.COMREG = COMREG__SNDON;
while (smpc.reg.oreg[31] != OREG31__SNDON); while (smpc.reg.OREG[31].val != OREG31__SNDON);
} }
static inline void init_vdp() static inline void init_vdp()

4
scsp/sound_cpu__slot.cpp
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@ -19,7 +19,7 @@ void main()
while ((smpc.reg.SF & 1) != 0); while ((smpc.reg.SF & 1) != 0);
smpc.reg.SF = 1; smpc.reg.SF = 1;
smpc.reg.COMREG = COMREG__SNDOFF; smpc.reg.COMREG = COMREG__SNDOFF;
while (smpc.reg.oreg[31] != OREG31__SNDOFF); while (smpc.reg.OREG[31].val != OREG31__SNDOFF);
scsp.reg.ctrl.MIXER = MIXER__MEM4MB; scsp.reg.ctrl.MIXER = MIXER__MEM4MB;
@ -39,7 +39,7 @@ void main()
while ((smpc.reg.SF & 1) != 0); while ((smpc.reg.SF & 1) != 0);
smpc.reg.SF = 1; smpc.reg.SF = 1;
smpc.reg.COMREG = COMREG__SNDON; smpc.reg.COMREG = COMREG__SNDON;
while (smpc.reg.oreg[31] != OREG31__SNDON); while (smpc.reg.OREG[31].val != OREG31__SNDON);
// do nothing while the sound CPU manipulates the SCSP // do nothing while the sound CPU manipulates the SCSP
} }

13
smpc/input_intback.cpp
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@ -156,7 +156,7 @@ void smpc_int(void) {
- both controllers must be "digital pad" controllers - both controllers must be "digital pad" controllers
*/ */
while (oreg_ix < 31) { while (oreg_ix < 31) {
reg8 const& oreg = smpc.reg.oreg[oreg_ix++]; reg8 const& oreg = smpc.reg.OREG[oreg_ix++].val;
switch (intback.fsm++) { switch (intback.fsm++) {
case PORT_STATUS: case PORT_STATUS:
port_connected = (PORT_STATUS__CONNECTORS(oreg) == 1); port_connected = (PORT_STATUS__CONNECTORS(oreg) == 1);
@ -168,7 +168,6 @@ void smpc_int(void) {
break; break;
case PERIPHERAL_ID: case PERIPHERAL_ID:
assert(port_connected); assert(port_connected);
assert(PERIPHERAL_ID__IS_DIGITAL_PAD(oreg));
assert(PERIPHERAL_ID__DATA_SIZE(oreg) == 2); assert(PERIPHERAL_ID__DATA_SIZE(oreg) == 2);
break; break;
case DATA1: case DATA1:
@ -199,9 +198,9 @@ void smpc_int(void) {
} }
if ((smpc.reg.SR & SR__NPE) != 0) { if ((smpc.reg.SR & SR__NPE) != 0) {
smpc.reg.ireg[0] = INTBACK__IREG0__CONTINUE; smpc.reg.IREG[0].val = INTBACK__IREG0__CONTINUE;
} else { } else {
smpc.reg.ireg[0] = INTBACK__IREG0__BREAK; smpc.reg.IREG[0].val = INTBACK__IREG0__BREAK;
} }
} }
@ -234,12 +233,12 @@ void v_blank_in_int() {
smpc.reg.SF = 0; smpc.reg.SF = 0;
smpc.reg.ireg[0] = INTBACK__IREG0__STATUS_DISABLE; smpc.reg.IREG[0].val = INTBACK__IREG0__STATUS_DISABLE;
smpc.reg.ireg[1] = ( INTBACK__IREG1__PERIPHERAL_DATA_ENABLE smpc.reg.IREG[1].val = ( INTBACK__IREG1__PERIPHERAL_DATA_ENABLE
| INTBACK__IREG1__PORT2_15BYTE | INTBACK__IREG1__PORT2_15BYTE
| INTBACK__IREG1__PORT1_15BYTE | INTBACK__IREG1__PORT1_15BYTE
); );
smpc.reg.ireg[2] = INTBACK__IREG2__MAGIC; smpc.reg.IREG[2].val = INTBACK__IREG2__MAGIC;
smpc.reg.COMREG = COMREG__INTBACK; smpc.reg.COMREG = COMREG__INTBACK;
} }

12
smpc/input_keyboard.cpp
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@ -201,7 +201,7 @@ void smpc_int(void) {
- multitaps are not parsed correctly - multitaps are not parsed correctly
*/ */
while (oreg_ix < 32) { while (oreg_ix < 32) {
reg8 const& oreg = smpc.reg.oreg[oreg_ix++]; reg8 const& oreg = smpc.reg.OREG[oreg_ix++].val;
switch (intback.fsm) { switch (intback.fsm) {
case PORT_STATUS: case PORT_STATUS:
port_connected = (PORT_STATUS__CONNECTORS(oreg) == 1); port_connected = (PORT_STATUS__CONNECTORS(oreg) == 1);
@ -292,9 +292,9 @@ void smpc_int(void) {
} }
if ((smpc.reg.SR & SR__NPE) != 0) { if ((smpc.reg.SR & SR__NPE) != 0) {
smpc.reg.ireg[0] = INTBACK__IREG0__CONTINUE; smpc.reg.IREG[0].val = INTBACK__IREG0__CONTINUE;
} else { } else {
smpc.reg.ireg[0] = INTBACK__IREG0__BREAK; smpc.reg.IREG[0].val = INTBACK__IREG0__BREAK;
} }
} }
@ -327,12 +327,12 @@ void v_blank_in_int() {
smpc.reg.SF = 0; smpc.reg.SF = 0;
smpc.reg.ireg[0] = INTBACK__IREG0__STATUS_DISABLE; smpc.reg.IREG[0].val = INTBACK__IREG0__STATUS_DISABLE;
smpc.reg.ireg[1] = ( INTBACK__IREG1__PERIPHERAL_DATA_ENABLE smpc.reg.IREG[1].val = ( INTBACK__IREG1__PERIPHERAL_DATA_ENABLE
| INTBACK__IREG1__PORT2_15BYTE | INTBACK__IREG1__PORT2_15BYTE
| INTBACK__IREG1__PORT1_15BYTE | INTBACK__IREG1__PORT1_15BYTE
); );
smpc.reg.ireg[2] = INTBACK__IREG2__MAGIC; smpc.reg.IREG[2].val = INTBACK__IREG2__MAGIC;
smpc.reg.COMREG = COMREG__INTBACK; smpc.reg.COMREG = COMREG__INTBACK;
} }

6
wordle/main_saturn.cpp
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@ -138,12 +138,12 @@ void v_blank_in_int()
smpc.reg.SF = 0; smpc.reg.SF = 0;
smpc.reg.ireg[0] = INTBACK__IREG0__STATUS_DISABLE; smpc.reg.IREG[0].val = INTBACK__IREG0__STATUS_DISABLE;
smpc.reg.ireg[1] = ( INTBACK__IREG1__PERIPHERAL_DATA_ENABLE smpc.reg.IREG[1].val = ( INTBACK__IREG1__PERIPHERAL_DATA_ENABLE
| INTBACK__IREG1__PORT2_15BYTE | INTBACK__IREG1__PORT2_15BYTE
| INTBACK__IREG1__PORT1_15BYTE | INTBACK__IREG1__PORT1_15BYTE
); );
smpc.reg.ireg[2] = INTBACK__IREG2__MAGIC; smpc.reg.IREG[2].val = INTBACK__IREG2__MAGIC;
smpc.reg.COMREG = COMREG__INTBACK; smpc.reg.COMREG = COMREG__INTBACK;
} }