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Author SHA1 Message Date
94e9c0403d regs/bits: fix all parse errors 2025-10-13 14:55:19 -05:00
dafce08838 regs: move bits to regs/bits 2025-10-13 14:54:34 -05:00
245 changed files with 39 additions and 21 deletions

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@ -35,7 +35,7 @@ RB_NO_UPDATE 27 0x0 Ring Buffer No Write to Read Pointer. The p
POSSIBLE VALUES: POSSIBLE VALUES:
00 - Write to Host`s copy of Read Pointer in system memory. 00 - Write to Host`s copy of Read Pointer in system memory.
01 - Do not write to Host`s copy of Read pointer. 01 - Do not write to Host`s copy of Read pointer.
RB_RPTR_WR_ENA 31 0bx0 Ring Buffer Read Pointer Write Transfer Enable. When RB_RPTR_WR_ENA 31 0x0 Ring Buffer Read Pointer Write Transfer Enable. When
set the contents of the CP_RB_RPTR_WR register is set the contents of the CP_RB_RPTR_WR register is
transferred to the active read pointer (CP_RB_RPTR) transferred to the active read pointer (CP_RB_RPTR)
whenever the CP_RB_WPTR register is written. whenever the CP_RB_WPTR register is written.

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@ -14,8 +14,8 @@ PIPE_COUNT 3:1 0x0 Specifies the number of active pipes and c
POSSIBLE VALUES: POSSIBLE VALUES:
00 - RV350 (1 pipe, 1 ctx) 00 - RV350 (1 pipe, 1 ctx)
03 - R300 (2 pipes, 1 ctx) 03 - R300 (2 pipes, 1 ctx)
06 R420-3P (3 pipes, 1 ctx) 06 - R420-3P (3 pipes, 1 ctx)
07 R420 (4 pipes, 1 ctx) 07 - R420 (4 pipes, 1 ctx)
TILE_SIZE 5:4 0x1 Specifies width & height (square), in pixels (only 16, 32 TILE_SIZE 5:4 0x1 Specifies width & height (square), in pixels (only 16, 32
available). available).
POSSIBLE VALUES: POSSIBLE VALUES:

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