dsp-asm/dsp-notes.csv at 72ae017a18be5c1f670ac2abc7cfe953ffb75bf1

Zack Buhman ddf46ce8fd stmt_ins: refactor

The overall intent is to make writing a decompiler require less code
duplication.

"bits.hpp" and "stmt_enum.hpp" are replaced with "stmt_ins.hpp" which
is generated directly from dsp-notes.csv.

2023-09-03 04:46:34 +00:00

7.7 KiB

Raw Blame History

1
2				31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
3	OP			0	0
4		ALU
5			struct andl			0	0	0	1																											1
6			struct orl			0	0	1	0																											2
7			struct xorl			0	0	1	1																											3
8			struct add			0	1	0	0																											4
9			struct sub			0	1	0	1																											5
10			struct ad2			0	1	1	0																											6
11			struct sr			1	0	0	0																											8
12			struct rr			1	0	0	1																											9
13			struct sl			1	0	1	0																											10
14			struct rl			1	0	1	1																											11
15			struct rl8			1	1	1	1																											15
16
17		X-bus	enum x_src
18			m0										0	0	0
19			m1										0	0	1
20			m2										0	1	0
21			m3										0	1	1
22			mc0										1	0	0
23			mc1										1	0	1
24			mc2										1	1	0
25			mc3										1	1	1
26			struct mov_ram_x							1			x_src
27			struct mov_mul_p								1	0
28			struct mov_ram_p								1	1	x_src
29		Y-bus	enum y_src
30			m0																0	0	0
31			m1																0	0	1
32			m2																0	1	0
33			m3																0	1	1
34			mc0																1	0	0
35			mc1																1	0	1
36			mc2																1	1	0
37			mc3																1	1	1
38			struct mov_ram_y													1			y_src
39			struct clr_a														0	1
40			struct mov_alu_a														1	0
41			struct mov_ram_a														1	1	y_src
42
43				31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
44		D1-bus	enum d1_src
45			m0																													0	0	0	0	0
46			m1																													0	0	0	1	1
47			m2																													0	0	1	0	2
48			m3																													0	0	1	1	3
49			mc0																													0	1	0	0	4
50			mc1																													0	1	0	1	5
51			mc2																													0	1	1	0	6
52			mc3																													0	1	1	1	7
53			all																													1	0	0	1	9
54			alh																													1	0	1	0	10
55			enum d1_dst
56			mc0																					0	0	0	0									0
57			mc1																					0	0	0	1									1
58			mc2																					0	0	1	0									2
59			mc3																					0	0	1	1									3
60			rx																					0	1	0	0									4
61			pl																					0	1	0	1									5
62			ra0																					0	1	1	0									6
63			wa0																					0	1	1	1									7
64			lop																					1	0	1	0									10
65			top																					1	0	1	1									11
66			ct0																					1	1	0	0									12
67			ct1																					1	1	0	1									13
68			ct2																					1	1	1	0									14
69			ct3																					1	1	1	1									15
70			struct mov_imm_d1																			0	1	d1_dst				imm
71			struct mov_ram_d1																			1	1	d1_dst								d1_src
72
73				31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
74	LOAD		struct mvi	1	0	dst				0	imm
75		conditional	struct mvi_cond	1	0	dst				1	cond						imm
76			enum cond								N		T0	C	S	Z
77			z								1	0	0	0	0	1
78			nz								0	0	0	0	0	1
79			s								1	0	0	0	1	0
80			ns								0	0	0	0	1	0
81			c								1	0	0	1	0	0
82			nc								0	0	0	1	0	0
83			t0								1	0	1	0	0	0
84			nt0								0	0	1	0	0	0
85			zs								1	0	0	0	1	1
86			nzs								0	0	0	0	1	1
87			enum dst
88			mc0			0	0	0	0																											0
89			mc1			0	0	0	1																											1
90			mc2			0	0	1	0																											2
91			mc3			0	0	1	1																											3
92			rx			0	1	0	0																											4
93			pl			0	1	0	1																											5
94			ra0			0	1	1	0																											6
95			wa0			0	1	1	1																											7
96			lop			1	0	1	0																											10
97			pc			1	1	0	0																											12
98
99				31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
100	DMA																				H	L	D
101		imm	struct d0_dst_imm	1	1	0	0											add			hold	0	0		dst			imm
102			struct src_d0_imm	1	1	0	0											add			hold	0	1		src			imm
103		ram	struct d0_dst_ram	1	1	0	0											add			hold	1	0		dst								ram
104			struct src_d0_ram	1	1	0	0											add			hold	1	1		src								ram
105			enum ram
106			m0																														0	0	0	0
107			m1																														0	0	1	1
108			m2																														0	1	0	2
109			m3																														0	1	1	3
110			mc0																														1	0	0	4
111			mc1																														1	0	1	5
112			mc2																														1	1	0	6
113			mc3																														1	1	1	7
114			enum src
115			mc0																						0	0	0
116			mc1																						0	0	1
117			mc2																						0	1	0
118			mc3																						0	1	1
119			enum dst
120			mc0																						0	0	0
121			mc1																						0	0	1
122			mc2																						0	1	0
123			mc3																						0	1	1
124			prg																						1	0	0
125			enum hold
126			_false																		0
127			_true																		1
128			enum add
129			_0															0	0	0																0
130			_1															0	0	1																1
131			_2															0	1	0																2
132			_4															0	1	1																3
133			_8															1	0	0																4
134			_16															1	0	1																5
135			_32															1	1	0																6
136			_64															1	1	1																7
137
138				31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
139	JUMP
140			struct jmp	1	1	0	1			0	imm
141		conditional	struct jmp_cond	1	1	0	1			1	cond						imm
142			enum cond							F	N		T0	C	S	Z
143			z								1	0	0	0	0	1
144			nz								0	0	0	0	0	1
145			s								1	0	0	0	1	0
146			ns								0	0	0	0	1	0
147			c								1	0	0	1	0	0
148			nc								0	0	0	1	0	0
149			t0								1	0	1	0	0	0
150			nt0								0	0	1	0	0	0
151			zs								1	0	0	0	1	1
152			nzs								0	0	0	0	1	1
153
154	LOOP		struct btm	1	1	1	0	0
155			struct lps	1	1	1	0	1
156
157	END		struct end	1	1	1	1	0
158			struct endi	1	1	1	1	1

7.7 KiB Raw Blame History

7.7 KiB

Raw Blame History