dreamcast/regs/core_bits.csv
Zack Buhman b99722a6df _bits: use more bits generated from spreadsheets
This rearranges scene.cpp to a file organization that more closely
follows which code is responsible for what area of (hardware)
initialization.

All TA and CORE register accesses now use the new ta_bits.h and
core_bits.h, respectively.
2023-12-05 00:16:38 +08:00

12 KiB

1register_nameenum_namebitsbit_namevaluemaskdescription
2ID31-16device_id
3ID15-0vendor_id
4
5REVISION15-0chip_revision
6
7SOFTRESET2sdram_if_soft_reset1
8SOFTRESET1pipeline_soft_reset1
9SOFTRESET0ta_soft_reset1
10
11STARTRENDER0start_render1
12
13TEST_SELECT9-5diagdb_data
14TEST_SELECT4-0diagda_data
15
16PARAM_BASE23-0base_address0xf00000
17
18REGION_BASE23-0base_address0xfffffc
19
20SPAN_SORT_CFG16cache_bypass1
21SPAN_SORT_CFG8offset_sort_enable1
22SPAN_SORT_CFG0span_sort_enable1
23
24VO_BORDER_COL24chroma0b1
25VO_BORDER_COL23-16red0xff
26VO_BORDER_COL15-8green0xff
27VO_BORDER_COL7-0blue0xff
28
29FB_R_CTRLvclk_div23pclk_vclk_20
30FB_R_CTRLvclk_div23pclk_vclk_11
31FB_R_CTRL22fb_strip_buf_en1
32FB_R_CTRL21-16fb_stripsize0b111_110In units of 16 lines, in multiples of 32 lines. 0x02 is 32 lines, 0x04 is 64 lines, 0x03 is an illegal value
33FB_R_CTRL15-8fb_chroma_threshold0xff
34FB_R_CTRL6-4fb_concat0b11
35FB_R_CTRLfb_depth3-2_0555_rgb_16bit0
36FB_R_CTRLfb_depth3-2_0565_rgb_16bit1
37FB_R_CTRLfb_depth3-2_888_rgb_24bit_packed2
38FB_R_CTRLfb_depth3-2_0888_rgb_32bit3
39FB_R_CTRL1fb_line_double1
40FB_R_CTRL0fb_enable1
41
42FB_W_CTRL23-16fb_alpha_threshold0xff
43FB_W_CTRL15-8fb_kval0xff
44FB_W_CTRL3fb_dither1
45FB_W_CTRLfb_packmode2-0_0555_krgb_16bit0
46FB_W_CTRLfb_packmode2-0_565_rgb_16bit1
47FB_W_CTRLfb_packmode2-0_4444_argb_16bit2
48FB_W_CTRLfb_packmode2-0_1555_argb_16bit3
49FB_W_CTRLfb_packmode2-0_888_rgb_24bit_packed4
50FB_W_CTRLfb_packmode2-0_0888_krgb_32bit5
51FB_W_CTRLfb_packmode2-0_8888_argb_32bit6
52
53FB_W_LINESTRIDE8-0fb_line_stride0xffIn 8-byte units
54
55FB_R_SOF123-0frame_buffer_read_address_frame_10xfffffc
56
57FB_R_SOF223-0frame_buffer_read_address_frame_20xfffffc
58
59FB_R_SIZE29-20fb_modulus0x3ffIn 4-byte units
60FB_R_SIZE19-10fb_y_size0x3ff
61FB_R_SIZE9-0fb_x_size0x3ff
62
63FB_W_SOF124-0frame_buffer_write_address_frame_10x1fffffc
64
65FB_W_SOF224-0frame_buffer_write_address_frame_20x1fffffc
66
67FB_X_CLIP26-16fb_x_clip_max0x7ff
68FB_X_CLIP10-0fb_x_clip_min0x7ff
69
70FB_Y_CLIP25-16fb_y_clip_max0x3ff
71FB_Y_CLIP9-0fb_y_clip_min0x3ff
72
73FPU_SHAD_SCALEsimple_shadow_enable8parameter_selection_volume_mode0
74FPU_SHAD_SCALEsimple_shadow_enable8intensity_volume_mode1
75FPU_SHAD_SCALE7-0scale_factor_for_shadows0xff
76
77FPU_CULL_VAL30-0culling_comparison_valuefloat_0_8_23
78
79FPU_PARAM_CFGregion_header_type21type_10
80FPU_PARAM_CFGregion_header_type21type_21
81FPU_PARAM_CFG19-14tsp_parameter_burst_threshold0x3f
82FPU_PARAM_CFG13-8isp_parameter_burst_threshold0x3f
83FPU_PARAM_CFG7-4pointer_burst_size0xf
84FPU_PARAM_CFG3-0pointer_first_burst_size0xf
85
86HALF_OFFSETtsp_texel_sampling_position2top_left1
87HALF_OFFSETtsp_texel_sampling_position2center1
88HALF_OFFSETtsp_pixel_sampling_position1top_left1
89HALF_OFFSETtsp_pixel_sampling_position1center1
90HALF_OFFSETfpu_pixel_sampling_position0top_left1
91HALF_OFFSETfpu_pixel_sampling_position0center1
92
93FPU_PERP_VAL30-0perpendicular_triangle_comparefloat_0_8_23
94
95ISP_BACKGND_D31-4background_plane_depthfloat_1_8_19
96
97ISP_BACKGND_T28cache_bypass1
98ISP_BACKGND_T27shadow1
99ISP_BACKGND_T26-24skip0b111
100ISP_BACKGND_T23-3tag_address0x1fffffIn 32-bit units
101ISP_BACKGND_T2-0tag_offset0b111
102
103ISP_FEED_CFG23-14cache_size_for_translucency0x3ffMust be between 0x020 and 0x200
104ISP_FEED_CFG13-4punch_through_chunk_size0x3ffMust be between 0x020 and 0x200, must be larger than cache_size_for_translucency
105ISP_FEED_CFG3discard_mode1
106ISP_FEED_CFG0pre_sort_mode1
107
108SDRAM_REFRESH7-0refresh_counter_value0xff
109
110SDRAM_ARB_CFGoverride_value21-18priority_only0x0
111SDRAM_ARB_CFGoverride_value21-18rendered_data0x1
112SDRAM_ARB_CFGoverride_value21-18texture_vq_index0x2
113SDRAM_ARB_CFGoverride_value21-18texture_normal_data_and_vq_codebook0x3
114SDRAM_ARB_CFGoverride_value21-18tile_accelerator_isp_tsp_data0x4
115SDRAM_ARB_CFGoverride_value21-18tile_accelerator_pointers0x5
116SDRAM_ARB_CFGoverride_value21-18sh40x6
117SDRAM_ARB_CFGoverride_value21-18tsp_parameters0x7
118SDRAM_ARB_CFGoverride_value21-18tsp_region_data0x8
119SDRAM_ARB_CFGoverride_value21-18isp_pointer_data0x9
120SDRAM_ARB_CFGoverride_value21-18isp_parameters0xa
121SDRAM_ARB_CFGoverride_value21-18crt_controller0xb
122SDRAM_ARB_CFGarbiter_priority_control17-16priority_arbitration_only0x0
123SDRAM_ARB_CFGarbiter_priority_control17-16override_value_field0x1
124SDRAM_ARB_CFGarbiter_priority_control17-16round_robin_counter0x2
125SDRAM_ARB_CFG15-8arbiter_crt_page_break_latency_count_value0xff
126SDRAM_ARB_CFG7-0arbiter_page_break_latency_count_value0xff
127
128SDRAM_CFG28-26read_command_to_returned_data_delay0b111
129SDRAM_CFG25-23cas_latency_value0b111
130SDRAM_CFG22-21activate_to_activate_period0b11
131SDRAM_CFG20-18read_to_write_period0b111
132SDRAM_CFG17-14refresh_to_activate_period0b1111
133SDRAM_CFG11-10pre_charge_to_activate_period0b11
134SDRAM_CFG9-6activate_to_pre_charge_period0b1111
135SDRAM_CFG5-4activate_to_read_write_command_period0b11
136SDRAM_CFG3-2write_to_pre_charge_period0b11
137SDRAM_CFG1-0read_to_pre_charge_period0b11
138
139FOG_COL_RAM23-16red0xff
140FOG_COL_RAM15-8green0xff
141FOG_COL_RAM7-0blue0xff
142
143FOG_COL_VERT23-16red0xff
144FOG_COL_VERT15-8green0xff
145FOG_COL_VERT7-0blue0xff
146
147FOG_DENSITY15-8fog_scale_mantissa0xff
148FOG_DENSITY7-0fog_scale_exponent0xff
149
150FOG_CLAMP_MAX31-24alpha0xff
151FOG_CLAMP_MAX23-16red0xff
152FOG_CLAMP_MAX15-8green0xff
153FOG_CLAMP_MAX7-0blue0xff
154
155FOG_CLAMP_MIN31-24alpha0xff
156FOG_CLAMP_MIN23-16red0xff
157FOG_CLAMP_MIN15-8green0xff
158FOG_CLAMP_MIN7-0blue0xff
159
160SPG_TRIGGER_POS25-16trigger_v_count
161SPG_TRIGGER_POS9-0trigger_h_count
162
163SPG_HBLANK_INT25-16hblank_in_interrupt
164SPG_HBLANK_INThblank_int_mode13-12output_equal_line_comp_val0x0
165SPG_HBLANK_INThblank_int_mode13-12output_every_line_comp_val0x1
166SPG_HBLANK_INThblank_int_mode13-12output_every_line0x2
167SPG_HBLANK_INT9-0line_comp_val0x3ff
168
169SPG_VBLANK_INT25-16vblank_out_interrupt_line_number0x3ff
170SPG_VBLANK_INT9-0vblank_in_interrupt_line_number0x3ff
171
172SPG_CONTROLcsync_on_h9hsync0
173SPG_CONTROLcsync_on_h9csync1
174SPG_CONTROLsync_direction8input0
175SPG_CONTROLsync_direction8output1
176SPG_CONTROL7pal1
177SPG_CONTROL6ntsc1
178SPG_CONTROL5force_field21
179SPG_CONTROL4interlace1
180SPG_CONTROL3spg_lock1
181SPG_CONTROLmcsync_pol2active_low0
182SPG_CONTROLmcsync_pol2active_high1
183SPG_CONTROLmvsync_pol1active_low0
184SPG_CONTROLmvsync_pol1active_high1
185SPG_CONTROLmhsync_pol0active_low0
186SPG_CONTROLmhsync_pol0active_high1
187
188SPG_HBLANK25-16hbend0x3ff
189SPG_HBLANK9-0hbstart0x3ff
190
191SPG_LOAD25-16vcount0x3ff
192SPG_LOAD9-0hcount0x3ff
193
194SPG_VBLANK25-16vbend0x3ff
195SPG_VBLANK9-0vbstart0x3ff
196
197SPG_WIDTH31-22eqwidth0x3ff
198SPG_WIDTH21-12bpwidth0x3ff
199SPG_WIDTH11-8vswidth0b1111
200SPG_WIDTH6-0hswidth0x7f
201
202TEXT_CONTROLcode_book_endian17little_endian0
203TEXT_CONTROLcode_book_endian17big_endian1
204TEXT_CONTROLindex_endian16little_endian0
205TEXT_CONTROLindex_endian16big_endian1
206TEXT_CONTROL12-8bank_bit0x1f
207TEXT_CONTROL4-0stride0x1f
208
209VO_CONTROL21pclk_delay_reset1
210VO_CONTROL20-16pclk_delay0b1111
211VO_CONTROL8pixel_double1
212VO_CONTROLfield_mode7-4use_field_flag_from_spg0x0
213VO_CONTROLfield_mode7-4use_inverse_of_field_flag_from_spg0x1
214VO_CONTROLfield_mode7-4field_1_fixed0x2
215VO_CONTROLfield_mode7-4field_2_fixed0x3
216VO_CONTROLfield_mode7-4field_1_when_the_active_edges_of_hsync_and_vsync_match0x4
217VO_CONTROLfield_mode7-4field_2_when_the_active_edges_of_hsync_and_vsync_match0x5
218VO_CONTROLfield_mode7-4field_1_when_hsync_becomes_active_in_the_middle_of_the_vsync_active_edge0x6
219VO_CONTROLfield_mode7-4field_2_when_hsync_becomes_active_in_the_middle_of_the_vsync_active_edge0x7
220VO_CONTROLfield_mode7-4inverted_at_the_active_edge_of_vsync0x8
221VO_CONTROL3blank_video1
222VO_CONTROLblank_pol2active_low0
223VO_CONTROLblank_pol2active_high1
224VO_CONTROLvsync_pol1active_low0
225VO_CONTROLvsync_pol1active_high1
226VO_CONTROLhsync_pol0active_low0
227VO_CONTROLhsync_pol0active_high1
228
229VO_STARTX9-0horizontal_start_position0x3ff
230
231VO_STARTY25-16vertical_start_position_on_field_20x3ff
232VO_STARTY9-0vertical_start_position_on_field_10x3ff
233
234SCALER_CTLfield_select18field_10
235SCALER_CTLfield_select18field_21
236SCALER_CTL17interlace1
237SCALER_CTL16horizontal_scaling_enable1
238SCALER_CTL15-0vertical_scale_factor0xffff
239
240PAL_RAM_CTLpixel_format1-0argb15550
241PAL_RAM_CTLpixel_format1-0rgb5651
242PAL_RAM_CTLpixel_format1-0argb44442
243PAL_RAM_CTLpixel_format1-0argb88883
244
245SPG_STATUS13vsync
246SPG_STATUS12hsync
247SPG_STATUS11blank
248SPG_STATUS10fieldnum
249SPG_STATUS9-0scanline
250
251FB_BURSTCTRL19-16wr_burst0b1111
252FB_BURSTCTRL14-8vid_lat0x7f
253FB_BURSTCTRL5-0vid_burst0x3f >
254
255FB_C_SOF23-0frame_buffer_current_read_address
256
257Y_COEFF15-8coefficient_10xff
258Y_COEFF7-0coefficient_0_20xff
259
260PT_ALPHA_REF7-0alpha_reference_for_punch_through0xff
261
262FOG_TABLE15-0fog_table_data0xffff
263
264PALETTE_RAM31-0palette_data0xffff_ffff