status
Bit
5:0
6
7
8
9
11:10
27:12
30:28
31
Description
PCI FIFO freespace (0x3f=FIFO empty). Default is 0x3f.
Vertical retrace (0=Vertical retrace active, 1=Vertical retrace inactive). Default is 1.
Chuck graphics engine busy (0=engine idle, 1=engine busy). Default is 0.
Bruce busy (0=engine idle, 1=engine busy). Default is 0.
Voodoo2 Graphics busy (0=idle, 1=busy). Default is 0.
Displayed buffer (0=buffer 0, 1=buffer 1, 2=auxiliary buffer, 3=reserved). Default is 0.
Memory FIFO freespace (0xffff=FIFO empty). Default is 0xffff.
Swap Buffers Pending. Default is 0x0.
reserved

intrCtrl
Bit
0
1
2
3
4
5
6
7
8
9
10
11
19:12
30:20
31
Description
Horizontal Sync (rising edge) interrupts enable (1=enable). Default is 0.
Horizontal Sync (falling edge) interrupts enable (1=enable). Default is 0.
Vertical Sync (rising edge) interrupts enable (1=enable). Default is 0.
Vertical Sync (falling edge) interrupts enable (1=enable). Default is 0.
PCI FIFO Full interrupts enable (1=enable). Default is 0.
User Interrupt Command interrupts enable (1=enable). Default is 0.
Horizontal Sync (rising edge) interrupt generated (1=interrupt generated).
Horizontal Sync (falling edge) interrupt generated (1=interrupt generated).
Vertical Sync (rising edge) interrupt generated (1=interrupt generated).
Vertical Sync (falling edge) interrupt generated (1=interrupt generated).
PCI FIFO Full interrupt generated (1=interrupt generated).
User Interrupt Command interrupt generated (1=interrupt generated).
User Interrupt Command Tag. Read only.
reserved
External pin pci_inta value, active low (0=PCI interrupt is active, 1=PCI interrupt is inactive)

vertexAx, vertexAy, vertexBx, vertexBy, vertexCx, vertexCy
Bit
15:0
Description
Vertex coordinate information (fixed point two’s complement 12.4 format)

fvertexAx, fvertexAy, fvertexBx, fvertexBy, fvertexCx, fvertexCy
Bit
31:0
Description
Vertex coordinate information (IEEE 32-bit single-precision floating point format)

startR, startG, startB, startA
Bit
23:0
Description
Starting Vertex-A Color information (fixed point two’s complement 12.12 format)

fstartR, fstartG, fstartB, fstartA
Bit
31:0
Description
Starting Vertex-A Color information (IEEE 32-bit single-precision floating point format)

startZ
Bit
31:0
Description
Starting Vertex-A Z information (fixed point two’s complement 20.12 format)

fstartZ
Bit
31:0
Description
Starting Vertex-A Z information (IEEE 32-bit single-precision floating point format)

startS, startT
Bit
31:0
Description
Starting Vertex-A Texture coordinates (fixed point two’s complement 14.18 format)

fstartS, fstartT
Bit
31:0
Description
Starting Vertex-A Texture coordinates (IEEE 32-bit single-precision floating point format)

startW
Bit
31:0
Description
Starting Vertex-A W information (fixed point two’s complement 2.30 format)

fstartW
Bit
31:0
Description
Starting Vertex-A W information (IEEE 32-bit single-precision floating point format)

dRdX, dGdX, dBdX, dAdX
Bit
23:0
Description
Change in color with respect to X (fixed point two’s complement 12.12 format)

fdRdX, fdGdX, fdBdX, fdAdX
Bit
31:0
Description
Change in color with respect to X (IEEE 32-bit single-precision floating point format)

dZdX
Bit
31:0
Description
Change in Z with respect to X (fixed point two’s complement 20.12 format)

fdZdX
Bit
31:0
Description
Change in Z with respect to X (IEEE 32-bit single-precision floating point format)

dSdX, dTdX
Bit
31:0
Description
Change in S and T with respect to X (fixed point two’s complement 14.18 format)

fdSdX, fdTdX
Bit
31:0
Description
Change in Z with respect to X (IEEE 32-bit single-precision floating point format)

dWdX
Bit
31:0
Description
Change in W with respect to X (fixed point two’s complement 2.30 format)

fdWdX
Bit
31:0
Description
Change in W with respect to X (IEEE 32-bit single-precision floating point format)

dRdY, dGdY, dBdY, dAdY
Bit
23:0
Description
Change in color with respect to Y (fixed point two’s complement 12.12 format)

fdRdY, fdGdY, fdBdY, fdAdY
Bit
31:0
Description
Change in color with respect to Y (IEEE 32-bit single-precision floating point format)

dZdY
Bit
31:0
Description
Change in Z with respect to Y (fixed point two’s complement 20.12 format)

fdZdY
Bit
31:0
Description
Change in Z with respect to Y (IEEE 32-bit single-precision floating point format)

dSdY, dTdY
Bit
31:0
Description
Change in S and T with respect to Y (fixed point two’s complement 14.18 format)

fdSdY, fdTdY
Bit
31:0
Description
Change in Z with respect to Y (IEEE 32-bit single-precision floating point format)

dWdY
Bit
31:0
Description
Change in W with respect to Y (fixed point two’s complement 2.30 format)

fdWdY
Bit
31:0
Description
Change in W with respect to Y (IEEE 32-bit single-precision floating point format)

triangleCMD
Bit
31
Description
Sign of the area of the triangle to be rendered

ftriangleCMD
Bit
31
Description
Sign of the area of the triangle to be rendered (IEEE 32-bit single-precision floating point format)

fbzColorPath
Bit
1:0
3:2
4
6:5
7
8
9
12:10
13
14
15
16
17
18
21:19
22
23
24
25
26
27
28
29
Description
RGB Select (0=Iterated RGB, 1=Bruce Color Output, 2=Color1 RGB, 3=Reserved)
Alpha Select (0=Iterated A, 1=Bruce Alpha Output, 2=Color1 Alpha, 3=Reserved)
Color Combine Unit control (cc_localselect mux control: 0=iterated RGB, 1=Color0 RGB)
Alpha Combine Unit control (cca_localselect mux control: 0=iterated alpha, 1=Color0 alpha, 2=clamped iterated Z, 3=clamped iterated W)
Color Combine Unit control (cc_localselect_override mux control: 0=cc_localselect, 1=Texture alpha bit(7))
Color Combine Unit control (cc_zero_other mux control: 0=c_other, 1=zero)
Color Combine Unit control (cc_sub_clocal mux control: 0=zero, 1=c_local)
Color Combine Unit control (cc_mselect mux control: 0=zero, 1=c_local, 2=a_other, 3=a_local, 4=texture alpha, 5=texture RGB, 6-7=reserved)
Color Combine Unit control (cc_reverse_blend control)
Color Combine Unit control (cc_add_clocal control)
Color Combine Unit control (cc_add_alocal control)
Color Combine Unit control (cc_invert_output control)
Alpha Combine Unit control (cca_zero_other mux control: 0=a_other, 1=zero)
Alpha Combine Unit control (cca_sub_clocal mux control: 0=zero, 1=a_local)
Alpha Combine Unit control (cca_mselect mux control: 0=zero, 1=a_local, 2=a_other, 3=a_local, 4=texture alpha, 5-7=reserved)
Alpha Combine Unit control (cca_reverse_blend control)
Alpha Combine Unit control (cca_add_clocal control)
Alpha Combine Unit control (cca_add_alocal control)
Alpha Combine Unit control (cca_invert_output control)
Parameter Adjust (1=adjust parameters for subpixel correction)
Enable Texture Mapping (1=enable)
Enable RGBA, Z, and W parameter clamping (1=enable)
Enable anti-aliasing (1=enable)* (not implemented in Alpha version)

fogMode
Bit
0
1
2
3
4
5
6
7
Description
Enable fog (1=enable)
Fog Unit control (fogadd control: 0=fogColor, 1=zero)
Fog Unit control (fogmult control: 0=Color Combine Unit RGB, 1=zero)
Fog Unit control (fogalpha control)
Fog Unit control (fogz control)
Fog Unit control (fogconstant control: 0=fog multiplier output, 1=fogColor)
Fog Unit control (fogdither control, dither the fog blending component)
Fog Unit control (fogzones control, enable signed fog delta)

alphaMode
Bit
0
3:1
4
7:5
11:8
15:12
19:16
23:20
31:24
Description
Enable alpha function (1=enable)
Alpha function (see table below)
Enable alpha blending (1=enable)
reserved
Source RGB alpha blending factor (see table below)
Destination RGB alpha blending factor (see table below)
Source alpha-channel alpha blending factor (see table below)
Destination alpha-channel alpha blending factor (see table below)
Alpha reference value

fbzMode
Bit
0
1
2
3
4
7:5
8
9
10
11
12
13
15:14
16
17
18
19
20
21
Description
Enable clipping rectangle (1=enable)
Enable chroma-keying (1=enable)
Enable stipple register masking (1=enable)
Floating point depth buffer Select (0=Use integer Z-value for depth buffering, 1=Use floating point value for depth buffering [either Z or W, controlled by fbzMode bit(21)])
Enable depth-buffering (1=enable)
Depth-buffer function (see table below)
Enable dithering (1=enable)
RGB buffer write mask (0=disable writes to RGB buffer)
Depth/alpha buffer write mask (0=disable writes to depth/alpha buffer)
Dither algorithm (0=4x4 ordered dither, 1=2x2 ordered dither)
Enable Stipple pattern masking (1=enable)
Enable Alpha-channel mask (1=enable alpha-channel masking)
Draw buffer (0=Front Buffer, 1=Back Buffer, 2-3=Reserved)
Enable depth-biasing (1=enable)
Rendering commands Y origin (0=top of screen is origin, 1=bottom of screen is origin)
Enable alpha planes (1=enable)
Enable alpha-blending dither subtraction (1=enable)
Depth buffer source compare select (0=normal operation, 1=zaColor[15:0])
Depth float select (0=iterated W is used for floating point depth buffering, 1=iterated Z is used for floating point depth buffering)

lfbMode
Bit
3:0
5:4
7:6
8
10:9
11
12
13
14
15
16
Description
Linear frame buffer write format (see table below)
Linear frame buffer write buffer select (0=front buffer, 1=back buffer, 2-3=reserved).
Linear frame buffer read buffer select (0=front buffer, 1=back buffer, 2=depth/alpha buffer, 3=reserved).
Enable Voodoo2 Graphics pixel pipeline-processed linear frame buffer writes (1=enable)
Linear frame buffer RGBA lanes (see tables below)
16-bit word swap linear frame buffer writes (1=enable)
Byte swizzle linear frame buffer writes (1=enable)
LFB access Y origin (0=top of screen is origin, 1=bottom of screen is origin)
Linear frame buffer write access W select (0=LFB selected, 1=zacolor[15:0]).
16-bit word Swap linear frame buffer reads (1=enable)
Byte swizzle linear frame buffer reads (1=enable)

clipLeftRight
Bit
11:0
15:12
27:16
31:28
Description
Unsigned integer specifying right clipping rectangle edge
reserved
Unsigned integer specifying left clipping rectangle edge
reserved

clipLowYHighY Register
Bit
11:0
15:12
27:16
31:28
Description
Unsigned integer specifying high Y clipping rectangle edge
reserved
Unsigned integer specifying low Y clipping rectangle edge
reserved

nopCMD
Bit
0
1
Description
Clear fbiPixelsIn, fbiChromaFail, fbiZfuncFail, fbiAfuncFail, and fbiPixelsOut registers (1=clear registers)
Clear fbiTrianglesOut register (1=clear register)

swapbufferCMD
Bit
0
8:1
9
Description
Synchronize frame buffer swapping to vertical retrace (1=enable)
Swap buffer interval
Disable buffer swapping (1=do not swap buffers)

fogColor
Bit
7:0
15:8
23:16
31:24
Description
Fog Color Blue
Fog Color Green
Fog Color Red
reserved

zaColor
Bit
15:0
23:16
31:24
Description
Constant Depth
reserved
Constant Alpha

chromaKey
Bit
7:0
15:8
23:16
31:24
Description
Chroma-key Blue
Chroma-key Green
Chroma-key Red
reserved

chromaRange
Bit
7:0
15:8
23:16
24
25
26
27
28
31:29
Description
Chroma-Range Blue Upper Limit
Chroma-Range Green Upper Limit
Chroma-Range Red Upper Limit
Chroma-Range Blue Mode (0=inclusive; 1=exclusive)
Chroma-Range Green Mode (0=inclusive; 1=exclusive)
Chroma-Range Red Mode (0=inclusive; 1=exclusive)
Chroma-Range Block Mode (0=intersection; 1=union)
Chroma-Range Enable (0=disable; 1=enable)
reserved

userIntrCMD
Bit
0
1
9:2
Description
Generate USERINTERRUPT interrupt (1=generate interrupt)
Wait for interrupt generated by USERINTERRUPT (visible in intrCtrl bit(11)) to be cleared before continuing (1=stall graphics engine until interrupt is cleared)
User interrupt Tag

stipple
Bit
31:0
Description
stipple value

color0
Bit
7:0
15:8
23:16
31:24
Description
Constant Color Blue
Constant Color Green
Constant Color Red
Constant Color Alpha

color1
Bit
7:0
15:8
23:16
31:24
Description
Constant Color Blue
Constant Color Green
Constant Color Red
Constant Color Alpha

fbiTrianglesOut
Bit
23:0
Description
Rendered triangles (total number of triangles rendered by the Voodoo2 Graphics triangle rendering engine)

fbiPixelsIn
Bit
23:0
Description
Pixel Counter (number of pixels processed by Voodoo2 Graphics triangle engine)

fbiChromaFail
Bit
23:0
Description
Pixel Counter (number of pixels failed chroma-key test)

fbiZfuncFail
Bit
23:0
Description
Pixel Counter (number of pixels failed Z test)

fbiAfuncFail
Bit
23:0
Description
Pixel Counter (number of pixels failed Alpha test)

fbiPixelsOut
Bit
23:0
Description
Pixel Counter (number of pixels drawn to color buffer)

fbiSwapHistory
Bit
3:0
7:4
11:8
15:12
19:16
23:20
27:24
31:28
Description
Number of vertical syncs between the second most recently completed swap command and the most recently completed swap command, or the value 0xf, whichever is less for Frame N.
Vertical sync swapbuffer history for Frame N-1
Vertical sync swapbuffer history for Frame N-2
Vertical sync swapbuffer history for Frame N-3
Vertical sync swapbuffer history for Frame N-4
Vertical sync swapbuffer history for Frame N-5
Vertical sync swapbuffer history for Frame N-6
Vertical sync swapbuffer history for Frame N-7

fogTable
Bit
7:0
15:8
23:16
31:24
Description
FogTable[2n] ∆Fog blending factor
FogTable[2n] Fog blending factor
FogTable[2n+1] ∆Fog blending factor
FogTable[2n+1] Fog blending factor

vRetrace
Bit
12:0
Description
internal vSyncOff counter value (read only)

hvRetrace
Bit
12:0
15:13
26:16
Description
internal vSyncOff counter value (read only)
reserved
internal hRetrace counter value (read only)

hSync
Bit
8:0
15:7
26:16
Description
Horizontal sync on (internal hSyncOn register)
reserved
Horizontal sync off (internal hSyncOff register)

vSync
Bit
12:0
15:12
28:16
Description
Vertical sync on (internal vSyncOn register)
reserved
Vertical sync off (internal vSyncOff register)

videoDimensions
Bit
10:0
15:10
26:16
Description
X (width) dimension (internal xWidth register)
reserved
Y (height) dimension (internal yHeight register)

maxRgbDelta
Bit
7:0
15:8
23:16
Description
Maximum blue delta for video filtering
Maximum green delta for video filtering
Maximum red delta for video filtering

hBorder
Bit
8:0
15:7
24:16
Description
Horizontal backporch border color (internal hBackColor register)
reserved
Horizontal frontporch border color (internal hFrontColor register)

vBorder
Bit
8:0
15:7
24:16
Description
Vertical backporch border color (internal vBackColor register)
reserved
Vertical frontporch border color (internal vFrontColor register)

borderColor
Bit
7:0
15:8
23:16
Description
Video border color (blue)
Video border color (green)
Video border color (red)

fbiInit0
Bit
0
1
2
3
4
5
10:6
11
12
13
24:14
30:25
31
Description
VGA passthrough (controls external pins vga_pass and vga_pass_n). Default value is the value of fb_addr_a[4] at the deassertion of pci_rst
Chuck Graphics Reset (0=run, 1=reset). Default is 0.
Chuck FIFO Reset (0=run, 1=reset). Default is 0. [resets PCI FIFO and the PCI data packer]
Byte swizzle incoming register writes (1=enable). [Register byte data is swizzled if fbiInit0[3]=1 and pci_address[20]=1]. Default is 0.
Stall PCI enable for High Water Mark (0=disable, 1=enable). Default is 1.
reserved
PCI FIFO Empty Entries Low Water Mark. Valid values are 0-31. Default is 0x10.
Linear frame buffer accesses stored in memory FIFO (1=enable). Default is 0.
Texture memory accesses stored in memory FIFO (1=enable). Default is 0.
Memory FIFO enable (0=disable, 1=enable). Default is 0.
Memory FIFO High Water Mark (bits [15:5]). Default is 0x0.
Memory FIFO Write Burst High Water Mark (Range 0-63 -- must be greater than fbiinit4[7:2]). Default is 0x0.
reserved

fbiInit1
Bit
0
1
2
3
7:4
8
9
10
11
12
13
14
15
16
17
19:18
21:20
22
23
24
25
26
28:27
30:29
31
Description
PCI Device Function Number (0=pass-thru Voodoo2 Graphics only, 1=combo board with VGA dev #0 and Voodoo2 Graphics dev#1). Default value is the value of fb_addr_a[3] at the deassertion of pci_rst. Read only.
Wait state cycles for PCI write accesses (0=no ws, 1=one ws). Default is 1.
Reserved. Hardwired to 0. Read only. (old multi-CVG configuration detect)
Enable linear frame buffer reads (1=enable). Default is 0. This bit is included so that Voodoo2 Graphics potentially won’t hang the system during random reads during powerup.
Number of 32x32 video tiles in X/Horizontal dimension (bits 4:1). Default is 0x0. The 6-bit number of tiles in the X dimension is formed by {fbiInit1[24], fbiInit1[7:4], fbiInit6[30]}.
Video Timing Reset (0=run, 1=reset). Default is 1.
Software override of HSYNC/VSYNC (0=normal operation, 1=software override). Default is 0.
Software override HSYNC value. Default is 0.
Software override VSYNC value. Default is 0.
Software blanking enable (0=normal operation, 1=Always blank monitor). Default is 1.
Drive video timing data outputs (0=tristate, 1=drive outputs). Default is 0.
Drive video timing blank output (0=tristate, 1=drive output). Default is 0.
Drive video timing hsync/vsync outputs (0=tristate, 1=drive outputs). Default is 0.
Drive video timing dclk output (0=tristate, 1=drive output). Default is 0.
Video timing vclk input select (0=vid_clk_2x, 1=vid_clk_slave, 2=dac_data[16]). Input select is {fbiInit5[13], fbiInit1[17]}. Default is 0.
Vid_clk_2x delay select (0=no delay, 1=4 ns, 2=6 ns, 3=8 ns). Default is 0.
Video timing vclk source select (0=vid_clk_slave, 1=vid_clk_2x [divided by 2], 2,3=vid_clk_2x_sel). Default is 2.
Enable 24 Bits-per-pixel video output (1=enable). Default is 0.
Enable scan-line interleaving (1=enable). Default is 0.
Number of 32x32 video tiles in X/Horizontal dimension (bit 5). Default is 0x0. The 6-bit number of tiles in the X dimension is formed by {fbiInit1[24], fbiInit1[7:4], fbiInit6[30]}.
Enable video edge detection filtering (1=enable). Default is 0.
Invert vid_clk_2x (0=pass-thru vid_clk_2x, 1=invert vid_clk_2x). Default is 0.
Vid_clk_2x_sel delay select (0=no delay, 1=4 ns, 2=6 ns, 3=8 ns). Default is 0.
Vid_clk delay select (0=no delay, 1=4 ns, 2=6 ns, 3=8 ns). Default is 0.
Disable fast Read-Ahead-Write to Read-Ahead-Read turnaround (1=disable). Default is 0.

fbiInit2
Bit
0
1
3:2
4
5
6
7
8
10:9
19:11
20
21
22
31:23
Description
Disable video dither subtraction (1=disable). Default is 0x0.
DRAM banking configuration (0=128Kx16 banking, 1=256Kx16 banking)
reserved
Triple Buffering Enable (1=enable). Default is 0x0. Bit included for binary compatibility with Voodoo Graphics only. Use fbiInit5[10:9] for buffer memory allocation.
Enable fast RAS read cycles [bring RAS high early on reads] (1=enable). Default is 0x0.
Enable generated dram OE signal (1=enable). Default is 0x1.
Enable fast Read-Ahead -Write turnaround [bit(6) must be set]. (1=enable). Default is 0x0.
Enable pass-through dither mode [For 8 BPP apps only] (1=enable). Default is 0x0.
Swap buffer algorithm (0=based on dac_vsync, 1=based on dac_data[0], 2=based on pci_fifo_stall, 3=based on sli_syncin/sli_syncout). Default is 0x0.
Video Buffer Offset (=150 for 640x480, =247 for 832x608). Default is 0x0.
Enable DRAM banking (1=enable). Default is 0.
Enable DRAM Read Ahead FIFO (1=enable). Default is 0x0.
Refresh Enable (0=disable, 1=enable). Default is 0.
Refresh_Load Value. (Internal 14-bit counter 5 LSBs are 0x0). Default is 0x100.

fbiInit3
Bit
0
5:1
6
7
10:8
11
12
16:13
21:17
31:22
Description
Triangle register address remapping (0=use normal register mapping, 1=use aliased register mapping). [Alternate register mapping is used when fbiInit3(0)=1 and pci_address[21]=1]. Default is 0x0.
Video FIFO threshold. Default is 0x0.
Disable Texture Mapping (0=normal, 1=disable Trex-to-Chuck Interface). Default is 0x0.
reserved
Generic power-on strapping pins. Default value is the value of fb_addr_a[2:0] at the deassertion of pci_rst. Read only
VGA_PASS reset value. Default value is the value of fb_addr_a[4] at the deassertion of pci_rst. Read only
Hardcode PCI base address 0x10000000 (1=enable, 0=normal operation). Default value is the value of fb_addr_a[5] at the deassertion of pci_rst
fbi-to-trex bus clock delay selections (0-15). Default is 0x2.
trex-to-fbi bus FIFO full threshold (0-31). Default is 0xf.
Y Origin Swap subtraction value (10 bits). Default is 0x0.

fbiInit4
Bit
0
1
7:2
17:8
27:18
29
31:29
Description
Wait state cycles for PCI read accesses (0=1 ws, 1=2 ws). Default is 1.
Enable Read-ahead logic for linear frame buffer reads (1=enable). Default is 0.
Memory FIFO low water mark for PCI FIFO. [Dump PCI FIFO contents to memory if PCI FIFO freespace falls below this level]. Default is 0.
Memory FIFO row start (base row address for beginning of memory FIFO). Default is 0.
Memory FIFO row rollover (row value when FIFO counters rollover). Default is 0.
reserved
Video clocking delay control (Chuck revision 5 only). Default is 0.

fbiInit5
Bit
0
1
2
3
4
8:5
10:9
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
29:28
31:30
Description
Disable pci_stop functionality (0=normal operation, 1=disable pci_stop). Default value is the value of fb_addr_b[0] at the deassertion of pci_rst.
PCI Slave device is 66 MHz capable (0=33 MHz capable, 1=66 MHz capable). Default value is the value of fb_addr_b[1] at the deassertion of pci_rst. Read only.
dac_data output width (0=16-bit, 1=24-bit). Default value is the value of fb_addr_b[2] at the deassertion of pci_rst. Read only.
dac_data[17]/GPIO_0 output value (dac_data[17] is only driven when fb_addr_b[2]=0 at the deassertion of pci_rst). Default value is the value of fb_addr_b[3] at the deassertion of pci_rst.
dac_data[18]/GPIO_1 control. (dac_data[18] is only driven when fb_addr_b[2]=0 at the deassertion of pci_rst). GPIO_1 is controlled by fbiInit5[4] and fbiInit5[27]. When fbiInit5[27]=0, then GPIO_1 is driven with the input value of dac_data[23]/GPIO_3. When fbiInit5[27]=1, then GPIO_1 is driven with the value specified by fbiInit5[4]. Default value of fbiInit5[4] is the value of fb_addr_b[4] at the deassertion of pci_rst.
Generic power-on strapping pins. Default value is the value of fb_addr_b[8:5] at the deassertion of pci_rst. Read only
Color/Aux buffer memory allocation (0=2 color buffers/1 aux buffer, 1=3 color buffers/0 aux buffers, 2=3 color buffers/1 aux buffer, 3=reserved). Default is 0x0.
Drive vid_clk_slave output (0=tristate, 1=drive output). Default is 0.
Drive dac_data[16] output (0=tristate, 1=drive output). Do not set to 1 when 24-bit dac data output is enabled (fbiInit5[25]=1).
Video timing vclk input select (0=vid_clk_2x, 1=vid_clk_slave, 2=dac_data[16]). Input select is {fbiInit5[13], fbiInit1[17]}. Default is 0.
Multi-CVG configuration detect (0=one Voodoo2 Graphics configuration, 1=two Voodoo2 Graphics configuration). Default value is the value of sli_syncin at the deassertion of pci_rst. Read only.
Synchronize reads from hRetrace and vRetrace registers across video clock boundry (1=enable). Default is 0.
Horizontal border color enable, right edge (1=enable). Default is 0.
Horizontal border color enable, left edge (1=enable). Default is 0.
Vertical border color enable, bottom edge (1=enable). Default is 0.
Vertical border color enable, top edge (1=enable). Default is 0.
Scan double video out in horizontal dimension (1=enable). Default is 0.
Scan double video out in vertical dimension (1=enable). Default is 0.
Enable gamma correction for 16-bit video output (1=enable). Default is 0.
Invert dac_hsync output to dac (0= hsync is active low, 1=hsync is active high). Default is 0.
Invert dac_vsync output to dac (0= vsync is active low, 1=vsync is active high). Default is 0.
Enable full 24-bit dac_data[23:0] output (1=enable, 0=double-pump 24-bit data on dac_data[15:0]). Default is 0.
Interlaced video output (1=enable). Default is 0.
dac_data[18]/GPIO_1 control. (dac_data[18] is only driven when fb_addr_b[2]=0 at the deassertion of pci_rst). GPIO_1 is controlled by fbiInit5[4] and fbiInit5[27]. When fbiInit5[27]=0, then GPIO_1 is driven with the input value of dac_data[23]/GPIO_3. When fbiInit5[27]=1, then GPIO_1 is driven with the value specified by fbiInit5[4]. The default value of fbiInit5[27] is 0.
reserved. Default is 0x0.
Triangle rasterization unit mode control. Default is 0x0.

fbiInit6
Bit
2:0
7:3
8
10:9
12:11
14:13
16:15
18:17
20:19
27:21
29:28
30
31
Description
Video window active counter. Used when swap algorithm is 0x1 or 0x2 (fbiInit2[10:9]=0x1 or 0x2). Default is 0x0.
Video window drag counter. Used when swap algorithm is 0x1 or 0x2 (fbiInit2[10:9]=0x1 or 0x2). Default is 0x0.
Scanline Interleave sync master (0=Slave, 1=Master). Used when swap algorithm is 0x3 (fbiInit2[10:9]=0x3). Default is 0x0.
dac_data[22]/GPIO_2 output value (0,1=tristate, 2=drive 0, 3=drive 1). dac_data[22] is only controlled by fbiInit6[10:9] when fb_addr_b[2]=0 at the deassertion of pci_rst. Default value is 0x0. Reading fbiInit6[10] or fbiInit6[9] returns the logic value present on the dac_data[22] signal pin.
dac_data[23]/GPIO_3 output value (0,1=tristate, 2=drive 0, 3=drive 1). dac_data[23] is only controlled by fbiInit6[12:11] when fb_addr_b[2]=0 at the deassertion of pci_rst. Default value is 0x0. Reading fbiInit6[12] or fbiInit6[11] returns the logic value present on the dac_data[23] signal pin.
sli_syncin output value (0,1=tristate, 2=drive 0, 3=drive 1). Default is 0x0. Reading fbiInit6[15] or fbiInit6[14] returns the logic value present on the sli_syncin signal pin.
sli_syncout output value (0=internal sli_syncout signal, 1=tristate, 2=drive 0, 3=drive 1). Default is 0x0. Reading fbiInit6[16] or fbiInit6[15] returns the logic value present on the sli_syncout signal pin.
dac_rd output value (0=internal dac_rd signal, 1=tristate, 2=drive 0, 3=drive 1). Default is 0x0. Reading fbiInit6[18] or fbiInit6[17] returns the logic value present on the dac_rd signal pin.
dac_wr output value (0=internal dac_wr signal, 1=tristate, 2=drive 0, 3=drive 1). Default is 0x0. Reading fbiInit6[20] or fbiInit6[19] returns the logic value present on the dac_wr signal pin.
PCI FIFO Empty Entries Low Water Mark used to generate pci_fifo_rdy_n (output on dac_data[21]). Valid values are 0-64. Default is 0x0.
vga_pass_n output value (0,1=internal vga_pass_n signal, 2=drive 0, 3=drive 1). Default is 0x0. vga_pass_n is only driven when fb_addr_b[2]=0 at the deassertion of pci_rst).
Number of 32x32 video tiles in the X/Horizontal dimension (bit 0). Default is 0x0. The 6-bit number of tiles in the X dimension is formed by {fbiInit1[24], fbiInit1[7:4], fbiInit6[30]}.
reserved

fbiInit7
Bit
7:0
8
9
10
15:11
16
17
18
19
26:20
27
Description
Generic power-on strapping pins. Default value is the value of fb_data[63:56] at the deassertion of pci_rst. Read only
CMDFIFO enable (1=enable). Default is 0. Note: fbiinit7 bit(8) is mutually exclusive with fbiinit0 bit(13) (memory FIFO enable).
CMDFIFO offscreen memory store (0=execute CMDFIFO stream out of internal FIFOs only, 1=execute CMDFIFO using offscreen memory). Default is 0.
Disable internal CMDFIFO hole counting logic (1=disable). Default is 0. If set, requires software to manually “bump” the CMDFIFO depth with writes to the cmdFifoDepth register
CMDFIFO read fetch threshold (range 0-31). Default is 0.
Synchronize writes to CMDFIFO registers across graphics clock boundry (1=enable). Default is 0.
Synchronize reads from CMDFIFO registers across graphics clock boundry (1=enable). Default is 0.
Reset PCI packer (0=normal operation, 1=reset PCI packer). Default is 0.
Enable chromaKey and chromaRange writes to Bruce (1=enable). Default is 0.
CMDFIFO PCI timeout counter value (range 0-127). Default is 0x0.
Enable bursting of consecutive texture memory writes across FT Bus (1=enable). Default is 0.

cmdFifoBaseAddr
Bit
9:0
15:10
25:16
Description
CMDFIFO base address, specified in pages (row address). Default is 0x0.
reserved
CMDFIFO end address, specified in pages (row address). Default is 0x0.

cmdFifoBump
Bit
15:0
Description
Internal CMDFIFO bump register

cmdFifoRdPtr
Bit
31:0
Description
Internal CMDFIFO read pointer

cmdFifoAMin
Bit
31:0
Description
Internal CMDFIFO minimum address register

cmdFifoAMax
Bit
31:0
Description
Internal CMDFIFO maximum address register

cmdFifoDepth
Bit
15:0
Description
Internal CMDFIFO depth register

cmdFifoHoles
Bit
15:0
Description
Internal CMDFIFO number of holes register

clutData
Bit
7:0
15:8
23:16
29:24
Description
Blue color component to be written to video Color Lookup Table
Green color component to be written to video Color Lookup Table
Red color component to be written to video Color Lookup Table
Index of video Color Lookup Table to be written (Range 0-32 only).

dacData
Bit
7:0
10:8
11
13:12
Description
External DAC register write data
External DAC register address, bits(2:0)
External DAC read command (1=read external DAC, 0=write external DAC)
External DAC register address, bits(4:3)

sSetupMode
Bit
0
1
2
3
4
5
6
7
15:8
16
17
18
19
Description
Setup Red, Green, and Blue
Setup Alpha
Setup Z
Setup Wb
Setup W0
Setup S0 and T0
Setup W1
Setup S1 and T1
reserved
Strip mode (0=strip, 1=fan)
Enable Culling (0=disable, 1=enable)
Culling Sign (0=positive sign, 1=negative sign)
Disable ping pong sign correction during triangle strips (0=normal, 1=disable)

sVx
Bit
31:0
Description
Vertex coordinate information (IEEE 32 bit single-precision floating point format)

sVy
Bit
31:0
Description
Vertex coordinate information (IEEE 32 bit single-precision floating point format)

sARGB
Bit
31:24
23:16
15:8
7:0
Description
Alpha Color
Red Color
Green Color
Blue Color

sS/W0
Bit
31:0
Description
Texture S coordinate (IEEE 32 bit single-precision floating point format)

sT/W0
Bit
31:0
Description
Texture T coordinate (IEEE 32 bit single-precision floating point format)

sVz
Bit
31:0
Description
Vertex coordinate information (IEEE 32 bit single-precision floating point format)

sWtmu0
Bit
31:0
Description
Texture local 1/W. (IEEE 32 bit single-precision floating point format)

sWtmu1
Bit
31:0
Description
Texture local 1/W. (IEEE 32 bit single-precision floating point format)

sS/Wtmu1
Bit
31:0
Description
Texture local 1/W. (IEEE 32 bit single-precision floating point format)

sT/Wtmu1
Bit
31:0
Description
Texture local 1/W. (IEEE 32 bit single-precision floating point format)

sAlpha
Bit
31:0
Description
Alpha value at vertex (0.0 - 255.0). (IEEE 32 bit single-precision floating point format)

sRed
Bit
31:0
Description
Red value at vertex (0.0 - 255.0). (IEEE 32 bit single-precision floating point format)

sGreen
Bit
31:0
Description
Green value at vertex (0.0 - 255.0). (IEEE 32 bit single-precision floating point format)

sBlue
Bit
31:0
Description
Blue value at vertex (0.0 - 255.0). (IEEE 32 bit single-precision floating point format)

sDrawTriCMD
Bit
0
Description
Draw triangle

sBeginTriCMD
Bit
0
Description
Begin New triangle

textureMode
Bit
0
1
2
3
4
5
6
7
11:8
12
13
16:14
17
18
19
20
21
22
25:23
26
27
28
29
30
31
Name
tpersp_st
tminfilter
tmagfilter
tclampw
tloddither
tnccselect
tclamps
tclampt
tformat
tc_zero_other
tc_sub_clocal
tc_mselect
tc_reverse_blend
tc_add_clocal
tc_add_alocal
tc_invert_output
tca_zero_other
tca_sub_clocal
tca_mselect
tca_reverse_blend
tca_add_clocal
tca_add_alocal
tca_invert_output
trilinear
seq_8_downld
Description
Enable perspective correction for S and T iterators (0=linear interploation of S,T, force W to 1.0, 1=perspective correct, S/W, T/W)
Texture minification filter (0=point-sampled, 1=bilinear)
Texture magnification filter (0=point-sampled, 1=bilinear)
Clamp when W is negative (0=disabled, 1=force S=0, T=0 when W is negative)
Enable Level-of-Detail dithering (0=no dither, 1=dither)
Narrow Channel Compressed (NCC) Table Select (0=table 0, 1=table 1)
Clamp S Iterator (0=wrap, 1=clamp)
Clamp T Iterator (0=wrap, 1=clamp)
Texture format (see table below)
Zero Other (0=c_other, 1=zero)
Subtract Color Local (0=zero, 1=c_local)
Mux Select (0=zero, 1=c_local, 2=a_other, 3=a_local, 4=LOD, 5=LOD_frac, 6-7=reserved)
Reverse Blend (0=normal blend, 1=reverse blend)
Add Color Local
Add Alpha Local
Invert Output
Zero Other (0=c_other, 1=zero)
Subtract Color Local (0=zero, 1=c_local)
Mux Select (0=zero, 1=c_local, 2=a_other, 3=a_local, 4=LOD, 5=LOD_frac, 6-7=reserved)
Reverse Blend (0=normal blend, 1=reverse blend)
Add Color Local
Add Alpha Local
Invert Output
Enable trilinear texture mapping (0=point-sampled/bilinear, 1=trilinear)
Sequential 8-bit download (0=even 32-bit word addresses, 1=sequential addresses)

tLOD
Bit
5:0
11:6
17:12
18
19
20
22:21
23
24
25
26
27
Name
lodmin
lodmax
lodbias
lod_odd
lod_tsplit
lod_s_is_wider
lod_aspect
lod_zerofrac
tmultibaseaddr
tdata_swizzle
tdata_swap
tdirect_write
Description
Minimum LOD. (4.2 unsigned)
Maximum LOD. (4.2 unsigned)
LOD Bias. (4.2 signed)
LOD odd (0=even, 1=odd)
Texture is Split. (0=texture contains all LOD levels, 1=odd or even levels only, as controlled by lod_odd)
S dimension is wider, for rectilinear texture maps. This is a don’t care for square textures. (1=S is wider than T).
Aspect ratio. Equal to 2^n. (00 is square texture, others are rectilinear: 01 is 2x1/1x2, 10 is 4x1/1x4, 10 is 8x1/1x8)
LOD zero frac, useful for bilinear when even and odd levels are split across two Bruces (0=normal LOD frac, 1=force fraction to 0)
Use multiple texbaseAddr registers
Byte swap incoming texture data (bytes 0<->3, 1<->2).
Short swap incoming texture data (shorts 0<->1).
Enable raw direct texture memory writes (1=enable). seq_8_downld must equal 0.

tDetail
Bit
7:0
13:8
16:14
17
18
19
20
21
Name
detail _max
detail_bias
detail_scale
rgb_tminfilter
rgb_tmagfilter
a_tminfilter
a_tmagfilter
rgb_a_separate_filter
Description
Detail texture LOD clamp (8.0 unsigned)
Detail texture bias (6.0 signed)
Detail texture scale shift left
RGB texture minification filter (0=point-sampled, 1=bilinear)
RGB texture magnification filter (0=point-sampled, 1=bilinear)
Alpha texture minification filter (0=point-sampled, 1=bilinear)
Alpha texture magnification filter (0=point-sampled, 1=bilinear)
0=tminfilter and tmagfilter (in textureMode) define the filter for RGBA 1=rgb_tminfilter/rgb_tmagfilter define the filter for RGB and a_tminfilter/a_tmagfilter define the filter for Alpha

texBaseAddr, texBaseAddr1, texBaseAddr2, and texBaseAddr38
Bit
18:0
18:0
18:0
18:0
Name
texbaseaddr
texbaseaddr1
texbaseaddr2
texbaseaddr38
Description
Texture Memory Base Address, tmultibaseaddr==0 or LODBI==0
Texture Memory Base Address, tmultibaseaddr==1 and LODBI==1
Texture Memory Base Address, tmultibaseaddr==1 and LODBI==2
Texture Memory Base Address, tmultibaseaddr==1 and LODBI>=3
