32 lines
1.4 KiB
Plaintext
32 lines
1.4 KiB
Plaintext
only in sh2:
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only in sh4: (26 new instructions)
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SHAD Rm,Rn When Rn ≥ 0, Rn << Rm → Rn When Rn < 0, Rn >> Rm → [MSB → Rn]
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SHLD Rm,Rn When Rn ≥ 0, Rn << Rm → Rn When Rn < 0, Rn >> Rm → [0 → Rn]
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LDC Rm,SSR Rm → SSR
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LDC Rm,SPC Rm → SPC
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LDC Rm,DBR Rm → DBR
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LDC Rm,Rn_BANK Rm → Rn_BANK (n = 0 to 7)
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LDC.L @Rm+,SSR (Rm) → SSR, Rm + 4 → Rm
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LDC.L @Rm+,SPC (Rm) → SPC, Rm + 4 → Rm
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LDC.L @Rm+,DBR (Rm) → DBR, Rm + 4 → Rm
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LDC.L @Rm+,Rn_BANK (Rm) → Rn_BANK, Rm + 4 → Rm
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LDTLB PTEH/PTEL → TLB
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MOVCA.L R0,@Rn R0 → (Rn) (without fetching cache block)
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OCBI @Rn Invalidates operand cache block
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OCBP @Rn Writes back and invalidates operand cache block
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OCBWB @Rn Writes back operand cache block
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PREF @Rn (Rn) → operand cache
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STC SSR,Rn SSR → Rn
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STC SPC,Rn SPC → Rn
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STC SGR,Rn SGR → Rn
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STC DBR,Rn DBR → Rn
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STC Rm_BANK,Rn Rm_BANK → Rn (m = 0 to 7)
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STC.L SSR,@-Rn Rn – 4 → Rn, SSR → (Rn)
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STC.L SPC,@-Rn Rn – 4 → Rn, SPC → (Rn)
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STC.L SGR,@-Rn Rn – 4 → Rn, SGR → (Rn)
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STC.L DBR,@-Rn Rn – 4 → Rn, DBR → (Rn)
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STC.L Rm_BANK,@-Rn Rn – 4 → Rn, Rm_BANK → (Rn) (m = 0 to 7)
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floating point:
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