These changes fix logical consistency and correctness issues with the instruction definitions as printed in the manual. The most serious issues were: - div0u/div0s/div1 use `m` as a temporary variable which contradicts the existence of the `m` register number - missing semicolons - inconsistent references to immediate and displacement variable names
7 lines
178 B
Plaintext
7 lines
178 B
Plaintext
0101nnnnmmmmdddd
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disp ← ZeroExtend4(d) << 2;
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op2 ← SignExtend32(Rm);
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address ← ZeroExtend32(disp + op2);
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op3 ← SignExtend32(ReadMemory32(address));
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Rn ← Register(op3);
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