Zack Buhman
4dd67c7204
These changes fix logical consistency and correctness issues with the instruction definitions as printed in the manual. The most serious issues were: - div0u/div0s/div1 use `m` as a temporary variable which contradicts the existence of the `m` register number - missing semicolons - inconsistent references to immediate and displacement variable names
9 lines
230 B
Plaintext
9 lines
230 B
Plaintext
1101nnnndddddddd
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pc ← SignExtend32(PC);
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disp ← ZeroExtend8(d) << 2;
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IF (IsDelaySlot())
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THROW ILLSLOT;
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address ← ZeroExtend32(disp + ((pc + 4) ∧ (~ 0x3)));
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op2 ← SignExtend32(ReadMemory32(address));
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Rn ← Register(op2);
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