Zack Buhman
4dd67c7204
These changes fix logical consistency and correctness issues with the instruction definitions as printed in the manual. The most serious issues were: - div0u/div0s/div1 use `m` as a temporary variable which contradicts the existence of the `m` register number - missing semicolons - inconsistent references to immediate and displacement variable names
13 lines
298 B
Plaintext
13 lines
298 B
Plaintext
0100mmmm01100110
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sr ← ZeroExtend32(SR);
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op1 ← SignExtend32(Rm);
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IF (FpuIsDisabled(sr) AND IsDelaySlot())
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THROW SLOTFPUDIS;
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IF (FpuIsDisabled(sr))
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THROW FPUDIS;
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address ← ZeroExtend32(op1);
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value ← ReadMemory32(address);
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op1 ← op1 + 4;
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Rm ← Register(op1);
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FPSCR ← ZeroExtend32(value);
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