Zack Buhman
4dd67c7204
These changes fix logical consistency and correctness issues with the instruction definitions as printed in the manual. The most serious issues were: - div0u/div0s/div1 use `m` as a temporary variable which contradicts the existence of the `m` register number - missing semicolons - inconsistent references to immediate and displacement variable names
19 lines
405 B
Plaintext
19 lines
405 B
Plaintext
0011nnnnmmmm0100
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q ← ZeroExtend1(Q);
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_m ← ZeroExtend1(M);
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t ← ZeroExtend1(T);
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op1 ← ZeroExtend32(SignExtend32(Rm));
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op2 ← ZeroExtend32(SignExtend32(Rn));
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oldq ← q;
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q ← op2< 31 FOR 1 >;
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op2 ← ZeroExtend32(op2 << 1) ∨ t;
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IF (oldq = _m)
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op2 ← op2 - op1;
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ELSE
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op2 ← op2 + op1;
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q ← (q ⊕ _m) ⊕ op2< 32 FOR 1 >;
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t ← 1 - (q ⊕ _m);
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Rn ← Register(op2);
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Q ← Bit(q);
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T ← Bit(t);
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