Zack Buhman
4dd67c7204
These changes fix logical consistency and correctness issues with the instruction definitions as printed in the manual. The most serious issues were: - div0u/div0s/div1 use `m` as a temporary variable which contradicts the existence of the `m` register number - missing semicolons - inconsistent references to immediate and displacement variable names
14 lines
275 B
Plaintext
14 lines
275 B
Plaintext
10001111dddddddd
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t ← ZeroExtend1(T);
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pc ← SignExtend32(PC);
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delayedpc ← SignExtend32(PC’’);
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label ← SignExtend8(d) << 1;
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IF (IsDelaySlot())
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THROW ILLSLOT;
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IF (t = 0)
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{
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temp ← ZeroExtend32(pc + 4 + label);
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delayedpc ← temp;
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}
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PC’’ ← Register(delayedpc);
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