sh-dis/c/Makefile
Zack Buhman 3209054b8f decode: implement PR- and SZ- instruction decode discrimination
Some SH4 floating point instructions have ambiguous encodings that
depend on the state of FPSCR bits. Exhaustively, these are:

    FMOV XDm,DRn              (sz 1)
    FMOV FRm,FRn              (sz 0)

    FMOV DRm,@(R0,Rn)         (sz 1)
    FMOV.S FRm,@(R0,Rn)       (sz 0)

    FCMP/EQ DRm,DRn           (pr 1)
    FCMP/EQ FRm,FRn           (pr 0)

    FMOV @Rm+,XDn             (sz 1)
    FMOV.S @Rm+,FRn           (sz 0)

    FMOV XDm,@(R0,Rn)         (sz 1)
    FMOV.S FRm,@(R0,Rn)       (sz 0)

    FMUL DRm,DRn              (pr 1)
    FMUL FRm,FRn              (pr 0)

    FMOV.S @Rm+,FRn           (sz 0)
    FMOV @Rm+,DRn             (sz 1)

    FLOAT FPUL,DRn            (pr 1)
    FLOAT FPUL,FRn            (pr 0)

    FNEG DRn                  (pr 1)
    FNEG FRn                  (pr 0)

    FTRC DRm,FPUL             (pr 1)
    FTRC FRm,FPUL             (pr 0)

    FMOV.S @(R0,Rm),FRn       (sz 0)
    FMOV @(R0,Rm),DRn         (sz 1)

    FMOV.S @Rm,FRn            (sz 0)
    FMOV @Rm,DRn              (sz 1)

    FMOV XDm,XDn              (sz 1)
    FMOV FRm,FRn              (sz 0)

    FABS FRn                  (pr 0)
    FABS DRn                  (pr 1)

    FMOV.S FRm,@Rn            (sz 0)
    FMOV DRm,@Rn              (sz 1)

    FSUB DRm,DRn              (pr 1)
    FSUB FRm,FRn              (pr 0)

    FDIV DRm,DRn              (pr 1)
    FDIV FRm,FRn              (pr 0)

    FCMP/GT DRm,DRn           (pr 1)
    FCMP/GT FRm,FRn           (pr 0)

    FMOV DRm,DRn              (sz 1)
    FMOV FRm,FRn              (sz 0)

    FMOV.S FRm,@-Rn           (sz 0)
    FMOV DRm,@-Rn             (sz 1)

    FADD DRm,DRn              (pr 1)
    FADD FRm,FRn              (pr 0)

    FMOV.S FRm,@Rn            (sz 0)
    FMOV XDm,@Rn              (sz 1)

    FMOV.S @(R0,Rm),FRn       (sz 0)
    FMOV @(R0,Rm),XDn         (sz 1)

    FMOV DRm,XDn              (sz 1)
    FMOV FRm,FRn              (sz 0)

    FMOV XDm,@-Rn             (sz 1)
    FMOV.S FRm,@-Rn           (sz 0)

    FSQRT DRn                 (pr 1)
    FSQRT FRn                 (pr 0)

    FMOV.S @Rm,FRn            (sz 0)
    FMOV @Rm,XDn              (sz 1)

This commit automatically calculates which FPU instructions require
FPSCR-discrimination, and automatically inserts the appropriate
conditional logic in the instruction decoder.
2024-04-26 18:51:01 +08:00

48 lines
811 B
Makefile

DEBUG = -g -gdwarf-4
AFLAGS += --fatal-warnings
CFLAGS += -falign-functions=4 -ffunction-sections -fdata-sections -fshort-enums
CFLAGS += -Wall -Werror -Wfatal-errors -Wno-dangling-else
CFLAGS += -std=c2x
DEPFLAGS = -MMD -MP
SOFTFLOAT ?= ../../SoftFloat-3e
SOFTFLOAT_A ?= $(SOFTFLOAT)/build/Linux-x86_64-GCC/softfloat.a
SOFTFLOAT_I ?= $(SOFTFLOAT)/source/include
CFLAGS += -I$(SOFTFLOAT_I)
CC = $(TARGET)gcc
OBJS = \
decode_execute.o \
decode_print.o \
exception.o \
execute.o \
impl.o \
main.o \
ram.o \
$(SOFTFLOAT_A)
all: main
%.o: %.c
$(CC) $(CARCH) $(CFLAGS) $(OPT) $(DEBUG) $(DEPFLAGS) -MF ${<}.d -c $< -o $@
main: $(OBJS)
$(CC) $^ -o $@
-include $(shell find -type f -name '*.d')
.SUFFIXES:
.INTERMEDIATE:
.SECONDARY:
.PHONY: all clean
%: RCS/%,v
%: RCS/%
%: %,v
%: s.%
%: SCCS/s.%