540 lines
13 KiB
C
540 lines
13 KiB
C
#pragma once
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#include <assert.h>
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#include <softfloat.h>
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#include "status_bits.h"
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/* floating point */
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static inline struct fpscr_bits _fpscr_bits(uint32_t fpscr)
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{
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union {
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struct fpscr_bits bits;
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uint32_t value;
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} fpscr_union;
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fpscr_union.value = fpscr;
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return fpscr_union.bits;
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}
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static inline bool fpu_flag_i(uint32_t fps)
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{
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return _fpscr_bits(fps).flag_inexact;
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}
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static inline bool fpu_flag_u(uint32_t fps)
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{
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return _fpscr_bits(fps).flag_underflow;
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}
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static inline bool fpu_flag_o(uint32_t fps)
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{
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return _fpscr_bits(fps).flag_overflow;
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}
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static inline bool fpu_flag_z(uint32_t fps)
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{
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return _fpscr_bits(fps).flag_divide_by_zero;
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}
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static inline bool fpu_flag_v(uint32_t fps)
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{
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return _fpscr_bits(fps).flag_invalid;
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}
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static inline bool fpu_cause_i(uint32_t fps)
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{
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return _fpscr_bits(fps).cause_inexact;
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}
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static inline bool fpu_cause_u(uint32_t fps)
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{
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return _fpscr_bits(fps).cause_underflow;
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}
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static inline bool fpu_cause_o(uint32_t fps)
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{
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return _fpscr_bits(fps).cause_overflow;
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}
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static inline bool fpu_cause_z(uint32_t fps)
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{
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return _fpscr_bits(fps).cause_divide_by_zero;
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}
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static inline bool fpu_cause_v(uint32_t fps)
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{
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return _fpscr_bits(fps).cause_invalid;
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}
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static inline bool fpu_cause_e(uint32_t fps)
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{
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return _fpscr_bits(fps).cause_fpu_error;
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}
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static inline bool fpu_enable_i(uint32_t fps)
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{
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return _fpscr_bits(fps).enable_inexact;
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}
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static inline bool fpu_enable_u(uint32_t fps)
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{
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return _fpscr_bits(fps).enable_underflow;
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}
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static inline bool fpu_enable_o(uint32_t fps)
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{
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return _fpscr_bits(fps).enable_overflow;
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}
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static inline bool fpu_enable_z(uint32_t fps)
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{
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return _fpscr_bits(fps).enable_divide_by_zero;
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}
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static inline bool fpu_enable_v(uint32_t fps)
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{
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return _fpscr_bits(fps).enable_invalid;
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}
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static inline void update_fpscr(uint32_t * fps)
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{
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struct fpscr_bits * fpscr = (struct fpscr_bits *)fps;
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bool inexact = (softfloat_exceptionFlags & softfloat_flag_inexact) != 0;
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bool underflow = (softfloat_exceptionFlags & softfloat_flag_underflow) != 0;
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bool overflow = (softfloat_exceptionFlags & softfloat_flag_overflow) != 0;
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bool infinite = (softfloat_exceptionFlags & softfloat_flag_infinite) != 0;
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bool invalid = (softfloat_exceptionFlags & softfloat_flag_invalid) != 0;
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fpscr->flag_inexact |= inexact;
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fpscr->flag_underflow |= underflow;
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fpscr->flag_overflow |= overflow;
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fpscr->flag_divide_by_zero |= infinite;
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fpscr->flag_invalid |= invalid;
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fpscr->cause_inexact = inexact;
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fpscr->cause_underflow = underflow;
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fpscr->cause_overflow = overflow;
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fpscr->cause_divide_by_zero = infinite;
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fpscr->cause_invalid = invalid;
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}
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static inline void set_rounding_mode(uint32_t * fps)
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{
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struct fpscr_bits * fpscr = (struct fpscr_bits *)fps;
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switch (fpscr->rm) {
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case 0b00:
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softfloat_roundingMode = softfloat_round_near_even;
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break;
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case 0b01:
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softfloat_roundingMode = softfloat_round_minMag;
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break;
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default:
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// undefined rounding mode
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break;
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}
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}
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static inline bool is_nan_f32(float32_t a)
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{
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bool exp = (a.v & 0x7f800000) == 0x7f800000;
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bool sig = (a.v & 0x007fffff) != 0;
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return exp & sig;
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}
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static inline bool is_denormal_f32(float32_t a)
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{
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bool exp = (a.v & 0x7f800000) == 0x00000000;
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bool sig = (a.v & 0x007fffff) != 0;
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return exp & sig;
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}
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static inline float32_t flush_to_zero_f32(float32_t a)
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{
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return (float32_t){ a.v & 0x80000000 };
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}
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static inline bool dn_f32_f32_f32(float32_t * a, float32_t * b, float32_t * c, uint32_t * fps)
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{
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struct fpscr_bits * fpscr = (struct fpscr_bits *)fps;
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switch (fpscr->dn) {
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case 0:
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/*
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* an FPU error is signaled if FPSCR.DN is zero, neither input is
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* a NaN and either input is a denormalized number.
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*/
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if ((!is_nan_f32(*a)) && (!is_nan_f32(*b)) && (!is_nan_f32(*c))) { // neither input is a NaN
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if (is_denormal_f32(*a) || is_denormal_f32(*b) || is_denormal_f32(*c)) { // either input is denormalized
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fpscr->cause_fpu_error = 1;
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return true; // do not continue
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}
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}
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return false;
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case 1:
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/*
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* When FPSCR.DN is 1, a positive denormalized number is treated as
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* +0 and a negative denormalized number as -0. This flush-to-zero
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* treatment is applied before exception detection and special case
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* handling.
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*/
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if (is_denormal_f32(*a)) *a = flush_to_zero_f32(*a);
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if (is_denormal_f32(*b)) *b = flush_to_zero_f32(*b);
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if (is_denormal_f32(*c)) *c = flush_to_zero_f32(*c);
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return false;
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default:
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assert(false);
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}
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}
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static inline bool dn_f32_f32(float32_t * a, float32_t * b, uint32_t * fps)
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{
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struct fpscr_bits * fpscr = (struct fpscr_bits *)fps;
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switch (fpscr->dn) {
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case 0:
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/*
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* an FPU error is signaled if FPSCR.DN is zero, neither input is
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* a NaN and either input is a denormalized number.
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*/
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if ((!is_nan_f32(*a)) && (!is_nan_f32(*b))) { // neither input is a NaN
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if (is_denormal_f32(*a) || is_denormal_f32(*b)) { // either input is denormalized
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fpscr->cause_fpu_error = 1;
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return true; // do not continue
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}
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}
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return false;
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case 1:
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/*
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* When FPSCR.DN is 1, a positive denormalized number is treated as
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* +0 and a negative denormalized number as -0. This flush-to-zero
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* treatment is applied before exception detection and special case
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* handling.
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*/
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if (is_denormal_f32(*a)) *a = flush_to_zero_f32(*a);
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if (is_denormal_f32(*b)) *b = flush_to_zero_f32(*b);
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return false;
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default:
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assert(false);
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}
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}
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static inline bool dn_f32(float32_t * a,uint32_t * fps)
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{
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struct fpscr_bits * fpscr = (struct fpscr_bits *)fps;
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switch (fpscr->dn) {
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case 0:
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/*
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* an FPU error is signaled if FPSCR.DN is zero, neither input is
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* a NaN and either input is a denormalized number.
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*/
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if (is_denormal_f32(*a)) { // either input is denormalized
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fpscr->cause_fpu_error = 1;
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return true; // do not continue
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}
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return false;
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case 1:
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/*
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* When FPSCR.DN is 1, a positive denormalized number is treated as
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* +0 and a negative denormalized number as -0. This flush-to-zero
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* treatment is applied before exception detection and special case
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* handling.
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*/
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if (is_denormal_f32(*a)) *a = flush_to_zero_f32(*a);
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return false;
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default:
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assert(false);
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}
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}
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static inline bool is_nan_f64(float64_t a)
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{
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bool exp = (a.v & 0x7ff00000'00000000) == 0x7ff00000'00000000;
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bool sig = (a.v & 0x000fffff'ffffffff) != 0;
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return exp & sig;
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}
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static inline bool is_denormal_f64(float64_t a)
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{
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bool exp = (a.v & 0x7ff00000'00000000) == 0x00000000'00000000;
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bool sig = (a.v & 0x000fffff'ffffffff) != 0;
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return exp & sig;
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}
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static inline float64_t flush_to_zero_f64(float64_t a)
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{
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return (float64_t){ a.v & 0x80000000'00000000 };
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}
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static inline bool dn_f64_f64(float64_t * a, float64_t * b, uint32_t * fps)
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{
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struct fpscr_bits * fpscr = (struct fpscr_bits *)fps;
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switch (fpscr->dn) {
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case 0:
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/*
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* an FPU error is signaled if FPSCR.DN is zero, neither input is
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* a NaN and either input is a denormalized number.
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*/
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if ((!is_nan_f64(*a)) && (!is_nan_f64(*b))) { // neither input is a NaN
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if (is_denormal_f64(*a) || is_denormal_f64(*b)) { // either input is denormalized
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fpscr->cause_fpu_error = 1;
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return true; // do not continue
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}
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}
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return false;
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case 1:
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/*
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* When FPSCR.DN is 1, a positive denormalized number is treated as
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* +0 and a negative denormalized number as -0. This flush-to-zero
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* treatment is applied before exception detection and special case
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* handling.
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*/
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if (is_denormal_f64(*a)) *a = flush_to_zero_f64(*a);
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if (is_denormal_f64(*b)) *b = flush_to_zero_f64(*b);
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return false;
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default:
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assert(false);
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}
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}
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static inline bool dn_f64(float64_t * a, uint32_t * fps)
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{
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struct fpscr_bits * fpscr = (struct fpscr_bits *)fps;
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switch (fpscr->dn) {
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case 0:
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/*
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* an FPU error is signaled if FPSCR.DN is zero, neither input is
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* a NaN and either input is a denormalized number.
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*/
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if (is_denormal_f64(*a)) { // either input is denormalized
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fpscr->cause_fpu_error = 1;
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return true; // do not continue
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}
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return false;
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case 1:
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/*
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* When FPSCR.DN is 1, a positive denormalized number is treated as
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* +0 and a negative denormalized number as -0. This flush-to-zero
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* treatment is applied before exception detection and special case
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* handling.
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*/
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if (is_denormal_f64(*a)) *a = flush_to_zero_f64(*a);
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return false;
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default:
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assert(false);
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}
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}
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static inline void fadd_s(float32_t op1, float32_t * op2, uint32_t * fps)
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{
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if (dn_f32_f32(&op1, op2, fps)) return;
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set_rounding_mode(fps);
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*op2 = f32_add(op1, *op2);
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update_fpscr(fps);
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}
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static inline void fadd_d(float64_t op1, float64_t * op2, uint32_t * fps)
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{
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if (dn_f64_f64(&op1, op2, fps)) return;
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set_rounding_mode(fps);
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*op2 = f64_add(op1, *op2);
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update_fpscr(fps);
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}
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static inline void fsub_s(float32_t * op2, float32_t op1, uint32_t * fps)
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{
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if (dn_f32_f32(op2, &op1, fps)) return;
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set_rounding_mode(fps);
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*op2 = f32_sub(*op2, op1);
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update_fpscr(fps);
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}
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static inline void fsub_d(float64_t * op2, float64_t op1, uint32_t * fps)
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{
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if (dn_f64_f64(op2, &op1, fps)) return;
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set_rounding_mode(fps);
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*op2 = f64_sub(*op2, op1);
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update_fpscr(fps);
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}
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static inline void fmul_s(float32_t op1, float32_t * op2, uint32_t * fps)
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{
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if (dn_f32_f32(&op1, op2, fps)) return;
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set_rounding_mode(fps);
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*op2 = f32_mul(op1, *op2);
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update_fpscr(fps);
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}
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static inline void fmul_d(float64_t op1, float64_t * op2, uint32_t * fps)
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{
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if (dn_f64_f64(&op1, op2, fps)) return;
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set_rounding_mode(fps);
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*op2 = f64_mul(op1, *op2);
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update_fpscr(fps);
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}
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static inline void fdiv_s(float32_t * op2, float32_t op1, uint32_t * fps)
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{
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if (dn_f32_f32(op2, &op1, fps)) return;
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set_rounding_mode(fps);
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*op2 = f32_div(*op2, op1);
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update_fpscr(fps);
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}
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static inline void fdiv_d(float64_t * op2, float64_t op1, uint32_t * fps)
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{
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if (dn_f64_f64(op2, &op1, fps)) return;
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set_rounding_mode(fps);
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*op2 = f64_div(*op2, op1);
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update_fpscr(fps);
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}
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static inline float32_t float_ls(int32_t fpul, uint32_t * fps)
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{
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set_rounding_mode(fps);
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float32_t value = i32_to_f32(fpul);
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update_fpscr(fps);
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return value;
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}
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static inline float64_t float_ld(int32_t fpul, uint32_t * fps)
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{
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set_rounding_mode(fps);
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float64_t value = i32_to_f64(fpul);
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update_fpscr(fps);
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return value;
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}
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static inline int32_t ftrc_sl(float32_t op1, uint32_t * fps)
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{
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set_rounding_mode(fps);
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int32_t value = f32_to_i32(op1, softfloat_round_minMag, false);
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update_fpscr(fps);
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return value;
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}
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static inline int32_t ftrc_dl(float64_t op1, uint32_t * fps)
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{
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set_rounding_mode(fps);
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int32_t value = f64_to_i32(op1, softfloat_round_minMag, false);
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update_fpscr(fps);
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return value;
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}
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static inline float32_t fabs_s(float32_t op1)
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{
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op1.v &= 0x7fffffff;
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return op1;
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}
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static inline float64_t fabs_d(float64_t op1)
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{
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op1.v &= 0x7fffffff'ffffffff;
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return op1;
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}
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static inline float32_t fneg_s(float32_t op1)
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{
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op1.v ^= 0x80000000;
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return op1;
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}
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static inline float64_t fneg_d(float64_t op1)
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{
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op1.v ^= 0x80000000'00000000;
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return op1;
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}
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static inline uint32_t fcnv_ds(float64_t op1, uint32_t * fps)
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{
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if (dn_f64(&op1, fps)) return 0;
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set_rounding_mode(fps);
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float32_t result = f64_to_f32(op1);
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update_fpscr(fps);
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return result.v;
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}
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static inline float64_t fcnv_sd(int32_t fpul, uint32_t * fps)
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{
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float32_t a = { fpul };
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if (dn_f32(&a, fps)) return (float64_t){ 0 };
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set_rounding_mode(fps);
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float64_t result = f32_to_f64(a);
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update_fpscr(fps);
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return result;
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}
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static inline bool fcmpeq_s(float32_t op1, float32_t op2, uint32_t * fps)
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{
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if (dn_f32_f32(&op1, &op2, fps)) return false;
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set_rounding_mode(fps);
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bool result = f32_eq(op1, op2);
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update_fpscr(fps);
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return result;
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}
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static inline bool fcmpeq_d(float64_t op1, float64_t op2, uint32_t * fps)
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{
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if (dn_f64_f64(&op1, &op2, fps)) return false;
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set_rounding_mode(fps);
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bool result = f64_eq(op1, op2);
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update_fpscr(fps);
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return result;
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}
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static inline bool fcmpgt_s(float32_t op2, float32_t op1, uint32_t * fps)
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{
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if (dn_f32_f32(&op2, &op1, fps)) return false;
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|
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set_rounding_mode(fps);
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bool result = f32_le(op2, op1);
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update_fpscr(fps);
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return !result;
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}
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static inline bool fcmpgt_d(float64_t op2, float64_t op1, uint32_t * fps)
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{
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if (dn_f64_f64(&op2, &op1, fps)) return false;
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|
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set_rounding_mode(fps);
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bool result = f64_le(op2, op1);
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update_fpscr(fps);
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return !result;
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}
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static inline void fmac_s(float32_t fr0, float32_t op1, float32_t * op2, uint32_t * fps)
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|
{
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if (dn_f32_f32_f32(&fr0, &op1, op2, fps)) return;
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|
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set_rounding_mode(fps);
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*op2 = f32_mulAdd(fr0, op1, *op2);
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|
update_fpscr(fps);
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|
}
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|
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static inline void fsqrt_s(float32_t * op1, uint32_t * fps)
|
|
{
|
|
if (dn_f32(op1, fps)) return;
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|
|
|
set_rounding_mode(fps);
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*op1 = f32_sqrt(*op1);
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|
update_fpscr(fps);
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|
}
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|
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static inline void fsqrt_d(float64_t * op1, uint32_t * fps)
|
|
{
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|
if (dn_f64(op1, fps)) return;
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|
|
|
set_rounding_mode(fps);
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*op1 = f64_sqrt(*op1);
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|
update_fpscr(fps);
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|
}
|