only in sh2:

only in sh4: (26 new instructions)
SHAD     Rm,Rn           When Rn ≥ 0, Rn << Rm → Rn When Rn < 0, Rn >> Rm → [MSB → Rn]
SHLD     Rm,Rn           When Rn ≥ 0, Rn << Rm → Rn When Rn < 0, Rn >> Rm → [0 → Rn]
LDC      Rm,SSR          Rm → SSR
LDC      Rm,SPC          Rm → SPC
LDC      Rm,DBR          Rm → DBR
LDC      Rm,Rn_BANK      Rm → Rn_BANK (n = 0 to 7)
LDC.L    @Rm+,SSR        (Rm) → SSR, Rm + 4 → Rm
LDC.L    @Rm+,SPC        (Rm) → SPC, Rm + 4 → Rm
LDC.L    @Rm+,DBR        (Rm) → DBR, Rm + 4 → Rm
LDC.L    @Rm+,Rn_BANK    (Rm) → Rn_BANK, Rm + 4 → Rm
LDTLB                    PTEH/PTEL → TLB
MOVCA.L  R0,@Rn          R0 → (Rn) (without fetching cache block)
OCBI     @Rn             Invalidates operand cache block
OCBP     @Rn             Writes back and invalidates operand cache block
OCBWB    @Rn             Writes back operand cache block
PREF     @Rn             (Rn) → operand cache
STC      SSR,Rn          SSR → Rn
STC      SPC,Rn          SPC → Rn
STC      SGR,Rn          SGR → Rn
STC      DBR,Rn          DBR → Rn
STC      Rm_BANK,Rn      Rm_BANK → Rn (m = 0 to 7)
STC.L    SSR,@-Rn        Rn – 4 → Rn, SSR → (Rn)
STC.L    SPC,@-Rn        Rn – 4 → Rn, SPC → (Rn)
STC.L    SGR,@-Rn        Rn – 4 → Rn, SGR → (Rn)
STC.L    DBR,@-Rn        Rn – 4 → Rn, DBR → (Rn)
STC.L    Rm_BANK,@-Rn    Rn – 4 → Rn, Rm_BANK → (Rn) (m = 0 to 7)

floating point: