from sh2 import SH2
from mem import Memory
from impl import *

def test_addc():
    cpu = SH2()
    mem = Memory()

    cpu.reg[0] = 0x0000_0000
    cpu.reg[1] = 0x0000_0001

    cpu.reg[2] = 0x0000_0000
    cpu.reg[3] = 0xffff_ffff

    clrt(cpu, mem)
    addc(cpu, mem, 3, 1)
    assert cpu.reg[1] == 0x0000_0000
    assert cpu.sr.t == 1
    addc(cpu, mem, 2, 0)
    assert cpu.reg[0] == 0x0000_0001
    assert cpu.sr.t == 0

def test_addv():
    cpu = SH2()
    mem = Memory()

    cpu.reg[0] = 0x0000_0001
    cpu.reg[1] = 0x7fff_fffe
    cpu.sr.t = 0
    addv(cpu, mem, 0, 1)
    assert cpu.reg[1] == 0x7fff_ffff
    assert cpu.sr.t == 0

    cpu.reg[0] = 0x0000_0002
    cpu.reg[1] = 0x7fff_fffe
    cpu.sr.t = 0
    addv(cpu, mem, 0, 1)
    assert cpu.reg[1] == 0x8000_0000
    assert cpu.sr.t == 1

def test_dmuls():
    cpu = SH2()
    mem = Memory()

    cpu.reg[0] = 0xffff_fffe
    cpu.reg[1] = 0x0000_5555
    dmuls(cpu, mem, 0, 1)
    assert cpu.mach == 0xffff_ffff, cpu.mach
    assert cpu.macl == 0xffff_5556, cpu.macl

    cpu.reg[0] = 0x1234_abcd
    cpu.reg[1] = 0x1234_abcd
    dmuls(cpu, mem, 0, 1)
    assert cpu.mach == 0x014b_72ff, hex(cpu.mach)
    assert cpu.macl == 0x1293_8229, hex(cpu.macl)

    cpu.reg[0] = 0xedcb_5433
    cpu.reg[1] = 0x1234_abcd
    dmuls(cpu, mem, 0, 1)
    assert cpu.mach == 0xfeb4_8d00, hex(cpu.mach)
    assert cpu.macl == 0xed6c_7dd7, hex(cpu.macl)

def test_dmulu():
    cpu = SH2()
    mem = Memory()

    cpu.reg[0] = 0xffff_fffe
    cpu.reg[1] = 0x0000_5555
    dmulu(cpu, mem, 0, 1)
    assert cpu.mach == 0x0000_5554, cpu.mach
    assert cpu.macl == 0xffff_5556, hex(cpu.macl)

    cpu.reg[0] = 0x1234_abcd
    cpu.reg[1] = 0x1234_abcd
    dmulu(cpu, mem, 0, 1)
    assert cpu.mach == 0x014b_72ff, hex(cpu.mach)
    assert cpu.macl == 0x1293_8229, hex(cpu.macl)

    cpu.reg[0] = 0xedcb_5433
    cpu.reg[1] = 0x1234_abcd
    dmulu(cpu, mem, 0, 1)
    assert cpu.mach == 0x10e9_38cd, hex(cpu.mach)
    assert cpu.macl == 0xed6c_7dd7, hex(cpu.macl)

def test_extsb():
    cpu = SH2()
    mem = Memory()
    cpu.reg[0] = 0x0000_0080
    extsb(cpu, mem, 0, 1)
    assert cpu.reg[1] == 0xffff_ff80

def test_extsw():
    cpu = SH2()
    mem = Memory()
    cpu.reg[0] = 0x0000_8000
    extsw(cpu, mem, 0, 1)
    assert cpu.reg[1] == 0xffff_8000

def test_extub():
    cpu = SH2()
    mem = Memory()
    cpu.reg[0] = 0xffff_ff80
    extub(cpu, mem, 0, 1)
    assert cpu.reg[1] == 0x0000_0080

def test_extuw():
    cpu = SH2()
    mem = Memory()
    cpu.reg[0] = 0xffff_8000
    extuw(cpu, mem, 0, 1)
    assert cpu.reg[1] == 0x0000_8000

def test_mull():
    cpu = SH2()
    mem = Memory()
    cpu.reg[0] = 0xffff_fffe
    cpu.reg[1] = 0x0000_5555
    mull(cpu, mem, 0, 1)
    assert cpu.macl == 0xffff_5556, hex(cpu.macl)
    cpu.reg[0] = 0xffff_0005
    cpu.reg[1] = 0x1234_5678
    mull(cpu, mem, 0, 1)
    assert cpu.macl == 0x048d_b058, hex(cpu.macl)

def test_muls():
    cpu = SH2()
    mem = Memory()
    cpu.reg[0] = 0xffff_fffe
    cpu.reg[1] = 0x0000_5555
    muls(cpu, mem, 0, 1)
    assert cpu.macl == 0xffff_5556, hex(cpu.macl)
    cpu.reg[0] = 0xffff_0005
    cpu.reg[1] = 0x1234_5678
    muls(cpu, mem, 0, 1)
    assert cpu.macl == 0x0001_b058, hex(cpu.macl)
    cpu.reg[0] = 0xffff_f005
    cpu.reg[1] = 0x1234_5678
    muls(cpu, mem, 0, 1)
    assert cpu.macl == 0xfa9a_3058, hex(cpu.macl)

def test_mulu():
    cpu = SH2()
    mem = Memory()
    cpu.reg[0] = 0x0000_0002
    cpu.reg[1] = 0xffff_aaaa
    mulu(cpu, mem, 0, 1)
    assert cpu.macl == 0x0001_5554, hex(cpu.macl)
    cpu.reg[0] = 0xffff_0005
    cpu.reg[1] = 0x1234_5678
    mulu(cpu, mem, 0, 1)
    assert cpu.macl == 0x0001_b058, hex(cpu.macl)
    cpu.reg[0] = 0xffff_f005
    cpu.reg[1] = 0x1234_5678
    mulu(cpu, mem, 0, 1)
    assert cpu.macl == 0x5112_3058, hex(cpu.macl)

def test_negc():
    cpu = SH2()
    mem = Memory()
    cpu.reg[1] = 0x0000_0001
    clrt(cpu, mem)
    assert cpu.sr.t == 0
    negc(cpu, mem, 1, 1)
    assert cpu.sr.t == 1
    assert cpu.reg[1] == 0xffff_ffff, hex(cpu.reg[1])
    cpu.reg[1] = 0x0000_0000
    negc(cpu, mem, 0, 0)
    assert cpu.sr.t == 1
    assert cpu.reg[0] == 0xffff_ffff, hex(cpu.reg[0])

def test_subc():
    cpu = SH2()
    mem = Memory()
    cpu.reg[0] = 0x0000_0000
    cpu.reg[1] = 0x0000_0000
    cpu.reg[2] = 0x0000_0000
    cpu.reg[3] = 0x0000_0001

    clrt(cpu, mem)
    subc(cpu, mem, 3, 1)
    subc(cpu, mem, 2, 0)
    assert cpu.reg[0] == 0xffff_ffff
    assert cpu.reg[1] == 0xffff_ffff

def test_subv():
    cpu = SH2()
    mem = Memory()
    cpu.reg[0] = 0x0000_0002
    cpu.reg[1] = 0x8000_0001
    subv(cpu, mem, 0, 1)
    assert cpu.sr.t == 1, cpu.sr.t
    assert cpu.reg[1] == 0x7fff_ffff

    cpu.reg[2] = 0xffff_fffe
    cpu.reg[3] = 0x7fff_fffe
    subv(cpu, mem, 2, 3)
    assert cpu.sr.t == 1
    assert cpu.reg[3] == 0x8000_0000

def test_swapb():
    cpu = SH2()
    mem = Memory()
    cpu.reg[0] = 0x12345678
    swapb(cpu, mem, 0, 1)
    assert cpu.reg[1] == 0x12347856

def test_swapw():
    cpu = SH2()
    mem = Memory()
    cpu.reg[0] = 0x12345678
    swapw(cpu, mem, 0, 1)
    assert cpu.reg[1] == 0x56781234

def test_xtrct():
    cpu = SH2()
    mem = Memory()
    cpu.reg[0] = 0x0123_4567
    cpu.reg[1] = 0x89ab_cdef
    xtrct(cpu, mem, 0, 1)
    assert cpu.reg[1] == 0x4567_89ab

def test_macl():
    cpu = SH2()
    mem = Memory()

    mem.write_long(0x1010, 0x1234abcd) # TBLM
    mem.write_long(0x1014, 0x5678ef01)
    mem.write_long(0x1018, 0x0123abcd) # TBLN
    mem.write_long(0x101c, 0x4567def0)

    cpu.pc = 0x1000
    clrmac(cpu, mem)
    mova(cpu, mem, 3) # TBLM
    assert cpu.reg[0] == 0x0000_1010
    mov(cpu, mem, 0, 1)
    mova(cpu, mem, 4) # TBLN
    assert cpu.reg[0] == 0x0000_1018
    clrmac(cpu, mem)
    macl(cpu, mem, 0, 1)
    assert cpu.mach == 0x0014_be17, hex(cpu.mach)
    assert cpu.macl == 0x0cf6_8229, hex(cpu.macl)
    macl(cpu, mem, 0, 1)
    assert cpu.mach == 0x1786_6c78, hex(cpu.mach)
    assert cpu.macl == 0x6c00_7119, hex(cpu.macl)

def test_macw():
    cpu = SH2()
    mem = Memory()

    mem.write_word(0x1010, 0x1234) # TBLM
    mem.write_word(0x1012, 0xabcd)
    mem.write_word(0x1014, 0x5678)
    mem.write_word(0x1016, 0xef01)
    mem.write_word(0x1018, 0x0123) # TBLN
    mem.write_word(0x101a, 0xabcd)
    mem.write_word(0x101c, 0x4567)
    mem.write_word(0x101e, 0xdef0)

    cpu.pc = 0x1000
    clrmac(cpu, mem)
    mova(cpu, mem, 3) # TBLM
    assert cpu.reg[0] == 0x0000_1010
    mov(cpu, mem, 0, 1)
    mova(cpu, mem, 4) # TBLN
    assert cpu.reg[0] == 0x0000_1018
    clrmac(cpu, mem)

    macw(cpu, mem, 0, 1)
    assert cpu.mach == 0x0000_0000, hex(cpu.mach)
    assert cpu.macl == 0x0014_b11c, hex(cpu.macl)

    macw(cpu, mem, 0, 1)
    assert cpu.mach == 0x0000_0000, hex(cpu.mach)
    assert cpu.macl == 0x1bc6_3345, hex(cpu.macl)

    macw(cpu, mem, 0, 1)
    assert cpu.mach == 0x0000_0000, hex(cpu.mach)
    assert cpu.macl == 0x3337_558d, hex(cpu.macl)

    macw(cpu, mem, 0, 1)
    assert cpu.mach == 0x0000_0000, hex(cpu.mach)
    assert cpu.macl == 0x3569_447d, hex(cpu.macl)

def test_mova():
    cpu = SH2()
    mem = Memory()
    cpu.pc = 0x1006
    mova(cpu, mem, 1)
    assert cpu.reg[0] == 0x100c

test_addc()
test_addv()
test_dmuls()
test_dmulu()
test_extsb()
test_extsw()
test_extub()
test_extuw()
test_mull()
test_muls()
test_mulu()
test_negc()
test_subc()
test_subv()
test_swapb()
test_swapw()
test_xtrct()
test_macl()
test_macw()

test_mova()