#pragma once

#include <assert.h>
#include <stdint.h>
#include <stdbool.h>

#include "sr_bits.h"

#define SR__RB (1 << 29)
#define SR__MD (1 << 30)

#define BANK(sr) (((sr) & SR__RB) && ((sr) & SR__MD))
#define REGN(sr, x) (((x) & (1 << 3)) ? (x) : ((x) ^ (BANK(sr) << 4)))
#define REG(state, x) ((state)->general_register[REGN((state)->sr.value, (x))])
#define REGN_BANK(sr, x) (((x) & (1 << 3)) ? (x) : ((x) ^ ((!BANK(sr)) << 4)))
#define REG_BANK(state, x) ((state)->general_register[REGN_BANK((state)->sr.value, (x))])

static_assert(REGN(0, 0 ) == 0 );
static_assert(REGN(0, 7 ) == 7 );
static_assert(REGN(0, 8 ) == 8 );
static_assert(REGN(0, 15) == 15);
static_assert(REGN(SR__MD | SR__RB, 0 ) == 16);
static_assert(REGN(SR__MD | SR__RB, 7 ) == 23);
static_assert(REGN(SR__MD | SR__RB, 8 ) == 8 );
static_assert(REGN(SR__MD | SR__RB, 15) == 15);

static_assert(REGN_BANK(0, 0 ) == 16);
static_assert(REGN_BANK(0, 7 ) == 23);
static_assert(REGN_BANK(0, 8 ) == 8 );
static_assert(REGN_BANK(0, 15) == 15);
static_assert(REGN_BANK(SR__MD | SR__RB, 0 ) == 0 );
static_assert(REGN_BANK(SR__MD | SR__RB, 7 ) == 7 );
static_assert(REGN_BANK(SR__MD | SR__RB, 8 ) == 8 );
static_assert(REGN_BANK(SR__MD | SR__RB, 15) == 15);

struct architectural_state {
  uint32_t general_register[24];

  // system_register
  uint32_t mach;
  uint32_t macl;
  uint32_t pr[3];
  uint32_t pc[3];
  uint32_t fpscr;
  uint32_t fpul;
  //

  // control_register
  union {
    struct sr_bits bits;
    uint32_t value;
  } sr;
  uint32_t ssr;
  uint32_t spc;
  uint32_t gbr;
  uint32_t vbr;
  uint32_t sgr;
  uint32_t dbr;
  //

  uint32_t floating_point_register[32];

  bool is_delay_slot;
};

//