def has_delay_slot(ins):
    branches_with_delay_slots = {
        "JMP",
        "JSR",
        "BRA",
        "BRAF",
        "BSR",
        "BSRF",
        "RTS",
        "RTE",
        "BT/S",
        "BF/S"
    }
    return ins.instruction in branches_with_delay_slots

def modifies_pc(ins):
    modifies_pc = {
        "JMP",
        "JSR",
        "BRA",
        "BRAF",
        "BSR",
        "BSRF",
        "RTS",
        "RTE",
        "BT",
        "BF",
        "BT/S",
        "BF/S",
        "TRAPA",
    }
    modifies_pc_with_operands = {
        ("LDC"  , "Rm,SR"  ),
        ("LDC.L", "@Rm+,SR"),
    }
    return (
        ins.instruction in modifies_pc
        or (ins.instruction, ins.operands) in modifies_pc_with_operands
    )

def is_pc_relative_mov_or_mova(ins):
    pc_relative_mov_or_mova = {
        ("MOV.W", "@(disp,PC),Rn"),
        ("MOV.L", "@(disp,PC),Rn"),
        ("MOVA" , "@(disp,PC),R0"),
    }
    return (ins.instruction, ins.operands) in pc_relative_mov_or_mova