CLRS 0000000001001000 0 → S 1 — CLRT 0000000000001000 0 → T 1 0 CLRMAC 0000000000101000 0 → MACH, MACL 1 — DIV0U 0000000000011001 0 → M/Q/T 1 0 NOP 0000000000001001 No operation 1 — RTE 0000000000101011 Delayed branch, Stack area → PC/SR 4 LSB RTS 0000000000001011 Delayed branch, PR → PC 2 — SETS 0000000001011000 1 → S 1 — SETT 0000000000011000 1 → T 1 1 SLEEP 0000000000011011 Sleep 3 — CMP/PL Rn 0100nnnn00010101 Rn > 0, 1 → T 1 Comparison result CMP/PZ Rn 0100nnnn00010001 Rn ≥ 0, 1 → T 1 Comparison result DT Rn 0100nnnn00010000 Rn – 1 → Rn When Rn is 0, 1 → T, 1 Comparison result when Rn is nonzero, 0 → T MOVT Rn 0000nnnn00101001 T → Rn 1 — ROTL Rn 0100nnnn00000100 T ← Rn ← MSB 1 MSB ROTR Rn 0100nnnn00000101 LSB → Rn → T 1 LSB ROTCL Rn 0100nnnn00100100 T ← Rn ← T 1 MSB ROTCR Rn 0100nnnn00100101 T → Rn → T 1 LSB SHAL Rn 0100nnnn00100000 T ← Rn ← 0 1 MSB SHAR Rn 0100nnnn00100001 MSB → Rn → T 1 LSB SHLL Rn 0100nnnn00000000 T ← Rn ← 0 1 MSB SHLR Rn 0100nnnn00000001 0 → Rn → T 1 LSB SHLL2 Rn 0100nnnn00001000 Rn<<2 → Rn 1 — SHLR2 Rn 0100nnnn00001001 Rn>>2 → Rn 1 — SHLL8 Rn 0100nnnn00011000 Rn<<8 → Rn 1 — SHLR8 Rn 0100nnnn00011001 Rn>>8 → Rn 1 — SHLL16 Rn 0100nnnn00101000 Rn<<16 → Rn 1 — SHLR16 Rn 0100nnnn00101001 Rn>>16 → Rn 1 — ADD Rm,Rn 0011nnnnmmmm1100 Rn + Rm → Rn 1 — ADDC Rm,Rn 0011nnnnmmmm1110 Rn + Rm + T → Rn, carry → T 1 Carry ADDV Rm,Rn 0011nnnnmmmm1111 Rn + Rm → Rn, overflow → T 1 Overflow AND Rm,Rn 0010nnnnmmmm1001 Rn & Rm → Rn 1 — CMP/EQ Rm,Rn 0011nnnnmmmm0000 When Rn = Rm, 1 → T 1 Comparison result CMP/HS Rm,Rn 0011nnnnmmmm0010 When unsigned and Rn ≥ Rm, 1 → T 1 Comparison result CMP/GE Rm,Rn 0011nnnnmmmm0011 When signed and Rn ≥ Rm, 1 → T 1 Comparison result CMP/HI Rm,Rn 0011nnnnmmmm0110 When unsigned and Rn > Rm, 1 → T 1 Comparison result CMP/GT Rm,Rn 0011nnnnmmmm0111 When signed and Rn > Rm, 1 → T 1 Comparison result CMP/STR Rm,Rn 0010nnnnmmmm1100 When a byte in Rn equals bytes in Rm, 1 → T 1 Comparison result DIV1 Rm,Rn 0011nnnnmmmm0100 1–step division (Rn ÷ Rm) 1 Calculation result DIV0S Rm,Rn 0010nnnnmmmm0111 MSB of Rn → Q, MSB of Rm → M, M ^ Q → T 1 Calculation result DMULS.L Rm,Rn 0011nnnnmmmm1101 Signed, Rn × Rm → MACH, MACL 2 to 4 — DMULU.L Rm,Rn 0011nnnnmmmm0101 Unsigned, Rn × Rm → MACH, MACL 2 to 4 — EXTS.B Rm,Rn 0110nnnnmmmm1110 Sign – extends Rm from byte → Rn 1 — EXTS.W Rm,Rn 0110nnnnmmmm1111 Sign – extends Rm from word → Rn 1 — EXTU.B Rm,Rn 0110nnnnmmmm1100 Zero – extends Rm from byte → Rn 1 — EXTU.W Rm,Rn 0110nnnnmmmm1101 Zero – extends Rm from word → Rn 1 — MOV Rm,Rn 0110nnnnmmmm0011 Rm → Rn 1 — MUL.L Rm,Rn 0000nnnnmmmm0111 Rn × Rm → MACL 2 to 4 — MULS.W Rm,Rn 0010nnnnmmmm1111 Signed, Rn × Rm → MAC 1 to 3 — MULU.W Rm,Rn 0010nnnnmmmm1110 Unsigned, Rn × Rm → MAC 1 to 3 — NEG Rm,Rn 0110nnnnmmmm1011 0 – Rm → Rn 1 — NEGC Rm,Rn 0110nnnnmmmm1010 0 – Rm – T → Rn, Borrow → T 1 Borrow NOT Rm,Rn 0110nnnnmmmm0111 ~Rm → Rn 1 — OR Rm,Rn 0010nnnnmmmm1011 Rn | Rm → Rn 1 — SUB Rm,Rn 0011nnnnmmmm1000 Rn – Rm → Rn 1 — SUBC Rm,Rn 0011nnnnmmmm1010 Rn – Rm – T → Rn, Borrow → T 1 Borrow SUBV Rm,Rn 0011nnnnmmmm1011 Rn – Rm → Rn, Underflow → T 1 Underflow SWAP.B Rm,Rn 0110nnnnmmmm1000 Rm → Swap upper and lower halves of 1 — lower 2 bytes → Rn SWAP.W Rm,Rn 0110nnnnmmmm1001 Rm → Swap upper and lower word → Rn 1 — TST Rm,Rn 0010nnnnmmmm1000 Rn & Rm, when result is 0, 1 → T 1 Test results XOR Rm,Rn 0010nnnnmmmm1010 Rn ^ Rm → Rn 1 — XTRCT Rm,Rn 0010nnnnmmmm1101 Center 32 bits of Rm and Rn → Rn 1 — LDC Rm,SR 0100mmmm00001110 Rm → SR 1 LSB LDC Rm,GBR 0100mmmm00011110 Rm → GBR 1 — LDC Rm,VBR 0100mmmm00101110 Rm → VBR 1 — LDS Rm,MACH 0100mmmm00001010 Rm → MACH 1 — LDS Rm,MACL 0100mmmm00011010 Rm → MACL 1 — LDS Rm,PR 0100mmmm00101010 Rm → PR 1 — STC SR,Rn 0000nnnn00000010 SR → Rn 1 — STC GBR,Rn 0000nnnn00010010 GBR → Rn 1 — STC VBR,Rn 0000nnnn00100010 VBR → Rn 1 — STS MACH,Rn 0000nnnn00001010 MACH → Rn 1 — STS MACL,Rn 0000nnnn00011010 MACL → Rn 1 — STS PR,Rn 0000nnnn00101010 PR → Rn 1 — JMP @Rn 0100nnnn00101011 Delayed branch, Rn → PC 2 — JSR @Rn 0100nnnn00001011 Delayed branch, PC → PR, Rn → PC 2 — TAS.B @Rn 0100nnnn00011011 When (Rn) is 0, 1 → T, 1 → MSB of (Rn) 4 Test results MOV.B Rm,@Rn 0010nnnnmmmm0000 Rm → (Rn) 1 — MOV.W Rm,@Rn 0010nnnnmmmm0001 Rm → (Rn) 1 — MOV.L Rm,@Rn 0010nnnnmmmm0010 Rm → (Rn) 1 — MOV.B @Rm,Rn 0110nnnnmmmm0000 (Rm) → sign extension → Rn 1 — MOV.W @Rm,Rn 0110nnnnmmmm0001 (Rm) → sign extension → Rn 1 — MOV.L @Rm,Rn 0110nnnnmmmm0010 (Rm) → Rn 1 — MAC.L @Rm+,@Rn+ 0000nnnnmmmm1111 Signed, (Rn) × (Rm) + MAC → MAC 3/(2 to 4) — MAC.W @Rm+,@Rn+ 0100nnnnmmmm1111 Signed, (Rn) × (Rm) + MAC → MAC 3/(2) — MOV.B @Rm+,Rn 0110nnnnmmmm0100 (Rm) → sign extension → Rn, Rm + 1 → Rm 1 — MOV.W @Rm+,Rn 0110nnnnmmmm0101 (Rm) → sign extension → Rn, Rm + 2 → Rm 1 — MOV.L @Rm+,Rn 0110nnnnmmmm0110 (Rm) → Rn, Rm + 4 → Rm 1 — LDC.L @Rm+,SR 0100mmmm00000111 (Rm) → SR, Rm + 4 → Rm 3 LSB LDC.L @Rm+,GBR 0100mmmm00010111 (Rm) → GBR, Rm + 4 → Rm 3 — LDC.L @Rm+,VBR 0100mmmm00100111 (Rm) → VBR, Rm + 4 → Rm 3 — LDS.L @Rm+,MACH 0100mmmm00000110 (Rm) → MACH, Rm + 4 → Rm 1 — LDS.L @Rm+,MACL 0100mmmm00010110 (Rm) → MACL, Rm + 4 → Rm 1 — LDS.L @Rm+,PR 0100mmmm00100110 (Rm) → PR, Rm + 4 → Rm 1 — MOV.B Rm,@-Rn 0010nnnnmmmm0100 Rn – 1 → Rn, Rm → (Rn) 1 — MOV.W Rm,@-Rn 0010nnnnmmmm0101 Rn – 2 → Rn, Rm → (Rn) 1 — MOV.L Rm,@-Rn 0010nnnnmmmm0110 Rn – 4 → Rn, Rm → (Rn) 1 — STC.L SR,@-Rn 0100nnnn00000011 Rn – 4 → Rn, SR → (Rn) 2 — STC.L GBR,@-Rn 0100nnnn00010011 Rn – 4 → Rn, GBR → (Rn) 2 — STC.L VBR,@-Rn 0100nnnn00100011 Rn – 4 → Rn, VBR → (Rn) 2 — STS.L MACH,@-Rn 0100nnnn00000010 Rn – 4 → Rn, MACH → (Rn) 1 — STS.L MACL,@-Rn 0100nnnn00010010 Rn – 4 → Rn, MACL → (Rn) 1 — STS.L PR,@-Rn 0100nnnn00100010 Rn – 4 → Rn, PR → (Rn) 1 — MOV.B R0,@(disp,Rn) 10000000nnnndddd R0 → (disp + Rn) 1 — MOV.W R0,@(disp,Rn) 10000001nnnndddd R0 → (disp × 2 + Rn) 1 — MOV.L Rm,@(disp,Rn) 0001nnnnmmmmdddd Rm → (disp × 4 + Rn) 1 — MOV.B @(disp,Rm),R0 10000100mmmmdddd (disp + Rm) → sign extension → R0 1 — MOV.W @(disp,Rm),R0 10000101mmmmdddd (disp × 2 + Rm) → sign extension → R0 1 — MOV.L @(disp,Rm),Rn 0101nnnnmmmmdddd (disp × 4 + Rm) → Rn 1 — MOV.B Rm,@(R0,Rn) 0000nnnnmmmm0100 Rm → (R0 + Rn) 1 — MOV.W Rm,@(R0,Rn) 0000nnnnmmmm0101 Rm → (R0 + Rn) 1 — MOV.L Rm,@(R0,Rn) 0000nnnnmmmm0110 Rm → (R0 + Rn) 1 — MOV.B @(R0,Rm),Rn 0000nnnnmmmm1100 (R0 + Rm) → sign extension → Rn 1 — MOV.W @(R0,Rm),Rn 0000nnnnmmmm1101 (R0 + Rm) → sign extension → Rn 1 — MOV.L @(R0,Rm),Rn 0000nnnnmmmm1110 (R0 + Rm) → Rn 1 — MOV.B R0,@(disp,GBR) 11000000dddddddd R0 → (disp + GBR) 1 — MOV.W R0,@(disp,GBR) 11000001dddddddd R0 → (disp × 2 + GBR) 1 — MOV.L R0,@(disp,GBR) 11000010dddddddd R0 → (disp × 4 + GBR) 1 — MOV.B @(disp,GBR),R0 11000100dddddddd (disp + GBR) → sign extension → R0 1 — MOV.W @(disp,GBR),R0 11000101dddddddd (disp × 2 + GBR) → sign extension → R0 1 — MOV.L @(disp,GBR),R0 11000110dddddddd (disp × 4 + GBR) → R0 1 — AND.B #imm,@(R0,GBR) 11001101iiiiiiii (R0 + GBR) & imm → (R0 + GBR) 3 — OR.B #imm,@(R0,GBR) 11001111iiiiiiii (R0 + GBR) | imm → (R0 + GBR) 3 — TST.B #imm,@(R0,GBR) 11001100iiiiiiii (R0 + GBR) & imm, when result is 0, 1 → T 3 Test results XOR.B #imm,@(R0,GBR) 11001110iiiiiiii (R0 + GBR) ^ imm → (R0 + GBR) 3 — MOV.W @(disp,PC),Rn 1001nnnndddddddd (disp × 2 + PC) → sign extension → Rn 1 — MOV.L @(disp,PC),Rn 1101nnnndddddddd (disp × 4 + PC) → Rn 1 — MOVA @(disp,PC),R0 11000111dddddddd disp × 4 + PC → R0 1 — BRAF Rn 0000nnnn00100011 Delayed branch, Rn + PC → PC 2 — BSRF Rn 0000nnnn00000011 Delayed branch, PC → PR, Rn + PC → PC 2 — BF label 10001011dddddddd When T = 0, disp × 2 + PC → PC; 3/1 — When T = 1, nop BF/S label 10001111dddddddd When T = 0, disp × 2 + PC → PC; 2/1 — When T = 1, nop BT label 10001001dddddddd When T = 1, disp × 2+ PC → PC; 3/1 — When T = 0, nop BT/S label 10001101dddddddd When T = 1, disp × 2 + PC → PC; 2/1 — When T = 0, nop BRA label 1010dddddddddddd Delayed branch, disp × 2 + PC → PC 2 — BSR label 1011dddddddddddd Delayed branch, PC → PR, disp × 2 + PC → PC 2 — ADD #imm,Rn 0111nnnniiiiiiii Rn + imm → Rn 1 — AND #imm,R0 11001001iiiiiiii R0 & imm → R0 1 — CMP/EQ #imm,R0 10001000iiiiiiii When R0 = imm, 1 → T 1 Comparison result MOV #imm,Rn 1110nnnniiiiiiii imm → sign extension → Rn 1 — OR #imm,R0 11001011iiiiiiii R0 | imm → R0 1 — TST #imm,R0 11001000iiiiiiii R0 & imm, when result is 0, 1 → T 1 Test results XOR #imm,R0 11001010iiiiiiii R0 ^ imm → R0 1 — TRAPA #imm 11000011iiiiiiii PC/SR → Stack area, (imm × 4 + VBR) → PC 8 —