1111nnn001001101
Available only when PR=1 and SZ=0
sr ← ZeroExtend32(SR);
op1 ← FloatValue64(DR2n);
IF (FpuIsDisabled(sr) AND IsDelaySlot())
THROW SLOTFPUDIS;
IF (FpuIsDisabled(sr))
THROW FPUDIS;
op1 ← FNEG_D(op1);
DR2n ← FloatRegister64(op1);