From 8190f0497384ea6670fa5d7f9ff8ff599c73e7ae Mon Sep 17 00:00:00 2001
From: Zack Buhman <zack@buhman.org>
Date: Mon, 22 Apr 2024 20:41:14 +0800
Subject: [PATCH] sh4: fix FIPR and FMOV.S documentation typos

---
 sh4/FIPR FVm,FVn   | 2 +-
 sh4/FMOV.S @Rm,FRn | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/sh4/FIPR FVm,FVn b/sh4/FIPR FVm,FVn
index c123b31..432dbc5 100644
--- a/sh4/FIPR FVm,FVn	
+++ b/sh4/FIPR FVm,FVn	
@@ -8,7 +8,7 @@ IF (FpuIsDisabled(sr) AND IsDelaySlot())
 THROW SLOTFPUDIS;
 IF (FpuIsDisabled(sr))
 THROW FPUDIS;
-op2[3], fps ← FIPR_S(op1, op2, fps);
+op2, fps ← FIPR_S(op1, op2, fps);
 IF (FpuEnableV(fps) AND FpuCauseV(fps))
 THROW FPUEXC, fps;
 IF ((FpuEnableI(fps) OR FpuEnableO(fps)) OR FpuEnableU(fps))
diff --git a/sh4/FMOV.S @Rm,FRn b/sh4/FMOV.S @Rm,FRn
index 3c063af..71bce75 100644
--- a/sh4/FMOV.S @Rm,FRn	
+++ b/sh4/FMOV.S @Rm,FRn	
@@ -9,4 +9,4 @@ IF (FpuIsDisabled(sr))
 THROW FPUDIS;
 address ← ZeroExtend32(op1);
 op2 ← ReadMemory32(address);
-FR2n ← FloatRegister32(op2);
+FRn ← FloatRegister32(op2);