sh4/RTE: add missing SR/SSR restore

2024-04-21 20:47:25 +08:00 · 2024-04-21 20:47:25 +08:00 · 7d98557682
commit 7d98557682
parent 4dd67c7204
1 changed files with 1 additions and 0 deletions
--- a/sh4/RTE
+++ b/sh4/RTE
@ -9,3 +9,4 @@ THROW ILLSLOT;
 target ← pc;
 delayedpc ← target ∧ (~ 0x1);
 PC’’ ← Register(delayedpc);
 SR ← Register(ssr);