diff --git a/sh4/ADD #imm,Rn b/sh4/ADD #imm,Rn
index f4a2446..2ea8669 100644
--- a/sh4/ADD #imm,Rn	
+++ b/sh4/ADD #imm,Rn	
@@ -1,5 +1,5 @@
 0111nnnniiiiiiii
-imm ← SignExtend8(s);
+imm ← SignExtend8(i);
 op2 ← SignExtend32(Rn);
 op2 ← op2 + imm;
 Rn ← Register(op2);
\ No newline at end of file
diff --git a/sh4/BF label b/sh4/BF label
index a1a3757..4e7317a 100644
--- a/sh4/BF label	
+++ b/sh4/BF label	
@@ -3,7 +3,7 @@ t ← ZeroExtend1(T);
 pc ← SignExtend32(PC);
 newpc ← SignExtend32(PC’);
 delayedpc ← SignExtend32(PC’’);
-label ← SignExtend8(s) << 1;
+label ← SignExtend8(d) << 1;
 IF (IsDelaySlot())
 THROW ILLSLOT;
 IF (t = 0)
diff --git a/sh4/BF_S label b/sh4/BF_S label
index f064aff..07e422a 100644
--- a/sh4/BF_S label	
+++ b/sh4/BF_S label	
@@ -2,7 +2,7 @@
 t ← ZeroExtend1(T);
 pc ← SignExtend32(PC);
 delayedpc ← SignExtend32(PC’’);
-label ← SignExtend8(s) << 1;
+label ← SignExtend8(d) << 1;
 IF (IsDelaySlot())
 THROW ILLSLOT;
 IF (t = 0)
diff --git a/sh4/BRA label b/sh4/BRA label
index c66a5d8..e4e4ad6 100644
--- a/sh4/BRA label	
+++ b/sh4/BRA label	
@@ -1,6 +1,6 @@
 1010dddddddddddd
 pc ← SignExtend32(PC);
-label ← SignExtend12(s) << 1;
+label ← SignExtend12(d) << 1;
 IF (IsDelaySlot())
 THROW ILLSLOT;
 temp ← ZeroExtend32(pc + 4 + label);
diff --git a/sh4/BSR label b/sh4/BSR label
index 37e3d6f..9b14894 100644
--- a/sh4/BSR label	
+++ b/sh4/BSR label	
@@ -1,6 +1,6 @@
 1011dddddddddddd
 pc ← SignExtend32(PC);
-label ← SignExtend12(s) << 1;
+label ← SignExtend12(d) << 1;
 IF (IsDelaySlot())
 THROW ILLSLOT;
 delayedpr ← pc + 4;
diff --git a/sh4/BT label b/sh4/BT label
index cf49168..6ca866c 100644
--- a/sh4/BT label	
+++ b/sh4/BT label	
@@ -3,7 +3,7 @@ t ← ZeroExtend1(T);
 pc ← SignExtend32(PC);
 newpc ← SignExtend32(PC’);
 delayedpc ← SignExtend32(PC’’);
-label ← SignExtend8(s) << 1;
+label ← SignExtend8(d) << 1;
 IF (IsDelaySlot())
 THROW ILLSLOT;
 IF (t = 1)
diff --git a/sh4/BT_S label b/sh4/BT_S label
index 185c828..79898c0 100644
--- a/sh4/BT_S label	
+++ b/sh4/BT_S label	
@@ -2,7 +2,7 @@
 t ← ZeroExtend1(T);
 pc ← SignExtend32(PC);
 delayedpc ← SignExtend32(PC’’);
-label ← SignExtend8(s) << 1;
+label ← SignExtend8(d) << 1;
 IF (IsDelaySlot())
 THROW ILLSLOT;
 IF (t = 1)
diff --git a/sh4/CMP_EQ #imm,R0 b/sh4/CMP_EQ #imm,R0
index ff25bfd..e041792 100644
--- a/sh4/CMP_EQ #imm,R0	
+++ b/sh4/CMP_EQ #imm,R0	
@@ -1,5 +1,5 @@
 10001000iiiiiiii
 r0 ← SignExtend32(R0);
-imm ← SignExtend8(s);
+imm ← SignExtend8(i);
 t ← INT (r0 = imm);
 T ← Bit(t);
diff --git a/sh4/DIV0S Rm,Rn b/sh4/DIV0S Rm,Rn
index c4614c2..7f7d17c 100644
--- a/sh4/DIV0S Rm,Rn	
+++ b/sh4/DIV0S Rm,Rn	
@@ -2,8 +2,8 @@
 op1 ← SignExtend32(Rm);
 op2 ← SignExtend32(Rn);
 q ← op2< 31 FOR 1 >;
-m ← op1< 31 FOR 1 >;
-t ← m ⊕ q;
+_m ← op1< 31 FOR 1 >;
+t ← _m ⊕ q;
 Q ← Bit(q);
-M ← Bit(m);
+M ← Bit(_m);
 T ← Bit(t);
diff --git a/sh4/DIV0U b/sh4/DIV0U
index 7ffb3b2..3bc31c5 100644
--- a/sh4/DIV0U
+++ b/sh4/DIV0U
@@ -1,7 +1,7 @@
 0000000000011001
 q ← 0;
-m ← 0;
+_m ← 0;
 t ← 0;
 Q ← Bit(q);
-M ← Bit(m);
+M ← Bit(_m);
 T ← Bit(t);
diff --git a/sh4/DIV1 Rm,Rn b/sh4/DIV1 Rm,Rn
index bc23fc5..9220236 100644
--- a/sh4/DIV1 Rm,Rn	
+++ b/sh4/DIV1 Rm,Rn	
@@ -1,18 +1,18 @@
 0011nnnnmmmm0100
 q ← ZeroExtend1(Q);
-m ← ZeroExtend1(M);
+_m ← ZeroExtend1(M);
 t ← ZeroExtend1(T);
 op1 ← ZeroExtend32(SignExtend32(Rm));
 op2 ← ZeroExtend32(SignExtend32(Rn));
 oldq ← q;
 q ← op2< 31 FOR 1 >;
 op2 ← ZeroExtend32(op2 << 1) ∨ t;
-IF (oldq = m)
+IF (oldq = _m)
 op2 ← op2 - op1;
 ELSE
 op2 ← op2 + op1;
-q ← (q ⊕ m) ⊕ op2< 32 FOR 1 >;
-t ← 1 - (q ⊕ m);
+q ← (q ⊕ _m) ⊕ op2< 32 FOR 1 >;
+t ← 1 - (q ⊕ _m);
 Rn ← Register(op2);
 Q ← Bit(q);
 T ← Bit(t);
diff --git a/sh4/FSCHG b/sh4/FSCHG
index 1f220ad..66712ec 100644
--- a/sh4/FSCHG
+++ b/sh4/FSCHG
@@ -1,10 +1,10 @@
 1111001111111101
 Available only when PR=0
 sr ← ZeroExtend32(SR);
-sz ← ZeroExtend1(SR.SZ);
+sz ← ZeroExtend1(FPSCR.SZ);
 IF (FpuIsDisabled(sr) AND IsDelaySlot())
 THROW SLOTFPUDIS;
 IF (FpuIsDisabled(sr))
 THROW FPUDIS;
 sz ← sz ⊕ 1;
-SR.SZ ← Bit(sz);
+FPSCR.SZ ← Bit(sz);
diff --git a/sh4/LDC Rm,DBR b/sh4/LDC Rm,DBR
index a712425..d95ec42 100644
--- a/sh4/LDC Rm,DBR	
+++ b/sh4/LDC Rm,DBR	
@@ -3,5 +3,5 @@ md ← ZeroExtend1(MD);
 IF (md = 0)
 THROW RESINST;
 op1 ← SignExtend32(Rm);
-dbr← op1;
+dbr ← op1;
 DBR ← Register(dbr);
diff --git a/sh4/LDC Rm,VBR b/sh4/LDC Rm,VBR
index 472f1be..d206d7c 100644
--- a/sh4/LDC Rm,VBR	
+++ b/sh4/LDC Rm,VBR	
@@ -3,5 +3,5 @@ md ← ZeroExtend1(MD);
 IF (md = 0)
 THROW RESINST;
 op1 ← SignExtend32(Rm);
-vbr← op1;
+vbr ← op1;
 VBR ← Register(vbr);
diff --git a/sh4/LDS Rm,FPSCR b/sh4/LDS Rm,FPSCR
index a2bdd84..86c022f 100644
--- a/sh4/LDS Rm,FPSCR	
+++ b/sh4/LDS Rm,FPSCR	
@@ -5,8 +5,4 @@ IF (FpuIsDisabled(sr) AND IsDelaySlot())
 THROW SLOTFPUDIS;
 IF (FpuIsDisabled(sr))
 THROW FPUDIS;
-fps, pr, sz, fr ← UnpackFPSCR(op1);
-FPSCR ← ZeroExtend32(fps);
-SR.PR ← Bit(pr);
-SR.SZ ← Bit(sz);
-SR.FR ← Bit(fr);
+FPSCR ← ZeroExtend32(op1);
diff --git a/sh4/LDS.L @Rm+,FPSCR b/sh4/LDS.L @Rm+,FPSCR
index eee8dfe..db3a537 100644
--- a/sh4/LDS.L @Rm+,FPSCR	
+++ b/sh4/LDS.L @Rm+,FPSCR	
@@ -7,10 +7,6 @@ IF (FpuIsDisabled(sr))
 THROW FPUDIS;
 address ← ZeroExtend32(op1);
 value ← ReadMemory32(address);
-fps, pr, sz, fr ← UnpackFPSCR(value);
 op1 ← op1 + 4;
 Rm ← Register(op1);
-FPSCR ← ZeroExtend32(fps);
-SR.PR ← Bit(pr);
-SR.SZ ← Bit(sz);
-SR.FR ← Bit(fr);
+FPSCR ← ZeroExtend32(value);
diff --git a/sh4/LDTLB b/sh4/LDTLB
index 24e51a3..fbded8f 100644
--- a/sh4/LDTLB
+++ b/sh4/LDTLB
@@ -2,13 +2,13 @@
 md ← ZeroExtend1(MD);
 IF (md = 0)
 THROW RESINST;
-UTLB[MMUCR.URC].ASID ← PTEH.ASID
-UTLB[MMUCR.URC].VPN ← PTEH.VPN
-UTLB[MMUCR.URC].PPN ← PTEH.PPN
-UTLB[MMUCR.URC].SZ ← PTEL.SZ1<<1 + PTEL.SZ0
-UTLB[MMUCR.URC].SH ← PTEL.SH
-UTLB[MMUCR.URC].PR ← PTEL.PR
-UTLB[MMUCR.URC].WT ← PTEL.WT
-UTLB[MMUCR.URC].C ← PTEL.C
-UTLB[MMUCR.URC].D ← PTEL.D
-UTLB[MMUCR.URC].V ← PTEL.V
+UTLB[MMUCR.URC].ASID ← PTEH.ASID;
+UTLB[MMUCR.URC].VPN ← PTEH.VPN;
+UTLB[MMUCR.URC].PPN ← PTEH.PPN;
+UTLB[MMUCR.URC].SZ ← PTEL.SZ1<<1 + PTEL.SZ0;
+UTLB[MMUCR.URC].SH ← PTEL.SH;
+UTLB[MMUCR.URC].PR ← PTEL.PR;
+UTLB[MMUCR.URC].WT ← PTEL.WT;
+UTLB[MMUCR.URC].C ← PTEL.C;
+UTLB[MMUCR.URC].D ← PTEL.D;
+UTLB[MMUCR.URC].V ← PTEL.V;
diff --git a/sh4/MAC.W @Rm+,@Rn+ b/sh4/MAC.W @Rm+,@Rn+
index 0b62bfc..331664e 100644
--- a/sh4/MAC.W @Rm+,@Rn+	
+++ b/sh4/MAC.W @Rm+,@Rn+	
@@ -16,6 +16,7 @@ n_address ← n_address + 2;
 value1 ← SignExtend16(ReadMemory16(ZeroExtend32(m_address)));
 m_address ← m_address + 2;
 mul ← value2 × value1;
+result ← 0;
 IF (s = 1)
 {
 macl ← SignExtend32(macl) + mul;
@@ -23,7 +24,7 @@ temp ← SignedSaturate32(macl);
 IF (macl = temp)
 result ← (mach << 32) ∨ ZeroExtend32(macl);
 ELSE
-result ← (0x1 << 32) ∨ ZeroExtend32(temp);
+result ← (1 << 32) ∨ ZeroExtend32(temp);
 }
 ELSE
 result ← ((mach << 32) + macl) + mul;
diff --git a/sh4/MOV #imm,Rn b/sh4/MOV #imm,Rn
index 8ce62da..0b96be0 100644
--- a/sh4/MOV #imm,Rn	
+++ b/sh4/MOV #imm,Rn	
@@ -1,4 +1,4 @@
 1110nnnniiiiiiii
-imm ← SignExtend8(s);
+imm ← SignExtend8(i);
 op2 ← imm;
 Rn ← Register(op2);
diff --git a/sh4/MOV.B @(disp,GBR),R0 b/sh4/MOV.B @(disp,GBR),R0
index 1c48af5..ffa1fd2 100644
--- a/sh4/MOV.B @(disp,GBR),R0	
+++ b/sh4/MOV.B @(disp,GBR),R0	
@@ -1,6 +1,6 @@
 11000100dddddddd
 gbr ← SignExtend32(GBR);
-disp ← ZeroExtend8(i);
+disp ← ZeroExtend8(d);
 address ← ZeroExtend32(disp + gbr);
 r0 ← SignExtend8(ReadMemory8(address));
 R0 ← Register(r0);
diff --git a/sh4/MOV.B @(disp,Rm),R0 b/sh4/MOV.B @(disp,Rm),R0
index fb8a2c9..c39399f 100644
--- a/sh4/MOV.B @(disp,Rm),R0	
+++ b/sh4/MOV.B @(disp,Rm),R0	
@@ -1,5 +1,5 @@
 10000100mmmmdddd
-disp ← ZeroExtend4(i);
+disp ← ZeroExtend4(d);
 op2 ← SignExtend32(Rm);
 address ← ZeroExtend32(disp + op2);
 r0 ← SignExtend8(ReadMemory8(address));
diff --git a/sh4/MOV.B R0,@(disp,GBR) b/sh4/MOV.B R0,@(disp,GBR)
index c252085..dec499f 100644
--- a/sh4/MOV.B R0,@(disp,GBR)	
+++ b/sh4/MOV.B R0,@(disp,GBR)	
@@ -1,6 +1,6 @@
 11000000dddddddd
 gbr ← SignExtend32(GBR);
 r0 ← SignExtend32(R0);
-disp ← ZeroExtend8(i);
+disp ← ZeroExtend8(d);
 address ← ZeroExtend32(disp + gbr);
 WriteMemory8(address, r0);
diff --git a/sh4/MOV.B R0,@(disp,Rn) b/sh4/MOV.B R0,@(disp,Rn)
index 1f0267f..3aedde5 100644
--- a/sh4/MOV.B R0,@(disp,Rn)	
+++ b/sh4/MOV.B R0,@(disp,Rn)	
@@ -1,6 +1,6 @@
 10000000nnnndddd
 r0 ← SignExtend32(R0);
-disp ← ZeroExtend4(i);
+disp ← ZeroExtend4(d);
 op2 ← SignExtend32(Rn);
 address ← ZeroExtend32(disp + op2);
 WriteMemory8(address, r0);
diff --git a/sh4/MOV.L @(disp,GBR),R0 b/sh4/MOV.L @(disp,GBR),R0
index 5ea21cd..a0bdbdf 100644
--- a/sh4/MOV.L @(disp,GBR),R0	
+++ b/sh4/MOV.L @(disp,GBR),R0	
@@ -1,6 +1,6 @@
 11000110dddddddd
 gbr ← SignExtend32(GBR);
-disp ← ZeroExtend8(i) << 2;
+disp ← ZeroExtend8(d) << 2;
 address ← ZeroExtend32(disp + gbr);
 r0 ← SignExtend32(ReadMemory32(address));
 R0 ← Register(r0);
diff --git a/sh4/MOV.L @(disp,PC),Rn b/sh4/MOV.L @(disp,PC),Rn
index c8038c1..31fd2c8 100644
--- a/sh4/MOV.L @(disp,PC),Rn	
+++ b/sh4/MOV.L @(disp,PC),Rn	
@@ -1,6 +1,6 @@
 1101nnnndddddddd
 pc ← SignExtend32(PC);
-disp ← ZeroExtend8(i) << 2;
+disp ← ZeroExtend8(d) << 2;
 IF (IsDelaySlot())
 THROW ILLSLOT;
 address ← ZeroExtend32(disp + ((pc + 4) ∧ (~ 0x3)));
diff --git a/sh4/MOV.L @(disp,Rm),Rn b/sh4/MOV.L @(disp,Rm),Rn
index 5713ba0..f58b950 100644
--- a/sh4/MOV.L @(disp,Rm),Rn	
+++ b/sh4/MOV.L @(disp,Rm),Rn	
@@ -1,5 +1,5 @@
 0101nnnnmmmmdddd
-disp ← ZeroExtend4(i) << 2;
+disp ← ZeroExtend4(d) << 2;
 op2 ← SignExtend32(Rm);
 address ← ZeroExtend32(disp + op2);
 op3 ← SignExtend32(ReadMemory32(address));
diff --git a/sh4/MOV.L R0,@(disp,GBR) b/sh4/MOV.L R0,@(disp,GBR)
index 1059389..b46a2ea 100644
--- a/sh4/MOV.L R0,@(disp,GBR)	
+++ b/sh4/MOV.L R0,@(disp,GBR)	
@@ -1,6 +1,6 @@
 11000010dddddddd
 gbr ← SignExtend32(GBR);
 r0 ← SignExtend32(R0);
-disp ← ZeroExtend8(i) << 2;
+disp ← ZeroExtend8(d) << 2;
 address ← ZeroExtend32(disp + gbr);
 WriteMemory32(address, r0);
diff --git a/sh4/MOV.L Rm,@(disp,Rn) b/sh4/MOV.L Rm,@(disp,Rn)
index 3005a39..8a89f87 100644
--- a/sh4/MOV.L Rm,@(disp,Rn)	
+++ b/sh4/MOV.L Rm,@(disp,Rn)	
@@ -1,6 +1,6 @@
 0001nnnnmmmmdddd
 op1 ← SignExtend32(Rm);
-disp ← ZeroExtend4(i) << 2;
+disp ← ZeroExtend4(d) << 2;
 op3 ← SignExtend32(Rn);
 address ← ZeroExtend32(disp + op3);
 WriteMemory32(address, op1);
diff --git a/sh4/MOV.W @(disp,GBR),R0 b/sh4/MOV.W @(disp,GBR),R0
index d67c155..9ebdfe4 100644
--- a/sh4/MOV.W @(disp,GBR),R0	
+++ b/sh4/MOV.W @(disp,GBR),R0	
@@ -1,6 +1,6 @@
 11000101dddddddd
 gbr ← SignExtend32(GBR);
-disp ← ZeroExtend8(i) << 1;
+disp ← ZeroExtend8(d) << 1;
 address ← ZeroExtend32(disp + gbr);
 r0 ← SignExtend16(ReadMemory16(address));
 R0 ← Register(r0);
diff --git a/sh4/MOV.W @(disp,PC),Rn b/sh4/MOV.W @(disp,PC),Rn
index 947f7cd..6907b22 100644
--- a/sh4/MOV.W @(disp,PC),Rn	
+++ b/sh4/MOV.W @(disp,PC),Rn	
@@ -1,6 +1,6 @@
 1001nnnndddddddd
 pc ← SignExtend32(PC);
-disp ← ZeroExtend8(i) << 1;
+disp ← ZeroExtend8(d) << 1;
 IF (IsDelaySlot())
 THROW ILLSLOT;
 address ← ZeroExtend32(disp + (pc + 4));
diff --git a/sh4/MOV.W @(disp,Rm),R0 b/sh4/MOV.W @(disp,Rm),R0
index e1b9016..d18189b 100644
--- a/sh4/MOV.W @(disp,Rm),R0	
+++ b/sh4/MOV.W @(disp,Rm),R0	
@@ -1,5 +1,5 @@
 10000101mmmmdddd
-disp ← ZeroExtend4(i) << 1;
+disp ← ZeroExtend4(d) << 1;
 op2 ← SignExtend32(Rm);
 address ← ZeroExtend32(disp + op2);
 r0 ← SignExtend16(ReadMemory16(address));
diff --git a/sh4/MOV.W R0,@(disp,GBR) b/sh4/MOV.W R0,@(disp,GBR)
index fca1bad..ab025af 100644
--- a/sh4/MOV.W R0,@(disp,GBR)	
+++ b/sh4/MOV.W R0,@(disp,GBR)	
@@ -1,6 +1,6 @@
 11000001dddddddd
 gbr ← SignExtend32(GBR);
 r0 ← SignExtend32(R0);
-disp ← ZeroExtend8(i) << 1;
+disp ← ZeroExtend8(d) << 1;
 address ← ZeroExtend32(disp + gbr);
 WriteMemory16(address, r0);
diff --git a/sh4/MOV.W R0,@(disp,Rn) b/sh4/MOV.W R0,@(disp,Rn)
index 7cb74e7..79420ae 100644
--- a/sh4/MOV.W R0,@(disp,Rn)	
+++ b/sh4/MOV.W R0,@(disp,Rn)	
@@ -1,6 +1,6 @@
 10000001nnnndddd
 r0 ← SignExtend32(R0);
-disp ← ZeroExtend4(i) << 1;
+disp ← ZeroExtend4(d) << 1;
 op2 ← SignExtend32(Rn);
 address ← ZeroExtend32(disp + op2);
 WriteMemory16(address, r0);
diff --git a/sh4/MOVA @(disp,PC),R0 b/sh4/MOVA @(disp,PC),R0
index 4b56df8..f5b8701 100644
--- a/sh4/MOVA @(disp,PC),R0	
+++ b/sh4/MOVA @(disp,PC),R0	
@@ -1,6 +1,6 @@
 11000111dddddddd
 pc ← SignExtend32(PC);
-disp ← ZeroExtend8(i) << 2;
+disp ← ZeroExtend8(d) << 2;
 IF (IsDelaySlot())
 THROW ILLSLOT;
 r0 ← disp + ((pc + 4) ∧ (~ 0x3));
diff --git a/sh4/MOVCA.L R0,@Rn b/sh4/MOVCA.L R0,@Rn
index 26a669e..643e192 100644
--- a/sh4/MOVCA.L R0,@Rn	
+++ b/sh4/MOVCA.L R0,@Rn	
@@ -8,7 +8,7 @@ THROW WTLBMISS, op1;
 IF (MMU() AND WriteProhibited(op1))
 THROW WRITEPROT, op1;
 IF (MMU() AND NOT DirtyBit(op1))
-THROW FIRSTWRITE, op1
+THROW FIRSTWRITE, op1;
 ALLOCO(op1);
 address ← ZeroExtend32(op1);
 WriteMemory32(op1, r0);
diff --git a/sh4/NOP b/sh4/NOP
index 5ea6cad..60af21d 100644
--- a/sh4/NOP
+++ b/sh4/NOP
@@ -1,2 +1,2 @@
 0000000000001001
-NOP
+NOP;
diff --git a/sh4/OCBI @Rn b/sh4/OCBI @Rn
index e576219..4963caa 100644
--- a/sh4/OCBI @Rn	
+++ b/sh4/OCBI @Rn	
@@ -7,5 +7,5 @@ THROW WTLBMISS, op1;
 IF (MMU() AND WriteProhibited(op1))
 THROW WRITEPROT, op1;
 IF (MMU() AND NOT DirtyBit(op1))
-THROW FIRSTWRITE, op1
+THROW FIRSTWRITE, op1;
 OCBI(op1);
diff --git a/sh4/PREF @Rn b/sh4/PREF @Rn
index ff0a131..b177677 100644
--- a/sh4/PREF @Rn	
+++ b/sh4/PREF @Rn	
@@ -1,7 +1,7 @@
 0000nnnn10000011
 op1 ← SignExtend32(Rn);
 IF (AddressUnavailable(op1))
-THROW RADDERR, op1
+THROW RADDERR, op1;
 IF (NOT (MMU() AND DataAccessMiss(op1)))
 IF (NOT (MMU() AND ReadProhibited(op1)))
 PREF(op1);
diff --git a/sh4/RTE b/sh4/RTE
index 8c3a2b3..f9e3eb3 100644
--- a/sh4/RTE
+++ b/sh4/RTE
@@ -3,7 +3,7 @@ md ← ZeroExtend1(MD);
 IF (md = 0)
 THROW RESINST;
 ssr ← SignExtend32(SSR);
-pc ← SignExtend32(PC)
+pc ← SignExtend32(PC);
 IF (IsDelaySlot())
 THROW ILLSLOT;
 target ← pc;
diff --git a/sh4/SLEEP b/sh4/SLEEP
index a22624c..737b199 100644
--- a/sh4/SLEEP
+++ b/sh4/SLEEP
@@ -2,4 +2,4 @@
 md ← ZeroExtend1(MD);
 IF (md = 0)
 THROW RESINST;
-SLEEP()
+SLEEP();
diff --git a/sh4/STC DBR,Rn b/sh4/STC DBR,Rn
index 4f57ecd..4da979c 100644
--- a/sh4/STC DBR,Rn	
+++ b/sh4/STC DBR,Rn	
@@ -3,5 +3,5 @@ md ← ZeroExtend1(MD);
 IF (md = 0)
 THROW RESINST;
 dbr ← SignExtend32(DBR);
-op1 ← dbr
+op1 ← dbr;
 Rn ← Register(op1);
diff --git a/sh4/STC SGR,Rn b/sh4/STC SGR,Rn
index c484fa6..311edad 100644
--- a/sh4/STC SGR,Rn	
+++ b/sh4/STC SGR,Rn	
@@ -3,5 +3,5 @@ md ← ZeroExtend1(MD);
 IF (md = 0)
 THROW RESINST;
 sgr ← SignExtend32(SGR);
-op1 ← sgr
+op1 ← sgr;
 Rn ← Register(op1);
diff --git a/sh4/STC SPC,Rn b/sh4/STC SPC,Rn
index 7f0482c..cbe5e0e 100644
--- a/sh4/STC SPC,Rn	
+++ b/sh4/STC SPC,Rn	
@@ -3,5 +3,5 @@ md ← ZeroExtend1(MD);
 IF (md = 0)
 THROW RESINST;
 spc ← SignExtend32(SPC);
-op1 ← spc
+op1 ← spc;
 Rn ← Register(op1);
diff --git a/sh4/STC SR,Rn b/sh4/STC SR,Rn
index 71e1aba..f97f7b6 100644
--- a/sh4/STC SR,Rn	
+++ b/sh4/STC SR,Rn	
@@ -3,5 +3,5 @@ md ← ZeroExtend1(MD);
 IF (md = 0)
 THROW RESINST;
 sr ← SignExtend32(SR);
-op1 ← sr
+op1 ← sr;
 Rn ← Register(op1);
diff --git a/sh4/STC SSR,Rn b/sh4/STC SSR,Rn
index 70b7b88..3b45569 100644
--- a/sh4/STC SSR,Rn	
+++ b/sh4/STC SSR,Rn	
@@ -3,5 +3,5 @@ md ← ZeroExtend1(MD);
 IF (md = 0)
 THROW RESINST;
 ssr ← SignExtend32(SSR);
-op1 ← ssr
+op1 ← ssr;
 Rn ← Register(op1);
diff --git a/sh4/STC VBR,Rn b/sh4/STC VBR,Rn
index b15a795..c9ca754 100644
--- a/sh4/STC VBR,Rn	
+++ b/sh4/STC VBR,Rn	
@@ -3,5 +3,5 @@ md ← ZeroExtend1(MD);
 IF (md = 0)
 THROW RESINST;
 vbr ← SignExtend32(VBR);
-op1 ← vbr
+op1 ← vbr;
 Rn ← Register(op1);
diff --git a/sh4/TAS.B @Rn b/sh4/TAS.B @Rn
index 721b277..cc58ae7 100644
--- a/sh4/TAS.B @Rn	
+++ b/sh4/TAS.B @Rn	
@@ -1,7 +1,7 @@
 0100nnnn00011011
 op1 ← SignExtend32(Rn);
 address ← ZeroExtend32(op1);
-OCBP(address)
+OCBP(address);
 value ← ZeroExtend8(ReadMemory8(address));
 t ← INT (value = 0);
 value ← value ∨ (1 << 7);