163 lines
3.0 KiB
C
163 lines
3.0 KiB
C
#include "type.h"
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typedef struct scu_reg {
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reg32 D0R;
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reg32 D0W;
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reg32 D0C;
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reg32 D0AD;
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reg32 D0EN;
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reg32 D0MD;
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reg32 _res0;
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reg32 _res1;
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reg32 D1R;
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reg32 D1W;
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reg32 D1C;
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reg32 D1AD;
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reg32 D1EN;
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reg32 D1MD;
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reg32 _res2;
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reg32 _res3;
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reg32 D2R;
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reg32 D2W;
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reg32 D2C;
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reg32 D2AD;
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reg32 D2EN;
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reg32 D2MD;
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reg32 _res4;
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reg32 _res5;
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reg32 DTSP;
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reg32 _res6;
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reg32 _res7;
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reg32 _res8;
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reg32 _res9;
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reg32 _res10;
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reg32 _res11;
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reg32 DTSA;
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reg32 PPAF;
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reg32 PPD;
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reg32 PDA;
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reg32 PDD;
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reg32 T0C;
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reg32 T1S;
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reg32 T1MD;
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reg32 _res12;
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reg32 IMS;
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reg32 IST;
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reg32 AIACK;
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reg32 _res13;
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reg32 ASR0;
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reg32 ASR1;
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reg32 AREF;
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reg32 _res14;
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reg32 _res15;
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reg32 RSEL;
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reg32 VER;
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reg32 _res16;
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} scu_reg;
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static_assert((sizeof (struct scu_reg)) == 0xD0);
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static_assert((offsetof (struct scu_reg, D1R)) == 0x20);
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static_assert((offsetof (struct scu_reg, AIACK)) == 0xA8);
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struct scu {
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scu_reg reg;
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};
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extern struct scu scu __asm("scu");
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/* bits */
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enum ims_bits {
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IMS__A_BUS = (1 << 15),
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IMS__DRAW_END = (1 << 13),
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IMS__DMA_ILLEGAL = (1 << 12),
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IMS__DMA0_END = (1 << 11),
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IMS__DMA1_END = (1 << 10),
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IMS__DMA2_END = (1 << 9),
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IMS__PAD = (1 << 8),
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IMS__SMPC = (1 << 7),
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IMS__SOUND_REQUEST = (1 << 6),
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IMS__DSP_END = (1 << 5),
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IMS__TIMER1 = (1 << 4),
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IMS__TIMER0 = (1 << 3),
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IMS__H_BLANK_IN = (1 << 2),
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IMS__V_BLANK_OUT = (1 << 1),
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IMS__V_BLANK_IN = (1 << 0),
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};
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enum ist_bits {
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IST__EXT15 = (1 << 31),
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IST__EXT14 = (1 << 30),
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IST__EXT13 = (1 << 29),
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IST__EXT12 = (1 << 28),
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IST__EXT11 = (1 << 27),
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IST__EXT10 = (1 << 26),
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IST__EXT09 = (1 << 25),
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IST__EXT08 = (1 << 24),
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IST__EXT07 = (1 << 23),
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IST__EXT06 = (1 << 22),
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IST__EXT05 = (1 << 21),
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IST__EXT04 = (1 << 20),
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IST__EXT03 = (1 << 19),
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IST__EXT02 = (1 << 18),
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IST__EXT01 = (1 << 17),
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IST__EXT00 = (1 << 16),
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IST__DRAW_END = (1 << 13),
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IST__DMA_ILLEGAL = (1 << 12),
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IST__DMA0_END = (1 << 11),
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IST__DMA1_END = (1 << 10),
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IST__DMA2_END = (1 << 9),
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IST__PAD = (1 << 8),
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IST__SMPC = (1 << 7),
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IST__SOUND_REQUEST = (1 << 6),
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IST__DSP_END = (1 << 5),
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IST__TIMER1 = (1 << 4),
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IST__TIMER0 = (1 << 3),
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IST__H_BLANK_IN = (1 << 2),
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IST__V_BLANK_OUT = (1 << 1),
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IST__V_BLANK_IN = (1 << 0),
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};
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enum t1md_bits {
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T1MD__T1MD = (1 << 8),
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T1MD__TENB = (1 << 0),
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};
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enum scu_vec {
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SCU_VEC__V_BLANK_IN = 0x40,
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SCU_VEC__V_BLANK_OUT,
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SCU_VEC__H_BLANK_IN,
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SCU_VEC__TIMER0,
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SCU_VEC__TIMER1,
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SCU_VEC__DSP_END,
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SCU_VEC__SOUND_REQUEST,
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SCU_VEC__SMPC,
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SCU_VEC__PAD,
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SCU_VEC__DMA2_END,
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SCU_VEC__DMA1_END,
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SCU_VEC__DMA0_END,
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SCU_VEC__DMA_ILLEGAL,
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SCU_VEC__DRAW_END,
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__scu_vec_res0,
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__scu_vec_res1,
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SCU_VEC__EXT00,
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SCU_VEC__EXT01,
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SCU_VEC__EXT02,
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SCU_VEC__EXT03,
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SCU_VEC__EXT04,
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SCU_VEC__EXT05,
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SCU_VEC__EXT06,
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SCU_VEC__EXT07,
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SCU_VEC__EXT08,
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SCU_VEC__EXT09,
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SCU_VEC__EXT10,
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SCU_VEC__EXT11,
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SCU_VEC__EXT12,
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SCU_VEC__EXT13,
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SCU_VEC__EXT14,
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SCU_VEC__EXT15,
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};
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static_assert(SCU_VEC__EXT15 == 0x5f);
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