vdp*: add/improve bit definitions
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0eac09e58a
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47
vdp1.h
47
vdp1.h
@ -65,16 +65,20 @@ enum ctrl_bit {
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};
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enum pmod_bit {
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CTRL__PMOD__MON = (1 << 15),
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CTRL__PMOD__HSS = (1 << 12),
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CTRL__PMOD__PCLP = (1 << 11),
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CTRL__PMOD__CLIP = (1 << 10),
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CTRL__PMOD__CMOD = (1 << 9),
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CTRL__PMOD__MESH = (1 << 8),
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CTRL__PMOD__ECD = (1 << 7),
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CTRL__PMOD__SPD = (1 << 6),
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#define CTRL__PMOD__COLOR_MODE ( << 3)
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#define CTRL__PMOD__COLOR_CALCULATION ( << 0)
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PMOD__MON = (1 << 15),
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PMOD__HSS = (1 << 12),
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PMOD__PCLP = (1 << 11),
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PMOD__CLIP = (1 << 10),
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PMOD__CMOD = (1 << 9),
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PMOD__MESH = (1 << 8),
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PMOD__ECD = (1 << 7),
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PMOD__SPD = (1 << 6),
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#define PMOD__COLOR_MODE ( << 3)
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#define PMOD__COLOR_CALCULATION ( << 0)
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};
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enum colr_bit {
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COLR__RGB = (1 << 15)
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};
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/* memory offsets */
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@ -135,12 +139,11 @@ extern struct vdp1 vdp1 __asm("vdp1");
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enum tvmr_bit {
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TVMR__VBE = (1 << 3),
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TVMR__TVM__NTSC_PAL = (0 << 2),
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TVMR__TVM__HDTV_31KC = (1 << 2),
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TVMR__TVM__FRAMEBUFFER_NONROTATION = (0 << 1),
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TVMR__TVM__FRAMEBUFFER_ROTATION = (1 << 1),
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TVMR__TVM__16BPP = (0 << 0),
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TVMR__TVM__8BPP = (1 << 0),
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TVMR__TVM__NORMAL = (0b000 << 0),
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TVMR__TVM__HIGH_RESOLUTION = (0b001 << 0),
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TVMR__TVM__ROTATION_16 = (0b010 << 0),
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TVMR__TVM__ROTATION_8 = (0b011 << 0),
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TVMR__TVM__HDTV = (0b100 << 0),
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};
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enum fbcr_bit {
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@ -158,13 +161,13 @@ enum ptmr_bit {
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};
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// enum ewlr_bit {
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#define PTMR__EWLR__16BPP_X1(n) ((n / 8 ) << 9)
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#define PTMR__EWLR__8BPP_X1(n) ((n / 16) << 9)
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#define PTMR__EWLR__Y1(n) (n << 0)
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#define EWLR__16BPP_X1(n) ((n / 8 ) << 9)
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#define EWLR__8BPP_X1(n) ((n / 16) << 9)
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#define EWLR__Y1(n) (n << 0)
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// }
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// enum ewrr_bit {
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#define PTMR__EWRR__16BPP_X3(n) (((n + 1) / 8 ) << 9)
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#define PTMR__EWLR__8BPP_X3(n) (((n + 1) / 16) << 9)
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#define PTMR__EWRR__Y3(n) (n << 0)
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#define EWRR__16BPP_X3(n) (((n + 1) / 8 ) << 9)
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#define EWLR__8BPP_X3(n) (((n + 1) / 16) << 9)
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#define EWRR__Y3(n) (n << 0)
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// }
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8
vdp2.h
8
vdp2.h
@ -622,12 +622,20 @@ enum bktau_bit {
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// enum sfccmd_bit {
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// };
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// enum prisa_bit {
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#define PRISA__S1PRIN(n) (n << 8)
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#define PRISA__S0PRIN(n) (n << 0)
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// };
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// enum prisb_bit {
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#define PRISA__S3PRIN(n) (n << 8)
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#define PRISA__S2PRIN(n) (n << 0)
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// };
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// enum prisc_bit {
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#define PRISA__S5PRIN(n) (n << 8)
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#define PRISA__S4PRIN(n) (n << 0)
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// };
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// enum prisd_bit {
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#define PRISA__S7PRIN(n) (n << 8)
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#define PRISA__S6PRIN(n) (n << 0)
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// };
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// enum prina_bit {
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// };
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