11 lines
880 B
Plaintext
11 lines
880 B
Plaintext
Field Name Bits Default Description
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DATA_REGISTER 31:0 0x0 This register is used to force a flush of the PVS block
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when single-buffered updates are performed. The multi-
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state control of PVS Code and Const memories by the
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driver is primarily for more flexible PVS state control
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and for performance testing. When this register address
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is written, the State Block will force a flush of PVS
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processing so that both versions of PVS state are
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available before updates are processed. This register is
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write only, and the data that is written is unused.
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