r500/regs/pcie_registers.inc

{
  .name = "PCIE_TX_CNTL",
  .address = 0x1,
},
{
  .name = "PCIE_TX_GART_CNTL",
  .address = 0x10,
},
{
  .name = "PCIE_TX_GART_DISCARD_RD_ADDR_LO",
  .address = 0x11,
},
{
  .name = "PCIE_TX_GART_DISCARD_RD_ADDR_HI",
  .address = 0x12,
},
{
  .name = "PCIE_TX_GART_BASE",
  .address = 0x13,
},
{
  .name = "PCIE_TX_GART_START_LO",
  .address = 0x14,
},
{
  .name = "PCIE_TX_GART_START_HI",
  .address = 0x15,
},
{
  .name = "PCIE_TX_GART_END_LO",
  .address = 0x16,
},
{
  .name = "PCIE_TX_GART_END_HI",
  .address = 0x17,
},
{
  .name = "PCIE_TX_GART_ERROR",
  .address = 0x18,
},
{
  .name = "PCIE_TX_SEQ",
  .address = 0x2,
},
{
  .name = "PCIE_TX_GART_LRU_MRU_PTR",
  .address = 0x20,
},
{
  .name = "PCIE_TX_GART_STATUS",
  .address = 0x21,
},
{
  .name = "PCIE_TX_GART_TLB_VALID",
  .address = 0x22,
},
{
  .name = "PCIE_TX_GART_TLB0_DATA",
  .address = 0x23,
},
{
  .name = "PCIE_TX_GART_TLB1_DATA",
  .address = 0x24,
},
{
  .name = "PCIE_TX_GART_TLB2_DATA",
  .address = 0x25,
},
{
  .name = "PCIE_TX_GART_TLB3_DATA",
  .address = 0x26,
},
{
  .name = "PCIE_TX_GART_TLB4_DATA",
  .address = 0x27,
},
{
  .name = "PCIE_TX_GART_TLB5_DATA",
  .address = 0x28,
},
{
  .name = "PCIE_TX_GART_TLB6_DATA",
  .address = 0x29,
},
{
  .name = "PCIE_TX_GART_TLB7_DATA",
  .address = 0x2a,
},
{
  .name = "PCIE_TX_GART_TLB8_DATA",
  .address = 0x2b,
},
{
  .name = "PCIE_TX_GART_TLB9_DATA",
  .address = 0x2c,
},
{
  .name = "PCIE_TX_GART_TLB10_DATA",
  .address = 0x2d,
},
{
  .name = "PCIE_TX_GART_TLB11_DATA",
  .address = 0x2e,
},
{
  .name = "PCIE_TX_GART_TLB12_DATA",
  .address = 0x2f,
},
{
  .name = "PCIE_TX_REPLAY",
  .address = 0x3,
},
{
  .name = "PCIE_TX_GART_TLB13_DATA",
  .address = 0x30,
},
{
  .name = "PCIE_TX_GART_TLB14_DATA",
  .address = 0x31,
},
{
  .name = "PCIE_TX_GART_TLB15_DATA",
  .address = 0x32,
},
{
  .name = "PCIE_TX_GART_TLB16_DATA",
  .address = 0x33,
},
{
  .name = "PCIE_TX_GART_TLB17_DATA",
  .address = 0x34,
},
{
  .name = "PCIE_TX_GART_TLB18_DATA",
  .address = 0x35,
},
{
  .name = "PCIE_TX_GART_TLB19_DATA",
  .address = 0x36,
},
{
  .name = "PCIE_TX_GART_TLB20_DATA",
  .address = 0x37,
},
{
  .name = "PCIE_TX_GART_TLB21_DATA",
  .address = 0x38,
},
{
  .name = "PCIE_TX_GART_TLB22_DATA",
  .address = 0x39,
},
{
  .name = "PCIE_TX_GART_TLB23_DATA",
  .address = 0x3a,
},
{
  .name = "PCIE_TX_GART_TLB24_DATA",
  .address = 0x3b,
},
{
  .name = "PCIE_TX_GART_TLB25_DATA",
  .address = 0x3c,
},
{
  .name = "PCIE_TX_GART_TLB26_DATA",
  .address = 0x3d,
},
{
  .name = "PCIE_TX_GART_TLB27_DATA",
  .address = 0x3e,
},
{
  .name = "PCIE_TX_GART_TLB28_DATA",
  .address = 0x3f,
},
{
  .name = "PCIE_TX_CREDITS_CONSUMED",
  .address = 0x4,
},
{
  .name = "PCIE_TX_GART_TLB29_DATA",
  .address = 0x40,
},
{
  .name = "PCIE_CLK_CNTL",
  .address = 0x400,
},
{
  .name = "PCIE_PRBS10",
  .address = 0x401,
},
{
  .name = "PCIE_PRBS23_BITCNT0",
  .address = 0x402,
},
{
  .name = "PCIE_PRBS23_BITCNT1",
  .address = 0x403,
},
{
  .name = "PCIE_PRBS23_BITCNT2",
  .address = 0x404,
},
{
  .name = "PCIE_PRBS23_BITCNT3",
  .address = 0x405,
},
{
  .name = "PCIE_PRBS23_BITCNT4",
  .address = 0x406,
},
{
  .name = "PCIE_PRBS23_BITCNT5",
  .address = 0x407,
},
{
  .name = "PCIE_PRBS23_BITCNT6",
  .address = 0x408,
},
{
  .name = "PCIE_PRBS23_BITCNT7",
  .address = 0x409,
},
{
  .name = "PCIE_PRBS23_BITCNT8",
  .address = 0x40a,
},
{
  .name = "PCIE_PRBS23_BITCNT9",
  .address = 0x40b,
},
{
  .name = "PCIE_PRBS23_BITCNT10",
  .address = 0x40c,
},
{
  .name = "PCIE_PRBS23_BITCNT11",
  .address = 0x40d,
},
{
  .name = "PCIE_PRBS23_BITCNT12",
  .address = 0x40e,
},
{
  .name = "PCIE_PRBS23_BITCNT13",
  .address = 0x40f,
},
{
  .name = "PCIE_TX_GART_TLB30_DATA",
  .address = 0x41,
},
{
  .name = "PCIE_PRBS23_BITCNT14",
  .address = 0x410,
},
{
  .name = "PCIE_PRBS23_BITCNT15",
  .address = 0x411,
},
{
  .name = "PCIE_PRBS23_ERRCNT0",
  .address = 0x412,
},
{
  .name = "PCIE_PRBS23_ERRCNT1",
  .address = 0x413,
},
{
  .name = "PCIE_PRBS23_ERRCNT2",
  .address = 0x414,
},
{
  .name = "PCIE_PRBS23_ERRCNT3",
  .address = 0x415,
},
{
  .name = "PCIE_PRBS23_ERRCNT4",
  .address = 0x416,
},
{
  .name = "PCIE_PRBS23_ERRCNT5",
  .address = 0x417,
},
{
  .name = "PCIE_PRBS23_ERRCNT6",
  .address = 0x418,
},
{
  .name = "PCIE_PRBS23_ERRCNT7",
  .address = 0x419,
},
{
  .name = "PCIE_PRBS23_ERRCNT8",
  .address = 0x41a,
},
{
  .name = "PCIE_PRBS23_ERRCNT9",
  .address = 0x41b,
},
{
  .name = "PCIE_PRBS23_ERRCNT10",
  .address = 0x41c,
},
{
  .name = "PCIE_PRBS23_ERRCNT11",
  .address = 0x41d,
},
{
  .name = "PCIE_PRBS23_ERRCNT12",
  .address = 0x41e,
},
{
  .name = "PCIE_PRBS23_ERRCNT13",
  .address = 0x41f,
},
{
  .name = "PCIE_TX_GART_TLB31_DATA",
  .address = 0x42,
},
{
  .name = "PCIE_PRBS23_ERRCNT14",
  .address = 0x420,
},
{
  .name = "PCIE_PRBS23_ERRCNT15",
  .address = 0x421,
},
{
  .name = "PCIE_PRBS23_CTRL0",
  .address = 0x422,
},
{
  .name = "PCIE_PRBS23_CTRL1",
  .address = 0x423,
},
{
  .name = "PCIE_PRBS_EN",
  .address = 0x424,
},
{
  .name = "PCIE_XSTRAP1",
  .address = 0x425,
},
{
  .name = "PCIE_XSTRAP2",
  .address = 0x426,
},
{
  .name = "PCIE_XSTRAP5",
  .address = 0x429,
},
{
  .name = "PCIE_TX_CREDITS_CONSUMED_D",
  .address = 0x5,
},
{
  .name = "PCIE_TX_CREDITS_CONSUMED_CPLD",
  .address = 0x6,
},
{
  .name = "PCIE_FLOW_CNTL",
  .address = 0x60,
},
{
  .name = "PCIE_TXRX_DEBUG_SEQNUM",
  .address = 0x61,
},
{
  .name = "PCIE_TXRX_TEST_MODE",
  .address = 0x62,
},
{
  .name = "PCIE_TX_CREDITS_LIMIT",
  .address = 0x7,
},
{
  .name = "PCIE_RX_CNTL",
  .address = 0x70,
},
{
  .name = "PCIE_RX_NUM_NACK",
  .address = 0x71,
},
{
  .name = "PCIE_RX_NUM_NACK_GENERATED",
  .address = 0x72,
},
{
  .name = "PCIE_RX_ACK_NACK_LATENCY",
  .address = 0x73,
},
{
  .name = "PCIE_RX_ACK_NACK_LATENCY_THRESHOLD",
  .address = 0x74,
},
{
  .name = "PCIE_RX_TLP_HDR0",
  .address = 0x75,
},
{
  .name = "PCIE_RX_TLP_HDR1",
  .address = 0x76,
},
{
  .name = "PCIE_RX_TLP_HDR2",
  .address = 0x77,
},
{
  .name = "PCIE_RX_TLP_HDR3",
  .address = 0x78,
},
{
  .name = "PCIE_RX_TLP_HDR4",
  .address = 0x79,
},
{
  .name = "PCIE_RX_TLP_CRC",
  .address = 0x7a,
},
{
  .name = "PCIE_RX_DLP0",
  .address = 0x7b,
},
{
  .name = "PCIE_RX_DLP1",
  .address = 0x7c,
},
{
  .name = "PCIE_RX_DLP_CRC",
  .address = 0x7d,
},
{
  .name = "PCIE_RX_CREDITS_ALLOCATED",
  .address = 0x7e,
},
{
  .name = "PCIE_RX_CREDITS_ALLOCATED_D",
  .address = 0x7f,
},
{
  .name = "PCIE_TX_CREDITS_LIMIT_D",
  .address = 0x8,
},
{
  .name = "PCIE_RX_CREDITS_ALLOCATED_CPLD",
  .address = 0x80,
},
{
  .name = "PCIE_RX_CREDITS_RECEIVED",
  .address = 0x81,
},
{
  .name = "PCIE_RX_CREDITS_RECEIVED_D",
  .address = 0x82,
},
{
  .name = "PCIE_RX_CREDITS_RECEIVED_CPLD",
  .address = 0x83,
},
{
  .name = "PCIE_RX_MAL_TLP_COUNT",
  .address = 0x84,
},
{
  .name = "PCIE_RX_ERR_LOG",
  .address = 0x85,
},
{
  .name = "PCIE_RX_EXPECTED_SEQNUM",
  .address = 0x86,
},
{
  .name = "PCIE_TX_CREDITS_LIMIT_CPLD",
  .address = 0x9,
},
{
  .name = "PCIE_CI_CNTL",
  .address = 0x90,
},
{
  .name = "PCIE_CI_FLUSH_CNTL",
  .address = 0x91,
},
{
  .name = "PCIE_CI_PANIC",
  .address = 0x92,
},
{
  .name = "PCIE_CI_HANG",
  .address = 0x93,
},
{
  .name = "PCIE_LC_CNTL",
  .address = 0xa0,
},
{
  .name = "PCIE_LC_N_FTS_CNTL",
  .address = 0xa1,
},
{
  .name = "PCIE_LC_LINK_WIDTH_CNTL",
  .address = 0xa2,
},
{
  .name = "PCIE_LC_STATE0",
  .address = 0xa5,
},
{
  .name = "PCIE_LC_STATE1",
  .address = 0xa6,
},
{
  .name = "PCIE_LC_STATE2",
  .address = 0xa7,
},
{
  .name = "PCIE_LC_STATE3",
  .address = 0xa8,
},
{
  .name = "PCIE_LC_STATE4",
  .address = 0xa9,
},
{
  .name = "PCIE_LC_STATE5",
  .address = 0xaa,
},
{
  .name = "PCIE_LC_FORCE_SYNC_LOSS_CNTL",
  .address = 0xab,
},
{
  .name = "PCIE_P_CNTL",
  .address = 0xb0,
},
{
  .name = "PCIE_P_CNTL2",
  .address = 0xb1,
},
{
  .name = "PCIE_P_BUF_STATUS",
  .address = 0xb2,
},
{
  .name = "PCIE_P_DECODER_STATUS",
  .address = 0xb3,
},
{
  .name = "PCIE_P_MISC_DEBUG_STATUS",
  .address = 0xb4,
},
{
  .name = "PCIE_P_IMP_CNTL_STRENGTH",
  .address = 0xc0,
},
{
  .name = "PCIE_P_IMP_CNTL_UPDATE",
  .address = 0xc1,
},
{
  .name = "PCIE_P_STR_CNTL_UPDATE",
  .address = 0xc2,
},
{
  .name = "PCIE_P_PAD_MISC_CNTL",
  .address = 0xc3,
},
{
  .name = "PCIE_P_SYMSYNC_CTL",
  .address = 0xc4,
},
{
  .name = "PCIE_P_DECODE_ERR_CNTL",
  .address = 0xc5,
},
{
  .name = "PCIE_ERR_CNTL",
  .address = 0xe0,
},
{
  .name = "PCIE_CLK_RST_CNTL",
  .address = 0xe1,
},
{
  .name = "PCIE_P_DECODE_ERR_CNT_0",
  .address = 0xf0,
},
{
  .name = "PCIE_P_DECODE_ERR_CNT_1",
  .address = 0xf1,
},
{
  .name = "PCIE_P_DECODE_ERR_CNT_2",
  .address = 0xf2,
},
{
  .name = "PCIE_P_DECODE_ERR_CNT_3",
  .address = 0xf3,
},
{
  .name = "PCIE_P_DECODE_ERR_CNT_4",
  .address = 0xf4,
},
{
  .name = "PCIE_P_DECODE_ERR_CNT_5",
  .address = 0xf5,
},
{
  .name = "PCIE_P_DECODE_ERR_CNT_6",
  .address = 0xf6,
},
{
  .name = "PCIE_P_DECODE_ERR_CNT_7",
  .address = 0xf7,
},
{
  .name = "PCIE_P_DECODE_ERR_CNT_8",
  .address = 0xf8,
},
{
  .name = "PCIE_P_DECODE_ERR_CNT_9",
  .address = 0xf9,
},
{
  .name = "PCIE_P_DECODE_ERR_CNT_10",
  .address = 0xfa,
},
{
  .name = "PCIE_P_DECODE_ERR_CNT_11",
  .address = 0xfb,
},
{
  .name = "PCIE_P_DECODE_ERR_CNT_12",
  .address = 0xfc,
},
{
  .name = "PCIE_P_DECODE_ERR_CNT_13",
  .address = 0xfd,
},
{
  .name = "PCIE_P_DECODE_ERR_CNT_14",
  .address = 0xfe,
},
{
  .name = "PCIE_P_DECODE_ERR_CNT_15",
  .address = 0xff,
},