176 lines
6.1 KiB
Python
176 lines
6.1 KiB
Python
from os import path
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from pprint import pprint
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from functools import partial
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import parse_bits
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from assembler.fs.validator import SrcAddrType
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class BaseRegister:
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def set(self, code, value, *, code_ix, descriptor):
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if type(descriptor.bits) is int:
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mask = 1
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low = descriptor.bits
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else:
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high, low = descriptor.bits
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assert high > low
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mask_length = (high - low) + 1
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mask = (1 << mask_length) - 1
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code_value = code[code_ix]
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assert (code_value >> low) & mask == 0
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assert value & mask == value
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code[code_ix] |= (value & mask) << low
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_descriptor_indicies = {
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"US_CMN_INST": 0,
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"US_ALU_RGB_ADDR": 1,
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"US_ALU_ALPHA_ADDR": 2,
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"US_ALU_RGB_INST": 3,
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"US_ALU_ALPHA_INST": 4,
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"US_ALU_RGBA_INST": 5,
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"US_TEX_INST": 1,
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"US_TEX_ADDR": 2,
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"US_TEX_ADDR_DXDY": 3,
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"US_FC_INST": 2,
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"US_FC_ADDR": 3,
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}
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def parse_register(register_name):
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base = path.dirname(__file__)
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filename = path.join(base, "..", "..", "bits", register_name.lower() + ".txt")
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l = list(parse_bits.parse_file_fields(filename))
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cls = type(register_name, (BaseRegister,), {})
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instance = cls()
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descriptors = list(parse_bits.aggregate(l))
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code_ix = _descriptor_indicies[register_name]
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for descriptor in descriptors:
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setattr(instance, descriptor.field_name,
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partial(instance.set, code_ix=code_ix, descriptor=descriptor))
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func = getattr(instance, descriptor.field_name)
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for pv_value, (pv_name, _) in descriptor.possible_values.items():
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if pv_name is not None:
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setattr(func, pv_name, pv_value)
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assert getattr(instance, "descriptors", None) is None
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instance.descriptors = descriptors
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return instance
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US_CMN_INST = parse_register("US_CMN_INST")
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US_ALU_RGB_ADDR = parse_register("US_ALU_RGB_ADDR")
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US_ALU_ALPHA_ADDR = parse_register("US_ALU_ALPHA_ADDR")
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US_ALU_RGB_INST = parse_register("US_ALU_RGB_INST")
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US_ALU_ALPHA_INST = parse_register("US_ALU_ALPHA_INST")
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US_ALU_RGBA_INST = parse_register("US_ALU_RGBA_INST")
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US_TEX_INST = parse_register("US_TEX_INST")
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US_TEX_ADDR = parse_register("US_TEX_ADDR")
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US_TEX_ADDR_DXDY = parse_register("US_TEX_ADDR_DXDY")
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US_FC_INST = parse_register("US_FC_INST")
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US_FC_ADDR = parse_register("US_FC_ADDR")
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def emit_alpha_op(code, alpha_op):
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# dest
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if alpha_op.dest.wmask is not None:
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US_CMN_INST.ALPHA_WMASK(code, alpha_op.dest.wmask.value)
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if alpha_op.dest.omask is not None:
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US_CMN_INST.ALPHA_OMASK(code, alpha_op.dest.omask.value)
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# opcode
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US_ALU_ALPHA_INST.ALPHA_OP(code, alpha_op.opcode.value)
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# sels
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srcs = [
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US_ALU_ALPHA_INST.ALPHA_SEL_A,
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US_ALU_ALPHA_INST.ALPHA_SEL_B,
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US_ALU_RGBA_INST.ALPHA_SEL_C,
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]
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swizzles = [
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[US_ALU_ALPHA_INST.ALPHA_SWIZ_A],
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[US_ALU_ALPHA_INST.ALPHA_SWIZ_B],
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[US_ALU_RGBA_INST.ALPHA_SWIZ_C],
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]
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mods = [
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US_ALU_ALPHA_INST.ALPHA_MOD_A,
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US_ALU_ALPHA_INST.ALPHA_MOD_B,
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US_ALU_RGBA_INST.ALPHA_MOD_C,
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]
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for sel, src_func, swizzle_funcs, mod_func in zip(alpha_op.sels,
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srcs, swizzles, mods):
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src_func(code, sel.src.value)
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assert len(sel.swizzle) == 1
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assert len(swizzle_funcs) == 1
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for swizzle_func, swizzle in zip(swizzle_funcs, sel.swizzle):
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swizzle_func(code, swizzle.value)
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mod_func(code, sel.mod.value)
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def emit_rgb_op(code, rgb_op):
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# dest
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if rgb_op.dest.wmask is not None:
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US_CMN_INST.RGB_WMASK(code, rgb_op.dest.wmask.value)
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if rgb_op.dest.omask is not None:
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US_CMN_INST.RGB_OMASK(code, rgb_op.dest.omask.value)
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# opcode
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US_ALU_RGBA_INST.RGB_OP(code, rgb_op.opcode.value)
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# sels
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srcs = [
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US_ALU_RGB_INST.RGB_SEL_A,
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US_ALU_RGB_INST.RGB_SEL_B,
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US_ALU_RGBA_INST.RGB_SEL_C,
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]
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swizzles = [
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[US_ALU_RGB_INST.RED_SWIZ_A, US_ALU_RGB_INST.GREEN_SWIZ_A, US_ALU_RGB_INST.BLUE_SWIZ_A],
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[US_ALU_RGB_INST.RED_SWIZ_B, US_ALU_RGB_INST.GREEN_SWIZ_B, US_ALU_RGB_INST.BLUE_SWIZ_B],
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[US_ALU_RGBA_INST.RED_SWIZ_C, US_ALU_RGBA_INST.GREEN_SWIZ_C, US_ALU_RGBA_INST.BLUE_SWIZ_C],
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]
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mods = [
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US_ALU_RGB_INST.RGB_MOD_A,
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US_ALU_RGB_INST.RGB_MOD_B,
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US_ALU_RGBA_INST.RGB_MOD_C,
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]
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for sel, src_func, swizzle_funcs, mod_func in zip(rgb_op.sels,
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srcs, swizzles, mods):
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src_func(code, sel.src.value)
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assert len(sel.swizzle) == 3
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assert len(swizzle_funcs) == 3
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for swizzle_func, swizzle in zip(swizzle_funcs, sel.swizzle):
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swizzle_func(code, swizzle.value)
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mod_func(code, sel.mod)
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def emit_addr(code, addr):
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srcs = [
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(addr.alpha.src0 , US_ALU_ALPHA_ADDR.ADDR0 , US_ALU_ALPHA_ADDR.ADDR0_CONST),
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(addr.alpha.src1 , US_ALU_ALPHA_ADDR.ADDR1 , US_ALU_ALPHA_ADDR.ADDR1_CONST),
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(addr.alpha.src2 , US_ALU_ALPHA_ADDR.ADDR2 , US_ALU_ALPHA_ADDR.ADDR2_CONST),
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(addr.rgb.src0 , US_ALU_RGB_ADDR.ADDR0 , US_ALU_RGB_ADDR.ADDR0_CONST),
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(addr.rgb.src1 , US_ALU_RGB_ADDR.ADDR1 , US_ALU_RGB_ADDR.ADDR1_CONST),
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(addr.rgb.src2 , US_ALU_RGB_ADDR.ADDR2 , US_ALU_RGB_ADDR.ADDR2_CONST),
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]
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for src, ADDR, ADDR_CONST in srcs:
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if src is not None:
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is_const = int(src.type is SrcAddrType.const)
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is_float = int(src.type is SrcAddrType.float)
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ADDR(code, (is_float << 7) | src.value)
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ADDR_CONST(code, is_const)
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else:
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ADDR(code, (1 << 7) | 0)
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if addr.alpha.srcp is not None:
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US_ALU_ALPHA_ADDR.SRCP_OP(code, addr.alpha.srcp.value)
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if addr.rgb.srcp is not None:
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US_ALU_RGB_ADDR.SRCP_OP(code, addr.rgb.srcp.value)
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def emit_instruction(code, ins):
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US_CMN_INST.TYPE(code, ins.type.value)
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US_CMN_INST.TEX_SEM_WAIT(code, int(ins.tex_sem_wait))
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emit_addr(code, ins.addr)
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if ins.alpha_op is not None:
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emit_alpha_op(code, ins.alpha_op)
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if ins.rgb_op is not None:
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emit_rgb_op(code, ins.rgb_op)
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