113 lines
3.7 KiB
Python
113 lines
3.7 KiB
Python
from assembler.keywords import ME, VE, KW
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from assembler.parser import Instruction, DestinationOp, Source
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import pvs_dst
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import pvs_src
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import pvs_dst_bits
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import pvs_src_bits
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def we_x(s):
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return int(0 in s)
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def we_y(s):
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return int(1 in s)
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def we_z(s):
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return int(2 in s)
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def we_w(s):
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return int(3 in s)
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def dst_reg_type(kw):
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if kw == KW.temporary:
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return pvs_dst_bits.PVS_DST_REG_gen["TEMPORARY"]
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elif kw == KW.a0:
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return pvs_dst_bits.PVS_DST_REG_gen["A0"]
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elif kw == KW.out:
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return pvs_dst_bits.PVS_DST_REG_gen["OUT"]
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elif kw == KW.out_repl_x:
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return pvs_dst_bits.PVS_DST_REG_gen["OUT_REPL_X"]
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elif kw == KW.alt_temporary:
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return pvs_dst_bits.PVS_DST_REG_gen["ALT_TEMPORARY"]
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elif kw == KW.input:
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return pvs_dst_bits.PVS_DST_REG_gen["INPUT"]
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else:
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assert not "Invalid PVS_DST_REG", kw
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def emit_destination_op(dst_op: DestinationOp):
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assert type(dst_op.opcode) in {ME, VE}
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math_inst = int(type(dst_op.opcode) is ME)
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value = (
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pvs_dst.OPCODE_gen(dst_op.opcode.value)
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| pvs_dst.MATH_INST_gen(math_inst)
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| pvs_dst.REG_TYPE_gen(dst_reg_type(dst_op.type))
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| pvs_dst.OFFSET_gen(dst_op.offset)
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| pvs_dst.WE_X_gen(we_x(dst_op.write_enable))
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| pvs_dst.WE_Y_gen(we_y(dst_op.write_enable))
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| pvs_dst.WE_Z_gen(we_z(dst_op.write_enable))
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| pvs_dst.WE_W_gen(we_w(dst_op.write_enable))
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)
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yield value
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def src_reg_type(kw):
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if kw == KW.temporary:
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return pvs_src_bits.PVS_SRC_REG_TYPE_gen["PVS_SRC_REG_TEMPORARY"]
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elif kw == KW.input:
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return pvs_src_bits.PVS_SRC_REG_TYPE_gen["PVS_SRC_REG_INPUT"]
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elif kw == KW.constant:
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return pvs_src_bits.PVS_SRC_REG_TYPE_gen["PVS_SRC_REG_CONSTANT"]
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elif kw == KW.alt_temporary:
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return pvs_src_bits.PVS_SRC_REG_TYPE_gen["PVS_SRC_REG_ALT_TEMPORARY"]
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else:
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assert not "Invalid PVS_SRC_REG", kw
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def emit_source(src: Source, prev: Source):
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if src is not None:
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value = (
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pvs_src.REG_TYPE_gen(src_reg_type(src.type))
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| pvs_src.OFFSET_gen(src.offset)
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| pvs_src.SWIZZLE_X_gen(src.swizzle.select[0])
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| pvs_src.SWIZZLE_Y_gen(src.swizzle.select[1])
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| pvs_src.SWIZZLE_Z_gen(src.swizzle.select[2])
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| pvs_src.SWIZZLE_W_gen(src.swizzle.select[3])
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| pvs_src.MODIFIER_X_gen(int(src.swizzle.modifier[0]))
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| pvs_src.MODIFIER_Y_gen(int(src.swizzle.modifier[1]))
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| pvs_src.MODIFIER_Z_gen(int(src.swizzle.modifier[2]))
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| pvs_src.MODIFIER_W_gen(int(src.swizzle.modifier[3]))
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)
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else:
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assert prev is not None
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value = (
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pvs_src.REG_TYPE_gen(src_reg_type(prev.type))
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| pvs_src.OFFSET_gen(prev.offset)
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| pvs_src.SWIZZLE_X_gen(7)
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| pvs_src.SWIZZLE_Y_gen(7)
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| pvs_src.SWIZZLE_Z_gen(7)
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| pvs_src.SWIZZLE_W_gen(7)
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| pvs_src.MODIFIER_X_gen(0)
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| pvs_src.MODIFIER_Y_gen(0)
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| pvs_src.MODIFIER_Z_gen(0)
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| pvs_src.MODIFIER_W_gen(0)
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)
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yield value
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def prev_source(ins, ix):
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if ix == 0:
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assert ins.source0 is not None
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return ins.source0
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elif ix == 1:
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return ins.source0
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elif ix == 2:
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if ins.source1 is not None:
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return ins.source1
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else:
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return ins.source0
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else:
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assert False, ix
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def emit_instruction(ins: Instruction):
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yield from emit_destination_op(ins.destination_op)
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yield from emit_source(ins.source0, prev_source(ins, 0))
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yield from emit_source(ins.source1, prev_source(ins, 1))
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yield from emit_source(ins.source2, prev_source(ins, 2))
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