90 lines
2.5 KiB
C
90 lines
2.5 KiB
C
#include <stdio.h>
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#include <stdint.h>
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#include <xf86drm.h>
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#include <libdrm/radeon_drm.h>
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#include "drm.h"
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#include "../r500/indirect_buffer.h" // for extern uint32_t ib[];
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void drm_radeon_cs(int fd,
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int colorbuffer_handle,
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int zbuffer_handle,
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int flush_handle,
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int * texturebuffer_handles,
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int texturebuffer_handles_length,
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int ib_dwords)
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{
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struct drm_radeon_cs_reloc relocs[3 + texturebuffer_handles_length];
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relocs[COLORBUFFER_RELOC_INDEX] = (struct drm_radeon_cs_reloc){
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.handle = colorbuffer_handle,
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.read_domains = 4, // RADEON_GEM_DOMAIN_VRAM
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.write_domain = 4, // RADEON_GEM_DOMAIN_VRAM
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.flags = 8,
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};
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relocs[ZBUFFER_RELOC_INDEX] = (struct drm_radeon_cs_reloc){
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.handle = zbuffer_handle,
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.read_domains = 4, // RADEON_GEM_DOMAIN_VRAM
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.write_domain = 4, // RADEON_GEM_DOMAIN_VRAM
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.flags = 8,
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};
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relocs[FLUSH_RELOC_INDEX] = (struct drm_radeon_cs_reloc){
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.handle = flush_handle,
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.read_domains = 2, // RADEON_GEM_DOMAIN_GTT
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.write_domain = 2, // RADEON_GEM_DOMAIN_GTT
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.flags = 0,
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};
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for (int i = 0; i < texturebuffer_handles_length; i++) {
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relocs[3 + i] = (struct drm_radeon_cs_reloc){
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.handle = texturebuffer_handles[i],
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.read_domains = 4, // RADEON_GEM_DOMAIN_VRAM
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.write_domain = 4, // RADEON_GEM_DOMAIN_VRAM
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.flags = 8,
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};
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}
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const uint32_t flags[2] = {
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5, // RADEON_CS_KEEP_TILING_FLAGS | RADEON_CS_END_OF_FRAME
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0, // RADEON_CS_RING_GFX
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};
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struct drm_radeon_cs_chunk chunks[3] = {
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{
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.chunk_id = RADEON_CHUNK_ID_IB,
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.length_dw = ib_dwords,
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.chunk_data = (uint64_t)(uintptr_t)ib,
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},
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{
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.chunk_id = RADEON_CHUNK_ID_RELOCS,
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.length_dw = (sizeof (relocs)) / (sizeof (uint32_t)),
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.chunk_data = (uint64_t)(uintptr_t)relocs,
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},
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{
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.chunk_id = RADEON_CHUNK_ID_FLAGS,
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.length_dw = (sizeof (flags)) / (sizeof (uint32_t)),
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.chunk_data = (uint64_t)(uintptr_t)&flags,
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},
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};
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uint64_t chunks_array[3] = {
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(uint64_t)(uintptr_t)&chunks[0],
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(uint64_t)(uintptr_t)&chunks[1],
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(uint64_t)(uintptr_t)&chunks[2],
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};
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struct drm_radeon_cs cs = {
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.num_chunks = 3,
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.cs_id = 0,
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.chunks = (uint64_t)(uintptr_t)chunks_array,
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.gart_limit = 0,
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.vram_limit = 0,
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};
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int ret = drmCommandWriteRead(fd, DRM_RADEON_CS, &cs, (sizeof (struct drm_radeon_cs)));
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if (ret != 0) {
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perror("drmCommandWriteRead(DRM_RADEON_CS)");
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}
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}
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