shadertoy_circle.fs.asm : use presubtract to reduce instruction count
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parent
59390a9ea2
commit
f6105c66b3
@ -1,29 +1,23 @@
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# CONSTS[0] = (-0.1, 0, 0, 0)
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# CONST[0] = (-0.1, 0, 0, 0)
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# d = length(uv)
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# d = length(uv)
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src0.rgb = temp[0] :
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src0.rgb = temp[0] :
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temp[0].r = DP3 src0.rg0 src0.rg0 ;
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temp[0].r = DP3 src0.rg0 src0.rg0 ;
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src0.rgb = temp[0] :
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src0.rgb = temp[0] :
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temp[0].a = RSQ |src0.r| ;
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temp[0].a = RSQ |src0.r| ;
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src0.a = temp[0] :
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src0.a = temp[0] :
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temp[0].a = RCP src0.a ;
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temp[0].a = RCP src0.a ;
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# d -= 0.5
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# d = abs(d - 0.5) * 1 + -0.1
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src0.a = temp[0] :
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src0.rgb = float(48), # 0.5
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temp[0].r = MAD src0.a00 src0.100 -src0.h00 ;
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src1.rgb = temp[0], # d
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src2.rgb = const[0], # -0.1
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srcp.rgb = sub : # (src1.rgb - src0.rgb)
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temp[0].r = MAD |srcp.r00| src0.100 src2.r00 ;
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# d = abs(d) * 1 + -0.1
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# d = (d >= 0.0) ? 1.0 : 0.0
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src0.rgb = temp[0] , src1.rgb = const[0] :
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# out.rgba = vec4(d, 0, 0, 1)
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temp[0].r = MAD |src0.r00| src0.100 src1.r00 ;
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# out.r = (d >= 0.0) ? 1.0 : 0.0
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OUT
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src0.rgb = temp[0] :
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out[0].r = CMP src0.100 src0.000 src0.r00 ;
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# out.a = 1
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# out.gb = vec2(0, 0)
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OUT TEX_SEM_WAIT
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OUT TEX_SEM_WAIT
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:
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src0.rgb = temp[0] :
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out[0].a = MAX src0.1 src0.1 ,
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out[0].a = MAX src0.1 src0.1 ,
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out[0].gb = MAX src0.000 src0.000 ;
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out[0].rgb = CMP src0.100 src0.000 src0.r00 ;
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@ -20,30 +20,9 @@
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0x00000000,
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0x00000000,
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0x00000800,
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0x00000800,
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0x500000b0,
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0x08020080,
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0x08020080,
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0x08020000,
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0x00931483,
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0x0093048c,
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0x00000000,
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0x00000000,
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0x00c94000,
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0x00482000,
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0x00000800,
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0x08040000,
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0x08020080,
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0x00931480,
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0x00000000,
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0x00481000,
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0x00008001,
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0x08020000,
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0x08020080,
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0x00920498,
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0x00000000,
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0x00480008,
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0x00070005,
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0x08020080,
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0x08020080,
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0x00920490,
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0x00c18003,
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0x00000005,
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@ -1,11 +1,11 @@
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import sys
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import sys
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from os import path
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from os import path, environ
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import parse_bits
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import parse_bits
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from collections import OrderedDict
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from collections import OrderedDict
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from functools import partial
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from functools import partial
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from pprint import pprint
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from pprint import pprint
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VERBOSE = False
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VERBOSE = environ.get("VERBOSE", "false").lower() == "true"
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class BaseRegister:
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class BaseRegister:
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def get(self, code, *, code_ix, descriptor):
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def get(self, code, *, code_ix, descriptor):
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@ -324,7 +324,13 @@ def disassemble_alu(code, is_output):
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rgb_swizzle_sel = rgb_swizzle_sel[:rgb_op_operands]
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rgb_swizzle_sel = rgb_swizzle_sel[:rgb_op_operands]
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a_sources = set(a_sels)
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a_sources = set(a_sels)
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if 3 in a_sources:
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a_sources.add(0)
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a_sources.add(1)
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rgb_sources = set(rgb_sels)
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rgb_sources = set(rgb_sels)
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if 3 in rgb_sources:
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rgb_sources.add(0)
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rgb_sources.add(1)
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a_addr_strs = [s for i, s in enumerate(a_addr_strs) if i in a_sources]
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a_addr_strs = [s for i, s in enumerate(a_addr_strs) if i in a_sources]
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rgb_addr_strs = [s for i, s in enumerate(rgb_addr_strs) if i in rgb_sources]
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rgb_addr_strs = [s for i, s in enumerate(rgb_addr_strs) if i in rgb_sources]
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