diff --git a/regs/us_disassemble.py b/regs/us_disassemble.py
index 61895c8..e0958f4 100644
--- a/regs/us_disassemble.py
+++ b/regs/us_disassemble.py
@@ -88,7 +88,10 @@ def disassemble(code, ix):
     print(f"{ix:04x}")
 
     def inner2(i, register_name):
-        max_length = max(map(len, registers[register_name])) + 1
+        if register_name == 0:
+            max_length = 1
+        else:
+            max_length = max(map(len, registers[register_name])) + 1
 
         value = code[ix + i]
         yield f"{register_name}"
diff --git a/regs/us_disassemble2.py b/regs/us_disassemble2.py
index 6b43d22..80f73e3 100644
--- a/regs/us_disassemble2.py
+++ b/regs/us_disassemble2.py
@@ -351,7 +351,8 @@ def disassemble(code):
     elif type == US_CMN_INST.TYPE.US_INST_TYPE_ALU:
         disassemble_alu(code, is_output=False)
     else:
-        assert False, US_CMN_INST._TYPE(code[ix + 0])
+        print("[TYPE]", type)
+        #assert False, US_CMN_INST._TYPE(code)
 
 def parse_hex(s):
     assert s.startswith('0x')