diff --git a/regs/cp_csq2_stat.txt b/regs/cp_csq2_stat.txt new file mode 100644 index 0000000..967a663 --- /dev/null +++ b/regs/cp_csq2_stat.txt @@ -0,0 +1,4 @@ +Field Name Bits Default Description +CSQ_WPTR_INDIRECT 9:0 none Current Write Pointer into the Indirect Queue. Default = 0. +CSQ_RPTR_INDIRECT2 19:10 none Current Read Pointer into the Indirect Queue. Default = 0. +CSQ_WPTR_INDIRECT2 29:20 none Current Write Pointer into the Indirect Queue. Default = 0. diff --git a/regs/cp_csq_addr.txt b/regs/cp_csq_addr.txt new file mode 100644 index 0000000..c9766f1 --- /dev/null +++ b/regs/cp_csq_addr.txt @@ -0,0 +1,4 @@ +Field Name Bits Default Description +CSQ_ADDR 11:2 none Address into the Command Stream Queue which is to be + read from. Used for debug, to read the contents of the + Command Stream Queue. diff --git a/regs/cp_csq_aper_indirect.txt b/regs/cp_csq_aper_indirect.txt new file mode 100644 index 0000000..59f9c17 --- /dev/null +++ b/regs/cp_csq_aper_indirect.txt @@ -0,0 +1,2 @@ +Field Name Bits Default Description +CP_CSQ_APER_INDIRECT 31:0 none IB1 Aperture diff --git a/regs/cp_csq_aper_indirect2.txt b/regs/cp_csq_aper_indirect2.txt new file mode 100644 index 0000000..b940d37 --- /dev/null +++ b/regs/cp_csq_aper_indirect2.txt @@ -0,0 +1,2 @@ +Field Name Bits Default Description +CP_CSQ_APER_INDIRECT2 31:0 none IB2 Aperture diff --git a/regs/cp_csq_aper_primary.txt b/regs/cp_csq_aper_primary.txt new file mode 100644 index 0000000..48f4d00 --- /dev/null +++ b/regs/cp_csq_aper_primary.txt @@ -0,0 +1,2 @@ +Field Name Bits Default Description +CP_CSQ_APER_PRIMARY 31:0 none Primary Aperture diff --git a/regs/cp_csq_avail.txt b/regs/cp_csq_avail.txt new file mode 100644 index 0000000..659a9f9 --- /dev/null +++ b/regs/cp_csq_avail.txt @@ -0,0 +1,7 @@ +Field Name Bits Default Description +CSQ_CNT_PRIMARY 9:0 none Count of available dwords in the queue for the Primary + Stream. Read Only. +CSQ_CNT_INDIRECT 19:10 none Count of available dwords in the queue for the Indirect + Stream. Read Only. +CSQ_CNT_INDIRECT2 29:20 none Count of available dwords in the queue for the Indirect + Stream. Read Only. diff --git a/regs/cp_csq_cntl.txt b/regs/cp_csq_cntl.txt new file mode 100644 index 0000000..76cd89e --- /dev/null +++ b/regs/cp_csq_cntl.txt @@ -0,0 +1,16 @@ +Field Name Bits Default Description +CSQ_MODE 31:28 0x0 Command Stream Queue Mode. Controls whether each + command stream is enabled, and whether it is in push + mode (Programmed I/O), or pull mode (Bus-Master). + Encodings are chosen to be compatible with Rage128. + POSSIBLE VALUES: + 00 - Primary Disabled, Indirect Disabled. + 01 - Primary PIO, Indirect Disabled. + 02 - Primary BM, Indirect Disabled. + 03 - Primary PIO, Indirect BM. + 04 - Primary BM, Indirect BM. + 05 - Primary PIO, Indirect BM. + 06 - Primary BM, Indirect BM. + 07 - Primary PIO, Indirect BM. + 08 - Primary BM, Indirect BM. + 15 - Primary PIO, Indirect PIO diff --git a/regs/cp_csq_data.txt b/regs/cp_csq_data.txt new file mode 100644 index 0000000..04c4b2c --- /dev/null +++ b/regs/cp_csq_data.txt @@ -0,0 +1,5 @@ +Field Name Bits Default Description +CSQ_DATA 31:0 none Data from the Command Stream Queue, from location + pointed to by the CP_CSQ_ADDR register. Used for + debug, to read the contents of the Command Stream + Queue. diff --git a/regs/cp_csq_mode.txt b/regs/cp_csq_mode.txt new file mode 100644 index 0000000..0e47b44 --- /dev/null +++ b/regs/cp_csq_mode.txt @@ -0,0 +1,34 @@ +Field Name Bits Default Description +INDIRECT2_START 6:0 none Start location of Indirect Queue #2 in the command + cache. This value also sets the size in double octwords of + the Indirect Queue #1 cache that will reside in locations + INDIRECT1_START to (INDIRECT2_START - 1). The + Indirect Queue #2 will reside in locations + INDIRECT2_START to 0x5f. The minimum size of the + Indirect Queues must be at least twice the MAX_FETCH + size as programmed in the CP_RB_CNTL register. +INDIRECT1_START 14:8 none Start location of Indirect Queue #1 in the command + cache. This value is also the size in double octwords of + the Primary Queue cache that will reside in locations 0 to + (INDIRECT1_START - 1). The minimum size of the + Primary Queue cache must be at least twice the + MAX_FETCH size as programmed in the + CP_RB_CNTL register. +CSQ_INDIRECT2_MODE 26 0x0 POSSIBLE VALUES: + 00 - PIO + 01 - BM +CSQ_INDIRECT2_ENABLE 27 0x0 Enables Indirect Buffer #2. If this bit is set, the + CP_CSQ_MODE register overrides the operation of the + CSQ_MODE variable in the CP_CSQ_CNTL register. +CSQ_INDIRECT1_MODE 28 0x0 POSSIBLE VALUES: + 00 - PIO + 01 - BM +CSQ_INDIRECT1_ENABLE 29 0x0 Enables Indirect Buffer #1. If this bit is set, the + CP_CSQ_MODE register overrides the operation of the + CSQ_MODE variable in the CP_CSQ_CNTL register. +CSQ_PRIMARY_MODE 30 0x0 POSSIBLE VALUES: + 00 - PIO + 01 - BM +CSQ_PRIMARY_ENABLE 31 0x0 Enables Primary Buffer. If this bit is set, the + CP_CSQ_MODE register overrides the operation of the + CSQ_MODE variable in the CP_CSQ_CNTL register. diff --git a/regs/cp_csq_stat.txt b/regs/cp_csq_stat.txt new file mode 100644 index 0000000..ff97296 --- /dev/null +++ b/regs/cp_csq_stat.txt @@ -0,0 +1,4 @@ +Field Name Bits Default Description +CSQ_RPTR_PRIMARY 9:0 none Current Read Pointer into the Primary Queue. Default = 0. +CSQ_WPTR_PRIMARY 19:10 none Current Write Pointer into the Primary Queue. Default = 0. +CSQ_RPTR_INDIRECT 29:20 none Current Read Pointer into the Indirect Queue. Default = 0. diff --git a/regs/cp_gui_command.txt b/regs/cp_gui_command.txt new file mode 100644 index 0000000..de5f3e9 --- /dev/null +++ b/regs/cp_gui_command.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +CP_GUI_COMMAND 31:0 none Command for PIO DMAs to the GUI DMA. Only + DWORD access is allowed to this register. diff --git a/regs/cp_gui_dst_addr.txt b/regs/cp_gui_dst_addr.txt new file mode 100644 index 0000000..b5c3cdc --- /dev/null +++ b/regs/cp_gui_dst_addr.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +CP_GUI_DST_ADDR 31:0 none Destination address for PIO DMAs to the GUI DMA. + Only DWORD access is allowed to this register. diff --git a/regs/cp_gui_src_addr.txt b/regs/cp_gui_src_addr.txt new file mode 100644 index 0000000..9e4f978 --- /dev/null +++ b/regs/cp_gui_src_addr.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +CP_GUI_SRC_ADDR 31:0 none Source address for PIO DMAs to the GUI DMA. Only + DWORD access is allowed to this register. diff --git a/regs/cp_ib2_base.txt b/regs/cp_ib2_base.txt new file mode 100644 index 0000000..39af0f7 --- /dev/null +++ b/regs/cp_ib2_base.txt @@ -0,0 +1,4 @@ +Field Name Bits Default Description +IB2_BASE 31:2 none Indirect Buffer 2 Base. Address of the beginning of the + indirect buffer. Only DWORD access is allowed to this + register. diff --git a/regs/cp_ib2_bufz.txt b/regs/cp_ib2_bufz.txt new file mode 100644 index 0000000..a988217 --- /dev/null +++ b/regs/cp_ib2_bufz.txt @@ -0,0 +1,5 @@ +Field Name Bits Default Description +IB2_BUFSZ 22:0 0x0 Indirect Buffer 2 Size. This size is expressed in dwords. + This field is an initiator to begin fetching commands + from the Indirect Buffer. Only DWORD access is + allowed to this register. Default = 0 diff --git a/regs/cp_ib_base.txt b/regs/cp_ib_base.txt new file mode 100644 index 0000000..281354f --- /dev/null +++ b/regs/cp_ib_base.txt @@ -0,0 +1,4 @@ +Field Name Bits Default Description +IB_BASE 31:2 none Indirect Buffer Base. Address of the beginning of the + indirect buffer. Only DWORD access is allowed to this + register. diff --git a/regs/cp_ib_bufsz.txt b/regs/cp_ib_bufsz.txt new file mode 100644 index 0000000..82eaf3f --- /dev/null +++ b/regs/cp_ib_bufsz.txt @@ -0,0 +1,5 @@ +Field Name Bits Default Description +IB_BUFSZ 22:0 0x0 Indirect Buffer Size. This size is expressed in dwords. + This field is an initiator to begin fetching commands + from the Indirect Buffer. Only DWORD access is + allowed to this register. Default = 0 diff --git a/regs/cp_me_cntl.txt b/regs/cp_me_cntl.txt new file mode 100644 index 0000000..7b20c02 --- /dev/null +++ b/regs/cp_me_cntl.txt @@ -0,0 +1,18 @@ +Field Name Bits Default Description +ME_STAT 15:0 none Status of MicroEngine internal registers. This value + depends on the current value of the ME_STATMUX + field. Read Only. +ME_STATMUX 20:16 0x0 Selects which status is to be returned on the ME_STAT + field. +ME_BUSY 29 none Busy indicator for the MicroEngine. Read Only. + POSSIBLE VALUES: + 00 - MicroEngine not busy. + 01 - MicroEngine is active. +ME_MODE 30 0x1 Run-Mode of MicroEngine. + POSSIBLE VALUES: + 00 - Single-Step Mode. + 01 - Free-running Mode. +ME_STEP 31 0x0 Step the MicroEngine by one instruction. Writing a `1` to + this field causes the MicroEngine to step by one + instruction, if and only if the ME_MODE bit is a `0`. + Write Only. diff --git a/regs/cp_me_ram_addr.txt b/regs/cp_me_ram_addr.txt new file mode 100644 index 0000000..97475a1 --- /dev/null +++ b/regs/cp_me_ram_addr.txt @@ -0,0 +1,5 @@ +Field Name Bits Default Description +ME_RAM_ADDR 7:0 none MicroEngine RAM Address (Write Mode) Writing this + register puts the RAM access circuitry into `Write Mode`, + which allows the address to auto-increment as data is + written into the RAM. diff --git a/regs/cp_me_ram_datah.txt b/regs/cp_me_ram_datah.txt new file mode 100644 index 0000000..3143b45 --- /dev/null +++ b/regs/cp_me_ram_datah.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +ME_RAM_DATAH 7:0 none MicroEngine RAM Data High Used to load the + MicroEngine RAM. diff --git a/regs/cp_me_ram_datal.txt b/regs/cp_me_ram_datal.txt new file mode 100644 index 0000000..858e1d5 --- /dev/null +++ b/regs/cp_me_ram_datal.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +ME_RAM_DATAL 31:0 none MicroEngine RAM Data Low Used to load the + MicroEngine RAM. diff --git a/regs/cp_me_ram_raddr.txt b/regs/cp_me_ram_raddr.txt new file mode 100644 index 0000000..9f802ff --- /dev/null +++ b/regs/cp_me_ram_raddr.txt @@ -0,0 +1,5 @@ +Field Name Bits Default Description +ME_RAM_RADDR 7:0 none MicroEngine RAM Address (Read Mode) Writing + this register puts the RAM access circuitry into `Read + Mode` , which allows the address to auto-increment + as data is read from the RAM. Write Only. diff --git a/regs/cp_rb_base.txt b/regs/cp_rb_base.txt new file mode 100644 index 0000000..b07acd0 --- /dev/null +++ b/regs/cp_rb_base.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +RB_BASE 31:2 none Ring Buffer Base. Address of the beginning of the ring + buffer. diff --git a/regs/cp_rb_cntl.txt b/regs/cp_rb_cntl.txt new file mode 100644 index 0000000..392ad0e --- /dev/null +++ b/regs/cp_rb_cntl.txt @@ -0,0 +1,41 @@ +Field Name Bits Default Description +RB_BUFSZ 5:0 0x0 Ring Buffer Size. This size is expressed in log2 of the + actual size. Values 0 and 1 are clamped to an 8 DWORD + ring buffer. A value of 2 to 22 will give a ring buffer: + 2^(RB_BUFSZ+1). Values greater than 22 will clamp to + 22. Default = 0 +RB_BLKSZ 13:8 0x0 Ring Buffer Block Size. This defines the number of + quadwords that the Command Processor will read + between updates to the host`s copy of the Read Pointer. + This size is expressed in log2 of the actual size (in 64-bit + quadwords). For example, for a block of 1024 + quadwords, you would program this field to 10(decimal). + Default = 0 +BUF_SWAP 17:16 0x0 Endian Swap Control for Ring Buffer and Indirect + Buffer. Only affects the chip behavior if the buffer + resides in system memory. + POSSIBLE VALUES: + 00 - No swap + 01 - 16-bit swap: 0xAABBCCDD becomes 0xBBAADDCC + 02 - 32-bit swap: 0xAABBCCDD becomes 0xDDCCBBAA + 03 - Half-dword swap: 0xAABBCCDD becomes 0xCCDDAABB +MAX_FETCH 19:18 0x0 Maximum Fetch Size for any read request that the CP + makes to memory. + POSSIBLE VALUES: + 00 - 1 double octword. (32 bytes) + 01 - 2 double octwords. (64 bytes) + 02 - 4 double octwords. (128 bytes) + 03 - 8 double octwords. (256 bytes). +RB_NO_UPDATE 27 0x0 Ring Buffer No Write to Read Pointer. The purpose of this + control bit is to have a fall-back position if the bus- + mastered write to system memory doesn`t work, in which + case the driver will have to read the Graphics + Controller`s copy of the Read Pointer directly, with some + performance penalty. + POSSIBLE VALUES: + 00 - Write to Host`s copy of Read Pointer in system memory. + 01 - Do not write to Host`s copy of Read pointer. +RB_RPTR_WR_ENA 31 0bx0 Ring Buffer Read Pointer Write Transfer Enable. When + set the contents of the CP_RB_RPTR_WR register is + transferred to the active read pointer (CP_RB_RPTR) + whenever the CP_RB_WPTR register is written. diff --git a/regs/cp_rb_rptr.txt b/regs/cp_rb_rptr.txt new file mode 100644 index 0000000..946f0dd --- /dev/null +++ b/regs/cp_rb_rptr.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +RB_RPTR 22:0 none Ring Buffer Read Pointer. This is an index (in dwords) + of the current element being read from the ring buffer. diff --git a/regs/cp_rb_rptr_addr.txt b/regs/cp_rb_rptr_addr.txt new file mode 100644 index 0000000..17b2439 --- /dev/null +++ b/regs/cp_rb_rptr_addr.txt @@ -0,0 +1,6 @@ +Field Name Bits Default Description +RB_RPTR_SWAP 1:0 0x0 Swap control of the reported read pointer address. See + CP_RB_CNTL.BUF_SWAP for the encoding. +RB_RPTR_ADDR 31:2 0x0 Ring Buffer Read Pointer Address. Address of the Host`s + copy of the Read Pointer. CP_RB_RPTR (RO) Ring + Buffer Read Pointer diff --git a/regs/cp_rb_rptr_wr.txt b/regs/cp_rb_rptr_wr.txt new file mode 100644 index 0000000..c686752 --- /dev/null +++ b/regs/cp_rb_rptr_wr.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +RB_RPTR_WR 22:0 0x0 Writable Ring Buffer Read Pointer. Writable for + updating the RB_RPTR after an ACPI. diff --git a/regs/cp_rb_wptr.txt b/regs/cp_rb_wptr.txt new file mode 100644 index 0000000..edc7456 --- /dev/null +++ b/regs/cp_rb_wptr.txt @@ -0,0 +1,4 @@ +Field Name Bits Default Description +RB_WPTR 22:0 0x0 Ring Buffer Write Pointer. This is an index (in dwords) + of the last known element to be written to the ring buffer + (by the host). diff --git a/regs/cp_rb_wptr_delay.txt b/regs/cp_rb_wptr_delay.txt new file mode 100644 index 0000000..6d92118 --- /dev/null +++ b/regs/cp_rb_wptr_delay.txt @@ -0,0 +1,9 @@ +Field Name Bits Default Description +PRE_WRITE_TIMER 27:0 0x0 Pre-Write Timer. The number of clocks that a write to + the CP_RB_WPTR register will be delayed until actually + taking effect. Default = 0 +PRE_WRITE_LIMIT 31:28 0x0 Pre-Write Limit. The number of times that the + CP_RB_WPTR register can be written (while the + PRE_WRITE_TIMER has not expired) before the + CP_RB_WPTR register is forced to be updated with the + most recently written value. Default = 0 diff --git a/regs/cp_resync_addr.txt b/regs/cp_resync_addr.txt new file mode 100644 index 0000000..30d97d0 --- /dev/null +++ b/regs/cp_resync_addr.txt @@ -0,0 +1,2 @@ +Field Name Bits Default Description +RESYNC_ADDR 2:0 0x0 Scratch Register Offset Address. diff --git a/regs/cp_resync_data.txt b/regs/cp_resync_data.txt new file mode 100644 index 0000000..b124f45 --- /dev/null +++ b/regs/cp_resync_data.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +RESYNC_DATA 31:0 none Data written to selected Scratch Register when a sync + pulse pair is received from the CBA and CBB. diff --git a/regs/cp_stat.txt b/regs/cp_stat.txt new file mode 100644 index 0000000..4cea7cd --- /dev/null +++ b/regs/cp_stat.txt @@ -0,0 +1,16 @@ +Field Name Bits Default Description +MRU_BUSY 0 none Memory Read Unit Busy. +MWU_BUSY 1 none Memory Write Unit Busy. +RSIU_BUSY 2 none Register Backbone Input Interface Busy. +RCIU_BUSY 3 none RBBM Output Interface Busy. +CSF_PRIMARY_BUSY 9 none Primary Command Stream Fetcher Busy. +CSF_INDIRECT_BUSY 10 none Indirect #1 Command Stream Fetcher Busy. +CSQ_PRIMARY_BUSY 11 none Data in Command Queue for Primary Stream. +CSQ_INDIRECT_BUSY 12 none Data in Command Queue for Indirect #1 Stream. +CSI_BUSY 13 none Command Stream Interpreter Busy. +CSF_INDIRECT2_BUSY 14 none Indirect #2 Command Stream Fetcher Busy. +CSQ_INDIRECT2_BUSY 15 none Data in Command Queue for Indirect #2 Stream. +GUIDMA_BUSY 28 none GUI DMA Engine Busy. +VIDDMA_BUSY 29 none VID DMA Engine Busy. +CMDSTRM_BUSY 30 none Command Stream Busy. +CP_BUSY 31 none CP Busy. diff --git a/regs/cp_vid_addr_cntl.txt b/regs/cp_vid_addr_cntl.txt new file mode 100644 index 0000000..601255f --- /dev/null +++ b/regs/cp_vid_addr_cntl.txt @@ -0,0 +1,11 @@ +Field Name Bits Default Description +SCRATCH_ALT_VP_WR 0 0x0 0=Physical (Default), 1=Virtual +SCRATCH_VP_WR 1 0x0 0=Physical (Default), 1=Virtual +RPTR_VP_UPDATE 2 0x0 0=Physical (Default), 1=Virtual +VIDDMA_VP_WR 3 0x0 0=Physical (Default), 1=Virtual +VIDDMA_VP_RD 4 0x0 0=Physical (Default), 1=Virtual +GUIDMA_VP_WR 5 0x0 0=Physical (Default), 1=Virtual +GUIDMA_VP_RD 6 0x0 0=Physical (Default), 1=Virtual +INDR2_VP_FETCH 7 0x0 0=Physical (Default), 1=Virtual +INDR1_VP_FETCH 8 0x0 0=Physical (Default), 1=Virtual +RING_VP_FETCH 9 0x0 0=Physical (Default), 1=Virtual diff --git a/regs/cp_vid_command.txt b/regs/cp_vid_command.txt new file mode 100644 index 0000000..03e585d --- /dev/null +++ b/regs/cp_vid_command.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +CP_VID_COMMAND 31:0 none Command for PIO DMAs to the VID DMA. Only + DWORD access is allowed to this register. diff --git a/regs/cp_vid_dst_addr.txt b/regs/cp_vid_dst_addr.txt new file mode 100644 index 0000000..2ab0004 --- /dev/null +++ b/regs/cp_vid_dst_addr.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +CP_VID_DST_ADDR 31:0 none Destination address for PIO DMAs to the VID DMA. + Only DWORD access is allowed to this register. diff --git a/regs/fg_alpha_func.txt b/regs/fg_alpha_func.txt new file mode 100644 index 0000000..4814ee3 --- /dev/null +++ b/regs/fg_alpha_func.txt @@ -0,0 +1,47 @@ +Field Name Bits Default Description +AF_VAL 7:0 0x0 Specifies the 8-bit alpha compare value when + AF_EN_8BIT is enabled +AF_FUNC 10:8 0x0 Specifies the alpha compare function. + POSSIBLE VALUES: + 00 - AF_NEVER + 01 - AF_LESS + 02 - AF_EQUAL + 03 - AF_LE + 04 - AF_GREATER + 05 - AF_NOTEQUAL + 06 - AF_GE + 07 - AF_ALWAYS +AF_EN 11 0x0 Enables/Disables alpha compare function. + POSSIBLE VALUES: + 00 - Disable alpha function. + 01 - Enable alpha function. +AF_EN_8BIT 12 0x0 Enable 8-bit alpha compare function. + POSSIBLE VALUES: + 00 - Default 10-bit alpha compare. + 01 - Enable 8-bit alpha compare. +AM_EN 16 0x0 Enables/Disables alpha-to-mask function. + POSSIBLE VALUES: + 00 - Disable alpha to mask function. + 01 - Enable alpha to mask function. +AM_CFG 17 0x0 Specfies number of sub-pixel samples for alpha-to-mask + function. + POSSIBLE VALUES: + 00 - 2/4 sub-pixel samples. + 01 - 3/6 sub-pixel samples. +DITH_EN 20 0x0 Enables/Disables RGB Dithering (Not supported in + R520) + POSSIBLE VALUES: + 00 - Disable Dithering + 01 - Enable Dithering. +ALP_OFF_EN 24 0x0 Alpha offset enable/disable (Not supported in R520) + POSSIBLE VALUES: + 00 - Disables alpha offset of 2 (default r300 & rv350 behavior) + 01 - Enables offset of 2 on alpha coming in from the US +DISCARD_ZERO_MASK_QUAD 25 0x0 Enable/Disable discard zero mask coverage quad to ZB + POSSIBLE VALUES: + 00 - No discard of zero coverage mask quads + 01 - Discard zero coverage mask quads +FP16_ENABLE 28 0x0 Enables/Disables FP16 alpha function + POSSIBLE VALUES: + 00 - Default 10-bit alpha compare and alpha-to-mask function + 01 - Enable FP16 alpha compare and alpha-to-mask function diff --git a/regs/fg_alpha_value.txt b/regs/fg_alpha_value.txt new file mode 100644 index 0000000..6637bd7 --- /dev/null +++ b/regs/fg_alpha_value.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +AF_VAL 15:0 0x0 Specifies the alpha compare value, 0.10 fixed or FP16 + format diff --git a/regs/fg_depth_src.txt b/regs/fg_depth_src.txt new file mode 100644 index 0000000..62e3574 --- /dev/null +++ b/regs/fg_depth_src.txt @@ -0,0 +1,4 @@ +Field Name Bits Default Description +DEPTH_SRC 0 0x0 POSSIBLE VALUES: + 00 - Depth comes from scan converter as plane equation. + 01 - Depth comes from shader as four discrete values. diff --git a/regs/fg_fog_blend.txt b/regs/fg_fog_blend.txt new file mode 100644 index 0000000..035e255 --- /dev/null +++ b/regs/fg_fog_blend.txt @@ -0,0 +1,11 @@ +Field Name Bits Default Description +ENABLE 0 0x0 Enable for fog blending + POSSIBLE VALUES: + 00 - Disables fog (output matches input color). + 01 - Enables fog. +FN 2:1 0x0 Fog generation function + POSSIBLE VALUES: + 00 - Fog function is linear + 01 - Fog function is exponential + 02 - Fog function is exponential squared + 03 - Fog is derived from constant fog factor diff --git a/regs/fg_fog_color_b.txt b/regs/fg_fog_color_b.txt new file mode 100644 index 0000000..7b6cb95 --- /dev/null +++ b/regs/fg_fog_color_b.txt @@ -0,0 +1,2 @@ +Field Name Bits Default Description +BLUE 9:0 0x0 Blue component of fog color; (0.10) fixed format diff --git a/regs/fg_fog_color_g.txt b/regs/fg_fog_color_g.txt new file mode 100644 index 0000000..b449d3e --- /dev/null +++ b/regs/fg_fog_color_g.txt @@ -0,0 +1,2 @@ +Field Name Bits Default Description +GREEN 9:0 0x0 Green component of fog color; (0.10) fixed format. diff --git a/regs/fg_fog_color_r.txt b/regs/fg_fog_color_r.txt new file mode 100644 index 0000000..dc3589c --- /dev/null +++ b/regs/fg_fog_color_r.txt @@ -0,0 +1,2 @@ +Field Name Bits Default Description +RED 9:0 0x0 Red component of fog color; (0.10) fixed format. diff --git a/regs/fg_fog_factor.txt b/regs/fg_fog_factor.txt new file mode 100644 index 0000000..d27302f --- /dev/null +++ b/regs/fg_fog_factor.txt @@ -0,0 +1,2 @@ +Field Name Bits Default Description +FACTOR 9:0 0x0 Constant fog factor; fixed (0.10) format. diff --git a/regs/ga_color_control.txt b/regs/ga_color_control.txt new file mode 100644 index 0000000..5b2e10e --- /dev/null +++ b/regs/ga_color_control.txt @@ -0,0 +1,48 @@ +Field Name Bits Default Description +RGB0_SHADING 1:0 0x0 Specifies solid, flat or Gouraud shading. + POSSIBLE VALUES: + 00 - Solid fill color + 01 - Flat shading + 02 - Gouraud shading +ALPHA0_SHADING 3:2 0x0 Specifies solid, flat or Gouraud shading. + POSSIBLE VALUES: + 00 - Solid fill color + 01 - Flat shading + 02 - Gouraud shading +RGB1_SHADING 5:4 0x0 Specifies solid, flat or Gouraud shading. + POSSIBLE VALUES: + 00 - Solid fill color + 01 - Flat shading + 02 - Gouraud shading +ALPHA1_SHADING 7:6 0x0 Specifies solid, flat or Gouraud shading. + POSSIBLE VALUES: + 00 - Solid fill color + 01 - Flat shading + 02 - Gouraud shading +RGB2_SHADING 9:8 0x0 Specifies solid, flat or Gouraud shading. + POSSIBLE VALUES: + 00 - Solid fill color + 01 - Flat shading + 02 - Gouraud shading +ALPHA2_SHADING 11:10 0x0 Specifies solid, flat or Gouraud shading. + POSSIBLE VALUES: + 00 - Solid fill color + 01 - Flat shading + 02 - Gouraud shading +RGB3_SHADING 13:12 0x0 Specifies solid, flat or Gouraud shading. + POSSIBLE VALUES: + 00 - Solid fill color + 01 - Flat shading + 02 - Gouraud shading +ALPHA3_SHADING 15:14 0x0 Specifies solid, flat or Gouraud shading. + POSSIBLE VALUES: + 00 - Solid fill color + 01 - Flat shading + 02 - Gouraud shading +PROVOKING_VERTEX 17:16 0x0 Specifies, for flat shaded polygons, which vertex holds + the polygon color. + POSSIBLE VALUES: + 00 - Provoking is first vertex + 01 - Provoking is second vertex + 02 - Provoking is third vertex + 03 - Provoking is always last vertex diff --git a/regs/ga_color_control_ps3.txt b/regs/ga_color_control_ps3.txt new file mode 100644 index 0000000..63321b5 --- /dev/null +++ b/regs/ga_color_control_ps3.txt @@ -0,0 +1,95 @@ +Field Name Bits Default Description +TEX0_SHADING_PS3 1:0 0x0 Specifies undefined(0), flat(1) and Gouraud(2/def) + shading for each texture. + POSSIBLE VALUES: + 00 - Solid fill color + 01 - Flat shading + 02 - Gouraud shading +TEX1_SHADING_PS3 3:2 0x0 Specifies undefined(0), flat(1) and Gouraud(2/def) + shading for each texture. + POSSIBLE VALUES: + 00 - Solid fill color + 01 - Flat shading + 02 - Gouraud shading +TEX2_SHADING_PS3 5:4 0x0 Specifies undefined(0), flat(1) and Gouraud(2/def) + shading for each texture. + POSSIBLE VALUES: + 00 - Solid fill color + 01 - Flat shading + 02 - Gouraud shading +TEX3_SHADING_PS3 7:6 0x0 Specifies undefined(0), flat(1) and Gouraud(2/def) + shading for each texture. + POSSIBLE VALUES: + 00 - Solid fill color + 01 - Flat shading + 02 - Gouraud shading +TEX4_SHADING_PS3 9:8 0x0 Specifies undefined(0), flat(1) and Gouraud(2/def) + shading for each texture. + POSSIBLE VALUES: + 00 - Solid fill color + 01 - Flat shading + 02 - Gouraud shading +TEX5_SHADING_PS3 11:10 0x0 Specifies undefined(0), flat(1) and Gouraud(2/def) + shading for each texture. + POSSIBLE VALUES: + 00 - Solid fill color + 01 - Flat shading + 02 - Gouraud shading +TEX6_SHADING_PS3 13:12 0x0 Specifies undefined(0), flat(1) and Gouraud(2/def) + shading for each texture. + POSSIBLE VALUES: + 00 - Solid fill color + 01 - Flat shading + 02 - Gouraud shading +TEX7_SHADING_PS3 15:14 0x0 Specifies undefined(0), flat(1) and Gouraud(2/def) + shading for each texture. + POSSIBLE VALUES: + 00 - Solid fill color + 01 - Flat shading + 02 - Gouraud shading +TEX8_SHADING_PS3 17:16 0x0 Specifies undefined(0), flat(1) and Gouraud(2/def) + shading for each texture. + POSSIBLE VALUES: + 00 - Solid fill color + 01 - Flat shading + 02 - Gouraud shading +TEX9_SHADING_PS3 19:18 0x0 Specifies undefined(0), flat(1) and Gouraud(2/def) + shading for each texture. + POSSIBLE VALUES: + 00 - Solid fill color + 01 - Flat shading + 02 - Gouraud shading +TEX10_SHADING_PS3 21:20 0x0 Specifies undefined(0), flat(1) and Gouraud(2/def) + shading for tex10 components. + POSSIBLE VALUES: + 00 - Solid fill color + 01 - Flat shading + 02 - Gouraud shading +COLOR0_TEX_OVERRIDE 25:22 0x0 Specifies if each color should come from a texture and + which one. + POSSIBLE VALUES: + 00 - No override + 01 - Stuff texture 0 + 02 - Stuff texture 1 + 03 - Stuff texture 2 + 04 - Stuff texture 3 + 05 - Stuff texture 4 + 06 - Stuff texture 5 + 07 - Stuff texture 6 + 08 - Stuff texture 7 + 09 - Stuff texture 8/C2 + 10 - Stuff texture 9/C3 +COLOR1_TEX_OVERRIDE 29:26 0x0 Specifies if each color should come from a texture and + which one. + POSSIBLE VALUES: + 00 - No override + 01 - Stuff texture 0 + 02 - Stuff texture 1 + 03 - Stuff texture 2 + 04 - Stuff texture 3 + 05 - Stuff texture 4 + 06 - Stuff texture 5 + 07 - Stuff texture 6 + 08 - Stuff texture 7 + 09 - Stuff texture 8/C2 + 10 - Stuff texture 9/C3 diff --git a/regs/ga_enhance.txt b/regs/ga_enhance.txt new file mode 100644 index 0000000..b690501 --- /dev/null +++ b/regs/ga_enhance.txt @@ -0,0 +1,17 @@ +Field Name Bits Default Description +DEADLOCK_CNTL 0 0x0 TCL/GA Deadlock control. + POSSIBLE VALUES: + 00 - No effect. + 01 - Prevents TCL interface from deadlocking on GA side. +FASTSYNC_CNTL 1 0x1 Enables Fast register/primitive switching + POSSIBLE VALUES: + 00 - No effect. + 01 - Enables high-performance register/primitive switching. +REG_READWRITE 2 0x0 R520+: When set, GA supports simultaneous register + reads & writes + POSSIBLE VALUES: + 00 - No effect. + 01 - Enables GA support of simultaneous register reads and writes. +REG_NOSTALL 3 0x0 POSSIBLE VALUES: + 00 - No effect. + 01 - Enables GA support of no-stall reads for register read back. diff --git a/regs/ga_fifo_cntl.txt b/regs/ga_fifo_cntl.txt new file mode 100644 index 0000000..29a0c53 --- /dev/null +++ b/regs/ga_fifo_cntl.txt @@ -0,0 +1,7 @@ +Field Name Bits Default Description +VERTEX_FIFO 2:0 0x0 Number of words remaining in input vertex fifo before + asserting nearly full +INDEX_FIFO 5:3 0x0 Number of words remaining in input primitive fifo + before asserting nearly full +REG_FIFO 13:6 0x0 Number of words remaining in input register fifo before + asserting nearly full diff --git a/regs/ga_fill_a.txt b/regs/ga_fill_a.txt new file mode 100644 index 0000000..2db26a0 --- /dev/null +++ b/regs/ga_fill_a.txt @@ -0,0 +1,2 @@ +Field Name Bits Default Description +COLOR_ALPHA 31:0 0x0 FP20 format for alpha fill. diff --git a/regs/ga_fill_b.txt b/regs/ga_fill_b.txt new file mode 100644 index 0000000..253466c --- /dev/null +++ b/regs/ga_fill_b.txt @@ -0,0 +1,2 @@ +Field Name Bits Default Description +COLOR_BLUE 31:0 0x0 FP20 format for blue fill. diff --git a/regs/ga_fill_g.txt b/regs/ga_fill_g.txt new file mode 100644 index 0000000..18e1ac1 --- /dev/null +++ b/regs/ga_fill_g.txt @@ -0,0 +1,2 @@ +Field Name Bits Default Description +COLOR_GREEN 31:0 0x0 FP20 format for green fill. diff --git a/regs/ga_fill_r.txt b/regs/ga_fill_r.txt new file mode 100644 index 0000000..5bc14a2 --- /dev/null +++ b/regs/ga_fill_r.txt @@ -0,0 +1,2 @@ +Field Name Bits Default Description +COLOR_RED 31:0 0x0 FP20 format for red fill. diff --git a/regs/ga_fog_offset.txt b/regs/ga_fog_offset.txt new file mode 100644 index 0000000..cc0497a --- /dev/null +++ b/regs/ga_fog_offset.txt @@ -0,0 +1,2 @@ +Field Name Bits Default Description +VALUE 31:0 0x0 32b SPFP scale value. diff --git a/regs/ga_fog_scale.txt b/regs/ga_fog_scale.txt new file mode 100644 index 0000000..cc0497a --- /dev/null +++ b/regs/ga_fog_scale.txt @@ -0,0 +1,2 @@ +Field Name Bits Default Description +VALUE 31:0 0x0 32b SPFP scale value. diff --git a/regs/ga_idle.txt b/regs/ga_idle.txt new file mode 100644 index 0000000..c4611d9 --- /dev/null +++ b/regs/ga_idle.txt @@ -0,0 +1,28 @@ +Field Name Bits Default Description +PIPE3_Z_IDLE 0 0x0 Idle status of physical pipe 3 Z unit +PIPE2_Z_IDLE 1 0x0 Idle status of physical pipe 2 Z unit +PIPE3_CB_IDLE 2 0x0 Idle status of physical pipe 3 CB unit +PIPE2_CB_IDLE 3 0x0 Idle status of physical pipe 2 CB unit +PIPE3_FG_IDLE 4 0x0 Idle status of physical pipe 3 FG unit +PIPE2_FG_IDLE 5 0x0 Idle status of physical pipe 2 FG unit +PIPE3_US_IDLE 6 0x0 Idle status of physical pipe 3 US unit +PIPE2_US_IDLE 7 0x0 Idle status of physical pipe 2 US unit +PIPE3_SC_IDLE 8 0x0 Idle status of physical pipe 3 SC unit +PIPE2_SC_IDLE 9 0x0 Idle status of physical pipe 2 SC unit +PIPE3_RS_IDLE 10 0x0 Idle status of physical pipe 3 RS unit +PIPE2_RS_IDLE 11 0x0 Idle status of physical pipe 2 RS unit +PIPE1_Z_IDLE 12 0x0 Idle status of physical pipe 1 Z unit +PIPE0_Z_IDLE 13 0x0 Idle status of physical pipe 0 Z unit +PIPE1_CB_IDLE 14 0x0 Idle status of physical pipe 1 CB unit +PIPE0_CB_IDLE 15 0x0 Idle status of physical pipe 0 CB unit +PIPE1_FG_IDLE 16 0x0 Idle status of physical pipe 1 FG unit +PIPE0_FG_IDLE 17 0x0 Idle status of physical pipe 0 FG unit +PIPE1_US_IDLE 18 0x0 Idle status of physical pipe 1 US unit +PIPE0_US_IDLE 19 0x0 Idle status of physical pipe 0 US unit +PIPE1_SC_IDLE 20 0x0 Idle status of physical pipe 1 SC unit +PIPE0_SC_IDLE 21 0x0 Idle status of physical pipe 0 SC unit +PIPE1_RS_IDLE 22 0x0 Idle status of physical pipe 1 RS unit +PIPE0_RS_IDLE 23 0x0 Idle status of physical pipe 0 RS unit +SU_IDLE 24 0x0 Idle status of SU unit +GA_IDLE 25 0x0 Idle status of GA unit +GA_UNIT2_IDLE 26 0x0 Idle status of GA unit2 diff --git a/regs/ga_line_cntl.txt b/regs/ga_line_cntl.txt new file mode 100644 index 0000000..5ce724b --- /dev/null +++ b/regs/ga_line_cntl.txt @@ -0,0 +1,14 @@ +Field Name Bits Default Description +WIDTH 15:0 0x0 1/2 width of line, in subpixels (1/12 or 1/16 only, even in + 8b subprecision); (16.0) fixed format. +END_TYPE 17:16 0x0 Specifies how ends of lines should be drawn. + POSSIBLE VALUES: + 00 - Horizontal + 01 - Vertical + 02 - Square (horizontal or vertical depending upon slope) + 03 - Computed (perpendicular to slope) +SORT 18 0x0 R520+: When enabled, all lines are sorted so that V0 is + vertex with smallest X, or if X equal, smallest Y. + POSSIBLE VALUES: + 00 - No sorting (default) + 01 - Sort on minX than MinY diff --git a/regs/ga_line_s0.txt b/regs/ga_line_s0.txt new file mode 100644 index 0000000..448be46 --- /dev/null +++ b/regs/ga_line_s0.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +S0 31:0 0x0 S texture coordinate value generated for vertex 0 of an + antialiased line; 32-bit IEEE float format. Typical 0.0. diff --git a/regs/ga_line_s1.txt b/regs/ga_line_s1.txt new file mode 100644 index 0000000..14b1e5e --- /dev/null +++ b/regs/ga_line_s1.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +S1 31:0 0x0 S texture coordinate value generated for vertex 1 of an + antialiased line; 32-bit IEEE float format. Typical 1.0. diff --git a/regs/ga_line_stipple_config.txt b/regs/ga_line_stipple_config.txt new file mode 100644 index 0000000..30b31d7 --- /dev/null +++ b/regs/ga_line_stipple_config.txt @@ -0,0 +1,8 @@ +Field Name Bits Default Description +LINE_RESET 1:0 0x0 Specify type of reset to use for stipple accumulation. + POSSIBLE VALUES: + 00 - No reseting + 01 - Reset per line + 02 - Reset per packet +STIPPLE_SCALE 31:2 0x0 Specifies, in truncated (30b) floating point, scale to apply + to generated texture coordinates. diff --git a/regs/ga_offset.txt b/regs/ga_offset.txt new file mode 100644 index 0000000..6391e1c --- /dev/null +++ b/regs/ga_offset.txt @@ -0,0 +1,5 @@ +Field Name Bits Default Description +X_OFFSET 15:0 0x0 Specifies X offset in S15 format (subpixels -- 1/12 or + 1/16, even in 8b subprecision). +Y_OFFSET 31:16 0x0 Specifies Y offset in S15 format (subpixels -- 1/12 or + 1/16, even in 8b subprecision). diff --git a/regs/ga_point_minmax.txt b/regs/ga_point_minmax.txt new file mode 100644 index 0000000..f77a988 --- /dev/null +++ b/regs/ga_point_minmax.txt @@ -0,0 +1,5 @@ +Field Name Bits Default Description +MIN_SIZE 15:0 0x0 Minimum point & sprite radius (in subsamples) size to + allow. +MAX_SIZE 31:16 0x0 Maximum point & sprite radius (in subsamples) size to + allow. diff --git a/regs/ga_point_s0.txt b/regs/ga_point_s0.txt new file mode 100644 index 0000000..9a56294 --- /dev/null +++ b/regs/ga_point_s0.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +S0 31:0 0x0 S texture coordinate of vertex 0 for point; 32-bit IEEE + float format. diff --git a/regs/ga_point_s1.txt b/regs/ga_point_s1.txt new file mode 100644 index 0000000..c25fcb4 --- /dev/null +++ b/regs/ga_point_s1.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +S1 31:0 0x0 S texture coordinate of vertex 1 for point; 32-bit IEEE + float format. diff --git a/regs/ga_point_size.txt b/regs/ga_point_size.txt new file mode 100644 index 0000000..a7368cd --- /dev/null +++ b/regs/ga_point_size.txt @@ -0,0 +1,5 @@ +Field Name Bits Default Description +HEIGHT 15:0 0x0 1/2 Height of point; fixed (16.0), subpixel format (1/12 + or 1/16, even if in 8b precision). +WIDTH 31:16 0x0 1/2 Width of point; fixed (16.0), subpixel format (1/12 or + 1/16, even if in 8b precision) diff --git a/regs/ga_point_t0.txt b/regs/ga_point_t0.txt new file mode 100644 index 0000000..803226c --- /dev/null +++ b/regs/ga_point_t0.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +T0 31:0 0x0 T texture coordinate of vertex 0 for point; 32-bit IEEE + float format. diff --git a/regs/ga_point_t1.txt b/regs/ga_point_t1.txt new file mode 100644 index 0000000..cd73981 --- /dev/null +++ b/regs/ga_point_t1.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +T1 31:0 0x0 T texture coordinate of vertex 1 for point; 32-bit IEEE + float format. diff --git a/regs/ga_poly_mode.txt b/regs/ga_poly_mode.txt new file mode 100644 index 0000000..f714f2a --- /dev/null +++ b/regs/ga_poly_mode.txt @@ -0,0 +1,18 @@ +Field Name Bits Default Description +POLY_MODE 1:0 0x0 Polygon mode enable. + POSSIBLE VALUES: + 00 - Disable poly mode (render triangles). + 01 - Dual mode (send 2 sets of 3 polys with specified poly type). + 02 - Reserved +FRONT_PTYPE 6:4 0x0 Specifies how to render front-facing polygons. + POSSIBLE VALUES: + 00 - Draw points. + 01 - Draw lines. + 02 - Draw triangles. + 03 - Reserved 3 - 7. +BACK_PTYPE 9:7 0x0 Specifies how to render back-facing polygons. + POSSIBLE VALUES: + 00 - Draw points. + 01 - Draw lines. + 02 - Draw triangles. + 03 - Reserved 3 - 7. diff --git a/regs/ga_round_mode.txt b/regs/ga_round_mode.txt new file mode 100644 index 0000000..d40e37f --- /dev/null +++ b/regs/ga_round_mode.txt @@ -0,0 +1,20 @@ +Field Name Bits Default Description +GEOMETRY_ROUND 1:0 0x0 Trunc (0) or round to nearest (1) for geometry (XY). + POSSIBLE VALUES: + 00 - Round to trunc + 01 - Round to nearest +COLOR_ROUND 3:2 0x0 When set, FP32 to FP20 using round to nearest; + otherwise trunc + POSSIBLE VALUES: + 00 - Round to trunc + 01 - Round to nearest +RGB_CLAMP 4 0x0 Specifies SPFP color clamp range of [0,1] or FP20 for RGB. + POSSIBLE VALUES: + 00 - Clamp to [0,1.0] for RGB + 01 - RGB is FP20 +ALPHA_CLAMP 5 0x0 Specifies SPFP alpha clamp range of [0,1] or FP20. + POSSIBLE VALUES: + 00 - Clamp to [0,1.0] for Alpha + 01 - Alpha is FP20 +GEOMETRY_MASK 9:6 0x0 4b negative polarity mask for subpixel precision. + Inverted version gets ANDed with subpixel X, Y masks. diff --git a/regs/ga_solid_ba.txt b/regs/ga_solid_ba.txt new file mode 100644 index 0000000..a77aa72 --- /dev/null +++ b/regs/ga_solid_ba.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +COLOR_ALPHA 15:0 0x0 Component alpha value. (S3.12) +COLOR_BLUE 31:16 0x0 Component blue value. (S3.12) diff --git a/regs/ga_solid_rg.txt b/regs/ga_solid_rg.txt new file mode 100644 index 0000000..e1db641 --- /dev/null +++ b/regs/ga_solid_rg.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +COLOR_GREEN 15:0 0x0 Component green value (S3.12). +COLOR_RED 31:16 0x0 Component red value (S3.12). diff --git a/regs/ga_triangle_stipple.txt b/regs/ga_triangle_stipple.txt new file mode 100644 index 0000000..eb803a5 --- /dev/null +++ b/regs/ga_triangle_stipple.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +X_SHIFT 3:0 0x0 Amount to shift x position before conversion to SPFP. +Y_SHIFT 19:16 0x0 Amount to shift y position before conversion to SPFP. diff --git a/regs/ga_us_vector_data.txt b/regs/ga_us_vector_data.txt new file mode 100644 index 0000000..2ed8983 --- /dev/null +++ b/regs/ga_us_vector_data.txt @@ -0,0 +1,2 @@ +Field Name Bits Default Description +DATA 31:0 0x0 32 bit dword diff --git a/regs/ga_us_vector_index.txt b/regs/ga_us_vector_index.txt new file mode 100644 index 0000000..189fa4a --- /dev/null +++ b/regs/ga_us_vector_index.txt @@ -0,0 +1,20 @@ +Field Name Bits Default Description +INDEX 8:0 0x0 Instruction (TYPE == GA_US_VECTOR_INST) or + constant (TYPE == GA_US_VECTOR_CONST) + number at which to start loading. The GA will then + expect n*6 (instructions) or n*4 (constants) writes to + GA_US_VECTOR_DATA. The GA will self-increment + until this register is written again. For instructions, the + GA expects the dwords in the following order: + US_CMN_INST, US_ALU_RGB_ADDR, + US_ALU_ALPHA_ADDR, US_ALU_ALPHA, + US_RGB_INST, US_ALPHA_INST, US_RGBA_INST. + For constants, the GA expects the dwords in RGBA + order. +TYPE 16 0x0 Specifies if the GA should load instructions or constants. + POSSIBLE VALUES: + 00 - Load instructions - INDEX is an instruction index + 01 - Load constants - INDEX is a constant index +CLAMP 17 0x0 POSSIBLE VALUES: + 00 - No clamping of data - Default + 01 - Clamp to [-1.0,1.0] constant data diff --git a/regs/gb_aa_config.txt b/regs/gb_aa_config.txt new file mode 100644 index 0000000..6a1007a --- /dev/null +++ b/regs/gb_aa_config.txt @@ -0,0 +1,12 @@ +Field Name Bits Default Description +AA_ENABLE 0 0x0 Enables antialiasing. + POSSIBLE VALUES: + 00 - Antialiasing disabled(def) + 01 - Antialiasing enabled +NUM_AA_SUBSAMPLES 2:1 0x0 Specifies the number of subsamples to use while + antialiasing. + POSSIBLE VALUES: + 00 - 2 subsamples + 01 - 3 subsamples + 02 - 4 subsamples + 03 - 6 subsamples diff --git a/regs/gb_enable.txt b/regs/gb_enable.txt new file mode 100644 index 0000000..b0b8435 --- /dev/null +++ b/regs/gb_enable.txt @@ -0,0 +1,68 @@ +Field Name Bits Default Description +POINT_STUFF_ENABLE 0 0x0 Specifies if points will have stuffed texture coordinates. + POSSIBLE VALUES: + 00 - Disable point texture stuffing. + 01 - Enable point texture stuffing. +LINE_STUFF_ENABLE 1 0x0 Specifies if lines will have stuffed texture coordinates. + POSSIBLE VALUES: + 00 - Disable line texture stuffing. + 01 - Enable line texture stuffing. +TRIANGLE_STUFF_ENABLE 2 0x0 Specifies if triangles will have stuffed texture + coordinates. + POSSIBLE VALUES: + 00 - Disable triangle texture stuffing. + 01 - Enable triangle texture stuffing. +STENCIL_AUTO 5:4 0x0 Specifies if the auto dec/inc stencil mode should be + enabled, and how. + POSSIBLE VALUES: + 00 - Disable stencil auto inc/dec (def). + 01 - Enable stencil auto inc/dec based on triangle cw/ccw, force into dzy low bit. + 02 - Force 0 into dzy low bit. +TEX0_SOURCE 17:16 0x0 Specifies the sources of the texture coordinates for each + texture. + POSSIBLE VALUES: + 00 - Replicate VAP source texture coordinates (S,T,[R,Q]). + 01 - Stuff with source texture coordinates (S,T). + 02 - Stuff with source texture coordinates (S,T,R). +TEX1_SOURCE 19:18 0x0 Specifies the sources of the texture coordinates for each + texture. + POSSIBLE VALUES: + 00 - Replicate VAP source texture coordinates (S,T,[R,Q]). + 01 - Stuff with source texture coordinates (S,T). + 02 - Stuff with source texture coordinates (S,T,R). +TEX2_SOURCE 21:20 0x0 Specifies the sources of the texture coordinates for each + texture. + POSSIBLE VALUES: + 00 - Replicate VAP source texture coordinates (S,T,[R,Q]). + 01 - Stuff with source texture coordinates (S,T). + 02 - Stuff with source texture coordinates (S,T,R). +TEX3_SOURCE 23:22 0x0 Specifies the sources of the texture coordinates for each + texture. + POSSIBLE VALUES: + 00 - Replicate VAP source texture coordinates (S,T,[R,Q]). + 01 - Stuff with source texture coordinates (S,T). + 02 - Stuff with source texture coordinates (S,T,R). +TEX4_SOURCE 25:24 0x0 Specifies the sources of the texture coordinates for each + texture. + POSSIBLE VALUES: + 00 - Replicate VAP source texture coordinates (S,T,[R,Q]). + 01 - Stuff with source texture coordinates (S,T). + 02 - Stuff with source texture coordinates (S,T,R). +TEX5_SOURCE 27:26 0x0 Specifies the sources of the texture coordinates for each + texture. + POSSIBLE VALUES: + 00 - Replicate VAP source texture coordinates (S,T,[R,Q]). + 01 - Stuff with source texture coordinates (S,T). + 02 - Stuff with source texture coordinates (S,T,R). +TEX6_SOURCE 29:28 0x0 Specifies the sources of the texture coordinates for each + texture. + POSSIBLE VALUES: + 00 - Replicate VAP source texture coordinates (S,T,[R,Q]). + 01 - Stuff with source texture coordinates (S,T). + 02 - Stuff with source texture coordinates (S,T,R). +TEX7_SOURCE 31:30 0x0 Specifies the sources of the texture coordinates for each + texture. + POSSIBLE VALUES: + 00 - Replicate VAP source texture coordinates (S,T,[R,Q]). + 01 - Stuff with source texture coordinates (S,T). + 02 - Stuff with source texture coordinates (S,T,R). diff --git a/regs/gb_fifo_size.txt b/regs/gb_fifo_size.txt new file mode 100644 index 0000000..dee143a --- /dev/null +++ b/regs/gb_fifo_size.txt @@ -0,0 +1,58 @@ +Field Name Bits Default Description +SC_IFIFO_SIZE 1:0 0x0 Size of scan converter input FIFO (XYZ) + POSSIBLE VALUES: + 00 - 32 words + 01 - 64 words + 02 - 128 words + 03 - 256 words +SC_TZFIFO_SIZE 3:2 0x0 Size of scan converter top-of-pipe Z FIFO + POSSIBLE VALUES: + 00 - 16 words + 01 - 32 words + 02 - 64 words + 03 - 128 words +SC_BFIFO_SIZE 5:4 0x0 Size of scan converter input FIFO (B) + POSSIBLE VALUES: + 00 - 32 words + 01 - 64 words + 02 - 128 words + 03 - 256 words +RS_TFIFO_SIZE 7:6 0x0 Size of ras input FIFO (Texture) + POSSIBLE VALUES: + 00 - 64 words + 01 - 128 words + 02 - 256 words + 03 - 512 words +RS_CFIFO_SIZE 9:8 0x0 Size of ras input FIFO (Color) + POSSIBLE VALUES: + 00 - 64 words + 01 - 128 words + 02 - 256 words + 03 - 512 words +US_RAM_SIZE 11:10 0x0 Size of us RAM + POSSIBLE VALUES: + 00 - 64 words + 01 - 128 words + 02 - 256 words + 03 - 512 words +US_OFIFO_SIZE 13:12 0x0 Size of us output FIFO (RGBA) + POSSIBLE VALUES: + 00 - 16 words + 01 - 32 words + 02 - 64 words + 03 - 128 words +US_WFIFO_SIZE 15:14 0x0 Size of us output FIFO (W) + POSSIBLE VALUES: + 00 - 16 words + 01 - 32 words + 02 - 64 words + 03 - 128 words +RS_HIGHWATER_COL 18:16 0x0 High water mark for RS colors` fifo -- NOT USED +RS_HIGHWATER_TEX 21:19 0x0 High water mark for RS textures` fifo -- NOT USED +US_OFIFO_HIGHWATER 23:22 0x0 High water mark for US output fifo + POSSIBLE VALUES: + 00 - 0 words + 01 - 4 words + 02 - 8 words + 03 - 12 words +US_CUBE_FIFO_HIGHWATER 28:24 0x0 High water mark for US cube map fifo diff --git a/regs/gb_fifo_size1.txt b/regs/gb_fifo_size1.txt new file mode 100644 index 0000000..aa421ca --- /dev/null +++ b/regs/gb_fifo_size1.txt @@ -0,0 +1,5 @@ +Field Name Bits Default Description +SC_HIGHWATER_IFIFO 5:0 0x0 High water mark for SC input fifo +SC_HIGHWATER_BFIFO 11:6 0x0 High water mark for SC input fifo (B) +RS_HIGHWATER_COL 17:12 0x0 High water mark for RS colors` fifo +RS_HIGHWATER_TEX 23:18 0x0 High water mark for RS textures` fifo diff --git a/regs/gb_mspos0.txt b/regs/gb_mspos0.txt new file mode 100644 index 0000000..3f6e19b --- /dev/null +++ b/regs/gb_mspos0.txt @@ -0,0 +1,19 @@ +Field Name Bits Default Description +MS_X0 3:0 0x0 Specifies the x and y position (in subpixels) of + multisample 0 +MS_Y0 7:4 0x0 Specifies the x and y position (in subpixels) of + multisample 0 +MS_X1 11:8 0x0 Specifies the x and y position (in subpixels) of + multisample 1 +MS_Y1 15:12 0x0 Specifies the x and y position (in subpixels) of + multisample 1 +MS_X2 19:16 0x0 Specifies the x and y position (in subpixels) of + multisample 2 +MS_Y2 23:20 0x0 Specifies the x and y position (in subpixels) of + multisample 2 +MSBD0_Y 27:24 0x0 Specifies the minimum x and y distance (in subpixels) + between the pixel edge and the multisamples. These + values are used in the first (coarse) scan converter +MSBD0_X 31:28 0x0 Specifies the minimum x and y distance (in subpixels) + between the pixel edge and the multisamples. These + values are used in the first (coarse) scan converter diff --git a/regs/gb_mspos1.txt b/regs/gb_mspos1.txt new file mode 100644 index 0000000..054226f --- /dev/null +++ b/regs/gb_mspos1.txt @@ -0,0 +1,16 @@ +Field Name Bits Default Description +MS_X3 3:0 0x0 Specifies the x and y position (in subpixels) of + multisample 3 +MS_Y3 7:4 0x0 Specifies the x and y position (in subpixels) of + multisample 3 +MS_X4 11:8 0x0 Specifies the x and y position (in subpixels) of + multisample 4 +MS_Y4 15:12 0x0 Specifies the x and y position (in subpixels) of + multisample 4 +MS_X5 19:16 0x0 Specifies the x and y position (in subpixels) of + multisample 5 +MS_Y5 23:20 0x0 Specifies the x and y position (in subpixels) of + multisample 5 +MSBD1 27:24 0x0 Specifies the minimum distance (in subpixels) between + the pixel edge and the multisamples. This value is used + in the second (quad) scan converter diff --git a/regs/gb_pipe_select.txt b/regs/gb_pipe_select.txt new file mode 100644 index 0000000..27a53ac --- /dev/null +++ b/regs/gb_pipe_select.txt @@ -0,0 +1,19 @@ +Field Name Bits Default Description +PIPE0_ID 1:0 0x0 Maps physical pipe 0 to logical pipe ID (def 0). +PIPE1_ID 3:2 0x1 Maps physical pipe 1 to logical pipe ID (def 1). +PIPE2_ID 5:4 0x2 Maps physical pipe 2 to logical pipe ID (def 2). +PIPE3_ID 7:6 0x3 Maps physical pipe 3 to logical pipe ID (def 3). +PIPE_MASK 11:8 0x0 4b mask, indicates which physical pipes are enabled (def + none=0x0) -- B3=P3, B2=P2, B1=P1, B0=P0. -- 1: + enabled, 0: disabled +MAX_PIPE 13:12 0x3 2b, indicates, by the fuses, the max number of allowed + pipes. 0 = 1 pipe ... 3 = 4 pipes -- Read Only +BAD_PIPES 17:14 0xF 4b, indicates, by the fuses, the bad pipes: B3=P3, B2=P2, + B1=P1, B0=P0 -- 1: bad, 0: good -- Read Only +CONFIG_PIPES 18 0x0 If this bit is set when writing this register, the logical + pipe ID values are assigned automatically based on the + values that are read back in the MAX_PIPE and + BAD_PIPES fields. This field is always read back as 0. + POSSIBLE VALUES: + 00 - Do nothing + 01 - Force self-configuration diff --git a/regs/gb_select.txt b/regs/gb_select.txt new file mode 100644 index 0000000..910c08e --- /dev/null +++ b/regs/gb_select.txt @@ -0,0 +1,25 @@ +Field Name Bits Default Description +FOG_SELECT 2:0 0x0 Specifies source for outgoing (GA to SU) fog value. + POSSIBLE VALUES: + 00 - Select C0A + 01 - Select C1A + 02 - Select C2A + 03 - Select C3A + 04 - Select 1/(1/W) + 05 - Select Z +DEPTH_SELECT 3 0x0 Specifies source for outgoing (GA/SU & SU/RAS) depth + value. + POSSIBLE VALUES: + 00 - Select Z + 01 - Select 1/(1/W) +W_SELECT 4 0x0 Specifies source for outgoing (1/W) value, used to + disable perspective correct colors/textures. + POSSIBLE VALUES: + 00 - Select (1/W) + 01 - Select 1.0 +FOG_STUFF_ENABLE 5 0x0 Controls enabling of fog stuffing into texture coordinate. + POSSIBLE VALUES: + 00 - Disable fog texture stuffing + 01 - Enable fog texture stuffing +FOG_STUFF_TEX 9:6 0x0 Controls which texture gets fog value +FOG_STUFF_COMP 11:10 0x0 Controls which component of texture gets fog value diff --git a/regs/gb_tile_config.txt b/regs/gb_tile_config.txt new file mode 100644 index 0000000..6e6c5fd --- /dev/null +++ b/regs/gb_tile_config.txt @@ -0,0 +1,77 @@ +Field Name Bits Default Description +ENABLE 0 0x1 Enables tiling, otherwise all tiles receive all polygons. + POSSIBLE VALUES: + 00 - Tiling disabled. + 01 - Tiling enabled (def). +PIPE_COUNT 3:1 0x0 Specifies the number of active pipes and contexts (up to + 4 pipes, 1 ctx). When this field is written, it is + automatically reduced by hardware so as not to use more + pipes than the number indicated in + GB_PIPE_SELECT.MAX_PIPES or the number of + pipes left unmasked GB_PIPE_SELECT.BAD_PIPES. + The potentially altered value is read back, rather than the + original value written by software. + POSSIBLE VALUES: + 00 - RV350 (1 pipe, 1 ctx) + 03 - R300 (2 pipes, 1 ctx) + 06 – R420-3P (3 pipes, 1 ctx) + 07 – R420 (4 pipes, 1 ctx) +TILE_SIZE 5:4 0x1 Specifies width & height (square), in pixels (only 16, 32 + available). + POSSIBLE VALUES: + 00 - 8 pixels. + 01 - 16 pixels. + 02 - 32 pixels. +SUPER_SIZE 8:6 0x0 Specifies number of tiles and config in super chip + configuration. + POSSIBLE VALUES: + 00 - 1x1 tile (one 1x1). + 01 - 2 tiles (two 1x1 : ST-A,B). + 02 - 4 tiles (one 2x2). + 03 - 8 tiles (two 2x2 : ST-A,B). + 04 - 16 tiles (one 4x4). + 05 - 32 tiles (two 4x4 : ST-A,B). + 06 - 64 tiles (one 8x8). + 07 - 128 tiles (two 8x8 : ST-A,B). +SUPER_X 11:9 0x0 X Location of chip within super tile. +SUPER_Y 14:12 0x0 Y Location of chip within super tile. +SUPER_TILE 15 0x0 Tile location of chip in a multi super tile config (Super + size of 2,8,32 or 128). + POSSIBLE VALUES: + 00 - ST-A tile. + 01 - ST-B tile. +SUBPIXEL 16 0x0 Specifies the precision of subpixels wrt pixels (12 or 16). + POSSIBLE VALUES: + 00 - Select 1/12 subpixel precision. + 01 - Select 1/16 subpixel precision. +QUADS_PER_RAS 18:17 0x0 Specifies the number of quads to be sent to each + rasterizer in turn when in RV300B or R300B mode + POSSIBLE VALUES: + 00 - 4 Quads + 01 - 8 Quads + 02 - 16 Quads + 03 - 32 Quads +BB_SCAN 19 0x0 Specifies whether to use an intercept or bounding box + based calculation for the first (coarse) scan converter + POSSIBLE VALUES: + 00 - Use intercept based scan converter + 01 - Use bounding box based scan converter +ALT_SCAN_EN 20 0x0 Specifies whether to use an altenate scan pattern for the + coarse scan converter + POSSIBLE VALUES: + 00 - Use normal left-right scan + 01 - Use alternate left-right-left scan +ALT_OFFSET 21 0x0 Not used -- should be 0 + POSSIBLE VALUES: + 00 - Not used + 01 - Not used +SUBPRECISION 22 0x0 Set to 0 +ALT_TILING 23 0x0 Support for 3x2 tiling in 3P mode + POSSIBLE VALUES: + 00 - Use default tiling in all tiling modes + 01 - Use alternative 3x2 tiling in 3P mode +Z_EXTENDED 24 0x0 Support for extended setup Z range from [0,1] to [-2,2] + with per pixel clamping + POSSIBLE VALUES: + 00 - Use (24.1) Z format, with vertex clamp to [1.0,0.0] + 01 - Use (S25.1) format, with vertex clamp to [2.0,-2.0] and per pixel [1.0,0.0] diff --git a/regs/gb_z_peq_config.txt b/regs/gb_z_peq_config.txt new file mode 100644 index 0000000..1124965 --- /dev/null +++ b/regs/gb_z_peq_config.txt @@ -0,0 +1,5 @@ +Field Name Bits Default Description +Z_PEQ_SIZE 0 0x0 Specifies the z plane equation size. + POSSIBLE VALUES: + 00 - 4x4 z plane equations (point-sampled or aa) + 01 - 8x8 z plane equations (point-sampled only) diff --git a/regs/ps3_enable.txt b/regs/ps3_enable.txt new file mode 100644 index 0000000..3b3c946 --- /dev/null +++ b/regs/ps3_enable.txt @@ -0,0 +1,6 @@ +Field Name Bits Default Description +PS3_MODE 0 0x0 When reset (default), follows R300/PS2 mode; when set, + allows for new ps3 mode. + POSSIBLE VALUES: + 00 - Default PS2 mode + 01 - New PS3 mode diff --git a/regs/ps3_tex_source.txt b/regs/ps3_tex_source.txt new file mode 100644 index 0000000..9eafe7b --- /dev/null +++ b/regs/ps3_tex_source.txt @@ -0,0 +1,61 @@ +Field Name Bits Default Description +TEX0_SOURCE 1:0 0x0 Specifies VAP source, or GA (ST) or GA (STR) stuffing + for each texture. + POSSIBLE VALUES: + 00 - Replicate VAP source texture coordinates (S,T,[R,Q]). + 01 - Stuff with source texture coordinates (S,T). + 02 - Stuff with source texture coordinates (S,T,R). +TEX1_SOURCE 3:2 0x0 Specifies VAP source, or GA (ST) or GA (STR) stuffing + for each texture. + POSSIBLE VALUES: + 00 - Replicate VAP source texture coordinates (S,T,[R,Q]). + 01 - Stuff with source texture coordinates (S,T). + 02 - Stuff with source texture coordinates (S,T,R). +TEX2_SOURCE 5:4 0x0 Specifies VAP source, or GA (ST) or GA (STR) stuffing + for each texture. + POSSIBLE VALUES: + 00 - Replicate VAP source texture coordinates (S,T,[R,Q]). + 01 - Stuff with source texture coordinates (S,T). + 02 - Stuff with source texture coordinates (S,T,R). +TEX3_SOURCE 7:6 0x0 Specifies VAP source, or GA (ST) or GA (STR) stuffing + for each texture. + POSSIBLE VALUES: + 00 - Replicate VAP source texture coordinates (S,T,[R,Q]). + 01 - Stuff with source texture coordinates (S,T). + 02 - Stuff with source texture coordinates (S,T,R). +TEX4_SOURCE 9:8 0x0 Specifies VAP source, or GA (ST) or GA (STR) stuffing + for each texture. + POSSIBLE VALUES: + 00 - Replicate VAP source texture coordinates (S,T,[R,Q]). + 01 - Stuff with source texture coordinates (S,T). + 02 - Stuff with source texture coordinates (S,T,R). +TEX5_SOURCE 11:10 0x0 Specifies VAP source, or GA (ST) or GA (STR) stuffing + for each texture. + POSSIBLE VALUES: + 00 - Replicate VAP source texture coordinates (S,T,[R,Q]). + 01 - Stuff with source texture coordinates (S,T). + 02 - Stuff with source texture coordinates (S,T,R). +TEX6_SOURCE 13:12 0x0 Specifies VAP source, or GA (ST) or GA (STR) stuffing + for each texture. + POSSIBLE VALUES: + 00 - Replicate VAP source texture coordinates (S,T,[R,Q]). + 01 - Stuff with source texture coordinates (S,T). + 02 - Stuff with source texture coordinates (S,T,R). +TEX7_SOURCE 15:14 0x0 Specifies VAP source, or GA (ST) or GA (STR) stuffing + for each texture. + POSSIBLE VALUES: + 00 - Replicate VAP source texture coordinates (S,T,[R,Q]). + 01 - Stuff with source texture coordinates (S,T). + 02 - Stuff with source texture coordinates (S,T,R). +TEX8_SOURCE 17:16 0x0 Specifies VAP source, or GA (ST) or GA (STR) stuffing + for each texture. + POSSIBLE VALUES: + 00 - Replicate VAP source texture coordinates (S,T,[R,Q]). + 01 - Stuff with source texture coordinates (S,T). + 02 - Stuff with source texture coordinates (S,T,R). +TEX9_SOURCE 19:18 0x0 Specifies VAP source, or GA (ST) or GA (STR) stuffing + for each texture. + POSSIBLE VALUES: + 00 - Replicate VAP source texture coordinates (S,T,[R,Q]). + 01 - Stuff with source texture coordinates (S,T). + 02 - Stuff with source texture coordinates (S,T,R). diff --git a/regs/ps3_vtx_fmt.txt b/regs/ps3_vtx_fmt.txt new file mode 100644 index 0000000..bcfb542 --- /dev/null +++ b/regs/ps3_vtx_fmt.txt @@ -0,0 +1,87 @@ +Field Name Bits Default Description +TEX_0_COMP_CNT 2:0 0x0 How many active components (0,1,2,3,4) are in each + texture. + POSSIBLE VALUES: + 00 - Not active + 01 - 1 component (VAP/GA), 2 component (GA/SU) + 02 - 2 component (VAP/GA), 2 component (GA/SU) + 03 - 3 component (VAP/GA), 3 component (GA/SU) + 04 - 4 component (VAP/GA), 4 component (GA/SU) +TEX_1_COMP_CNT 5:3 0x0 How many active components (0,1,2,3,4) are in each + texture. + POSSIBLE VALUES: + 00 - Not active + 01 - 1 component (VAP/GA), 2 component (GA/SU) + 02 - 2 component (VAP/GA), 2 component (GA/SU) + 03 - 3 component (VAP/GA), 3 component (GA/SU) + 04 - 4 component (VAP/GA), 4 component (GA/SU) +TEX_2_COMP_CNT 8:6 0x0 How many active components (0,1,2,3,4) are in each + texture. + POSSIBLE VALUES: + 00 - Not active + 01 - 1 component (VAP/GA), 2 component (GA/SU) + 02 - 2 component (VAP/GA), 2 component (GA/SU) + 03 - 3 component (VAP/GA), 3 component (GA/SU) + 04 - 4 component (VAP/GA), 4 component (GA/SU) +TEX_3_COMP_CNT 11:9 0x0 How many active components (0,1,2,3,4) are in each + texture. + POSSIBLE VALUES: + 00 - Not active + 01 - 1 component (VAP/GA), 2 component (GA/SU) + 02 - 2 component (VAP/GA), 2 component (GA/SU) + 03 - 3 component (VAP/GA), 3 component (GA/SU) + 04 - 4 component (VAP/GA), 4 component (GA/SU) +TEX_4_COMP_CNT 14:12 0x0 How many active components (0,1,2,3,4) are in each + texture. + POSSIBLE VALUES: + 00 - Not active + 01 - 1 component (VAP/GA), 2 component (GA/SU) + 02 - 2 component (VAP/GA), 2 component (GA/SU) + 03 - 3 component (VAP/GA), 3 component (GA/SU) + 04 - 4 component (VAP/GA), 4 component (GA/SU) +TEX_5_COMP_CNT 17:15 0x0 How many active components (0,1,2,3,4) are in each + texture. + POSSIBLE VALUES: + 00 - Not active + 01 - 1 component (VAP/GA), 2 component (GA/SU) + 02 - 2 component (VAP/GA), 2 component (GA/SU) + 03 - 3 component (VAP/GA), 3 component (GA/SU) + 04 - 4 component (VAP/GA), 4 component (GA/SU) +TEX_6_COMP_CNT 20:18 0x0 How many active components (0,1,2,3,4) are in each + texture. + POSSIBLE VALUES: + 00 - Not active + 01 - 1 component (VAP/GA), 2 component (GA/SU) + 02 - 2 component (VAP/GA), 2 component (GA/SU) + 03 - 3 component (VAP/GA), 3 component (GA/SU) + 04 - 4 component (VAP/GA), 4 component (GA/SU) +TEX_7_COMP_CNT 23:21 0x0 How many active components (0,1,2,3,4) are in each + texture. + POSSIBLE VALUES: + 00 - Not active + 01 - 1 component (VAP/GA), 2 component (GA/SU) + 02 - 2 component (VAP/GA), 2 component (GA/SU) + 03 - 3 component (VAP/GA), 3 component (GA/SU) + 04 - 4 component (VAP/GA), 4 component (GA/SU) +TEX_8_COMP_CNT 26:24 0x0 How many active components (0,1,2,3,4) are in each + texture. + POSSIBLE VALUES: + 00 - Not active + 01 - 1 component (VAP/GA), 2 component (GA/SU) + 02 - 2 component (VAP/GA), 2 component (GA/SU) + 03 - 3 component (VAP/GA), 3 component (GA/SU) + 04 - 4 component (VAP/GA), 4 component (GA/SU) +TEX_9_COMP_CNT 29:27 0x0 How many active components (0,1,2,3,4) are in each + texture. + POSSIBLE VALUES: + 00 - Not active + 01 - 1 component (VAP/GA), 2 component (GA/SU) + 02 - 2 component (VAP/GA), 2 component (GA/SU) + 03 - 3 component (VAP/GA), 3 component (GA/SU) + 04 - 4 component (VAP/GA), 4 component (GA/SU) +TEX_10_COMP_CNT 31:30 0x0 How many active components (0,2,3,4) are in texture 10. + POSSIBLE VALUES: + 00 - Not active + 01 - 2 component (GA/SU) + 02 - 3 component (GA/SU) + 03 - 4 component (GA/SU) diff --git a/regs/rb3d_aaresolve_ctl.txt b/regs/rb3d_aaresolve_ctl.txt new file mode 100644 index 0000000..d30b460 --- /dev/null +++ b/regs/rb3d_aaresolve_ctl.txt @@ -0,0 +1,18 @@ +Field Name Bits Default Description +AARESOLVE_MODE 0 0x0 Specifies if the color buffer is in resolve mode. The + cache must be empty before changing this register. + POSSIBLE VALUES: + 00 - Normal operation. + 01 - Resolve operation. +AARESOLVE_GAMMA 1 none Specifies the gamma and degamma to be applied to the + samples before and after filtering, respectively. + POSSIBLE VALUES: + 00 - 1.0 + 01 - 2.2 +AARESOLVE_ALPHA 2 0x0 Controls whether alpha is averaged in the resolve. 0 => + the resolved alpha value is selected from the sample 0 + value. 1=> the resolved alpha value is a filtered (average) + result of of the samples. + POSSIBLE VALUES: + 00 - Resolved alpha value is taken from sample 0. + 01 - Resolved alpha value is the average of the samples. The average is not gamma corrected. diff --git a/regs/rb3d_aaresolve_offset.txt b/regs/rb3d_aaresolve_offset.txt new file mode 100644 index 0000000..ec600fe --- /dev/null +++ b/regs/rb3d_aaresolve_offset.txt @@ -0,0 +1,2 @@ +Field Name Bits Default Description +AARESOLVE_OFFSET 31:5 none 256-bit aligned 3D resolve destination offset. diff --git a/regs/rb3d_aaresolve_pitch.txt b/regs/rb3d_aaresolve_pitch.txt new file mode 100644 index 0000000..03d444f --- /dev/null +++ b/regs/rb3d_aaresolve_pitch.txt @@ -0,0 +1,2 @@ +Field Name Bits Default Description +AARESOLVE_PITCH 13:1 none 3D destination pitch in multiples of 2-pixels. diff --git a/regs/rb3d_ablendcntl.txt b/regs/rb3d_ablendcntl.txt new file mode 100644 index 0000000..86206b0 --- /dev/null +++ b/regs/rb3d_ablendcntl.txt @@ -0,0 +1,144 @@ +Field Name Bits Default Description +COMB_FCN 14:12 none Combine Function , Allows modification of how the + SRCBLEND and DESTBLEND are combined. + POSSIBLE VALUES: + 00 - Add and Clamp + 01 - Add but no Clamp + 02 - Subtract Dst from Src, and Clamp + 03 - Subtract Dst from Src, and don`t Clamp + 04 - Minimum of Src, Dst (the src and dst blend functions are forced to D3D_ONE) + 05 - Maximum of Src, Dst (the src and dst blend functions are forced to D3D_ONE) + 06 - Subtract Src from Dst, and Clamp + 07 - Subtract Src from Dst, and don`t Clamp +SRCBLEND 21:16 none Source Blend Function , Alpha blending function (SRC). + POSSIBLE VALUES: + 00 - RESERVED + 01 - D3D_ZERO + 02 - D3D_ONE + 03 - D3D_SRCCOLOR + 04 - D3D_INVSRCCOLOR + 05 - D3D_SRCALPHA + 06 - D3D_INVSRCALPHA + 07 - D3D_DESTALPHA + 08 - D3D_INVDESTALPHA + 09 - D3D_DESTCOLOR + 10 - D3D_INVDESTCOLOR + 11 - D3D_SRCALPHASAT + 12 - D3D_BOTHSRCALPHA + 13 - D3D_BOTHINVSRCALPHA + 14 - RESERVED + 15 - RESERVED + 16 - RESERVED + 17 - RESERVED + 18 - RESERVED + 19 - RESERVED + 20 - RESERVED + 21 - RESERVED + 22 - RESERVED + 23 - RESERVED + 24 - RESERVED + 25 - RESERVED + 26 - RESERVED + 27 - RESERVED + 28 - RESERVED + 29 - RESERVED + 30 - RESERVED + 31 - RESERVED + 32 - GL_ZERO + 33 - GL_ONE + 34 - GL_SRC_COLOR + 35 - GL_ONE_MINUS_SRC_COLOR + 36 - GL_DST_COLOR + 37 - GL_ONE_MINUS_DST_COLOR + 38 - GL_SRC_ALPHA + 39 - GL_ONE_MINUS_SRC_ALPHA + 40 - GL_DST_ALPHA + 41 - GL_ONE_MINUS_DST_ALPHA + 42 - GL_SRC_ALPHA_SATURATE + 43 - GL_CONSTANT_COLOR + 44 - GL_ONE_MINUS_CONSTANT_COLOR + 45 - GL_CONSTANT_ALPHA + 46 - GL_ONE_MINUS_CONSTANT_ALPHA + 47 - RESERVED + 48 - RESERVED + 49 - RESERVED + 50 - RESERVED + 51 - RESERVED + 52 - RESERVED + 53 - RESERVED + 54 - RESERVED + 55 - RESERVED + 56 - RESERVED + 57 - RESERVED + 58 - RESERVED + 59 - RESERVED + 60 - RESERVED + 61 - RESERVED + 62 - RESERVED + 63 - RESERVED +DESTBLEND 29:24 none Destination Blend Function , Alpha blending function (DST). + POSSIBLE VALUES: + 00 - RESERVED + 01 - D3D_ZERO + 02 - D3D_ONE + 03 - D3D_SRCCOLOR + 04 - D3D_INVSRCCOLOR + 05 - D3D_SRCALPHA + 06 - D3D_INVSRCALPHA + 07 - D3D_DESTALPHA + 08 - D3D_INVDESTALPHA + 09 - D3D_DESTCOLOR + 10 - D3D_INVDESTCOLOR + 11 - RESERVED + 12 - RESERVED + 13 - RESERVED + 14 - RESERVED + 15 - RESERVED + 16 - RESERVED + 17 - RESERVED + 18 - RESERVED + 19 - RESERVED + 20 - RESERVED + 21 - RESERVED + 22 - RESERVED + 23 - RESERVED + 24 - RESERVED + 25 - RESERVED + 26 - RESERVED + 27 - RESERVED + 28 - RESERVED + 29 - RESERVED + 30 - RESERVED + 31 - RESERVED + 32 - GL_ZERO + 33 - GL_ONE + 34 - GL_SRC_COLOR + 35 - GL_ONE_MINUS_SRC_COLOR + 36 - GL_DST_COLOR + 37 - GL_ONE_MINUS_DST_COLOR + 38 - GL_SRC_ALPHA + 39 - GL_ONE_MINUS_SRC_ALPHA + 40 - GL_DST_ALPHA + 41 - GL_ONE_MINUS_DST_ALPHA + 42 - RESERVED + 43 - GL_CONSTANT_COLOR + 44 - GL_ONE_MINUS_CONSTANT_COLOR + 45 - GL_CONSTANT_ALPHA + 46 - GL_ONE_MINUS_CONSTANT_ALPHA + 47 - RESERVED + 48 - RESERVED + 49 - RESERVED + 50 - RESERVED + 51 - RESERVED + 52 - RESERVED + 53 - RESERVED + 54 - RESERVED + 55 - RESERVED + 56 - RESERVED + 57 - RESERVED + 58 - RESERVED + 59 - RESERVED + 60 - RESERVED + 61 - RESERVED + 62 - RESERVED + 63 - RESERVED diff --git a/regs/rb3d_blendcntl.txt b/regs/rb3d_blendcntl.txt new file mode 100644 index 0000000..7baf5fb --- /dev/null +++ b/regs/rb3d_blendcntl.txt @@ -0,0 +1,179 @@ +Field Name Bits Default Description +ALPHA_BLEND_ENABLE 0 0x0 Allow alpha blending with the destination. + POSSIBLE VALUES: + 00 - Disable + 01 - Enable +SEPARATE_ALPHA_ENABLE 1 0x0 Enables use of RB3D_ABLENDCNTL + POSSIBLE VALUES: + 00 - Disabled (Use RB3D_BLENDCNTL) + 01 - Enabled (Use RB3D_ABLENDCNTL) +READ_ENABLE 2 0x1 When blending is enabled, this enables memory reads. + Memory reads will still occur when this is disabled if + they are for reasons not related to blending. + POSSIBLE VALUES: + 00 - Disable reads + 01 - Enable reads +DISCARD_SRC_PIXELS 5:3 0x0 Discard pixels when blending is enabled based on the src + color. + POSSIBLE VALUES: + 00 - Disable + 01 - Discard pixels if src alpha <= RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD + 02 - Discard pixels if src color <= RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD + 03 - Discard pixels if src argb <= RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD + 04 - Discard pixels if src alpha >= RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD + 05 - Discard pixels if src color >= RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD + 06 - Discard pixels if src argb >= RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD + 07 - (reserved) +COMB_FCN 14:12 none Combine Function , Allows modification of how the + SRCBLEND and DESTBLEND are combined. + POSSIBLE VALUES: + 00 - Add and Clamp + 01 - Add but no Clamp + 02 - Subtract Dst from Src, and Clamp + 03 - Subtract Dst from Src, and don`t Clamp + 04 - Minimum of Src, Dst (the src and dst blend functions are forced to D3D_ONE) + 05 - Maximum of Src, Dst (the src and dst blend functions are forced to D3D_ONE) + 06 - Subtract Src from Dst, and Clamp + 07 - Subtract Src from Dst, and don`t Clamp +SRCBLEND 21:16 none Source Blend Function , Alpha blending function (SRC). + POSSIBLE VALUES: + 00 - RESERVED + 01 - D3D_ZERO + 02 - D3D_ONE + 03 - D3D_SRCCOLOR + 04 - D3D_INVSRCCOLOR + 05 - D3D_SRCALPHA + 06 - D3D_INVSRCALPHA + 07 - D3D_DESTALPHA + 08 - D3D_INVDESTALPHA + 09 - D3D_DESTCOLOR + 10 - D3D_INVDESTCOLOR + 11 - D3D_SRCALPHASAT + 12 - D3D_BOTHSRCALPHA + 13 - D3D_BOTHINVSRCALPHA + 14 - RESERVED + 15 - RESERVED + 16 - RESERVED + 17 - RESERVED + 18 - RESERVED + 19 - RESERVED + 20 - RESERVED + 21 - RESERVED + 22 - RESERVED + 23 - RESERVED + 24 - RESERVED + 25 - RESERVED + 26 - RESERVED + 27 - RESERVED + 28 - RESERVED + 29 - RESERVED + 30 - RESERVED + 31 - RESERVED + 32 - GL_ZERO + 33 - GL_ONE + 34 - GL_SRC_COLOR + 35 - GL_ONE_MINUS_SRC_COLOR + 36 - GL_DST_COLOR + 37 - GL_ONE_MINUS_DST_COLOR + 38 - GL_SRC_ALPHA + 39 - GL_ONE_MINUS_SRC_ALPHA + 40 - GL_DST_ALPHA + 41 - GL_ONE_MINUS_DST_ALPHA + 42 - GL_SRC_ALPHA_SATURATE + 43 - GL_CONSTANT_COLOR + 44 - GL_ONE_MINUS_CONSTANT_COLOR + 45 - GL_CONSTANT_ALPHA + 46 - GL_ONE_MINUS_CONSTANT_ALPHA + 47 - RESERVED + 48 - RESERVED + 49 - RESERVED + 50 - RESERVED + 51 - RESERVED + 52 - RESERVED + 53 - RESERVED + 54 - RESERVED + 55 - RESERVED + 56 - RESERVED + 57 - RESERVED + 58 - RESERVED + 59 - RESERVED + 60 - RESERVED + 61 - RESERVED + 62 - RESERVED + 63 - RESERVED +DESTBLEND 29:24 none Destination Blend Function , Alpha blending function (DST). + POSSIBLE VALUES: + 00 - RESERVED + 01 - D3D_ZERO + 02 - D3D_ONE + 03 - D3D_SRCCOLOR + 04 - D3D_INVSRCCOLOR + 05 - D3D_SRCALPHA + 06 - D3D_INVSRCALPHA + 07 - D3D_DESTALPHA + 08 - D3D_INVDESTALPHA + 09 - D3D_DESTCOLOR + 10 - D3D_INVDESTCOLOR + 11 - RESERVED + 12 - RESERVED + 13 - RESERVED + 14 - RESERVED + 15 - RESERVED + 16 - RESERVED + 17 - RESERVED + 18 - RESERVED + 19 - RESERVED + 20 - RESERVED + 21 - RESERVED + 22 - RESERVED + 23 - RESERVED + 24 - RESERVED + 25 - RESERVED + 26 - RESERVED + 27 - RESERVED + 28 - RESERVED + 29 - RESERVED + 30 - RESERVED + 31 - RESERVED + 32 - GL_ZERO + 33 - GL_ONE + 34 - GL_SRC_COLOR + 35 - GL_ONE_MINUS_SRC_COLOR + 36 - GL_DST_COLOR + 37 - GL_ONE_MINUS_DST_COLOR + 38 - GL_SRC_ALPHA + 39 - GL_ONE_MINUS_SRC_ALPHA + 40 - GL_DST_ALPHA + 41 - GL_ONE_MINUS_DST_ALPHA + 42 - RESERVED + 43 - GL_CONSTANT_COLOR + 44 - GL_ONE_MINUS_CONSTANT_COLOR + 45 - GL_CONSTANT_ALPHA + 46 - GL_ONE_MINUS_CONSTANT_ALPHA + 47 - RESERVED + 48 - RESERVED + 49 - RESERVED + 50 - RESERVED + 51 - RESERVED + 52 - RESERVED + 53 - RESERVED + 54 - RESERVED + 55 - RESERVED + 56 - RESERVED + 57 - RESERVED + 58 - RESERVED + 59 - RESERVED + 60 - RESERVED + 61 - RESERVED + 62 - RESERVED + 63 - RESERVED +SRC_ALPHA_0_NO_READ 30 0x0 Enables source alpha zero performance optimization to + skip reads. + POSSIBLE VALUES: + 00 - Disable source alpha zero performance optimization to skip reads + 01 - Enable source alpha zero performance optimization to skip reads +SRC_ALPHA_1_NO_READ 31 0x0 Enables source alpha one performance optimization to + skip reads. + POSSIBLE VALUES: + 00 - Disable source alpha one performance optimization to skip reads + 01 - Enable source alpha one performance optimization to skip reads diff --git a/regs/rb3d_cctl.txt b/regs/rb3d_cctl.txt new file mode 100644 index 0000000..e8b9a52 --- /dev/null +++ b/regs/rb3d_cctl.txt @@ -0,0 +1,45 @@ +Field Name Bits Default Description +NUM_MULTIWRITES 6:5 0x0 A quad is replicated and written to this + many buffers. + POSSIBLE VALUES: + 00 - 1 buffer. This is the only mode where the cb processes the end of packet command. + 01 - 2 buffers + 02 - 3 buffers + 03 - 4 buffers +CLRCMP_FLIPE_ENABLE 7 0x0 Enables equivalent of rage128 + CMP_EQ_FLIP color compare mode. + This is used to ensure 3D data does not + get chromakeyed away by logic in the + backend. + POSSIBLE VALUES: + 00 - Disable color compare. + 01 - Enable color compare. +AA_COMPRESSION_ENABLE 9 none Enables AA color compression. Cmask + must also be enabled when aa + compression is enabled. The cache must + be empty before this is changed. + POSSIBLE VALUES: + 00 - Disable AA compression + 01 - Enable AA compression +CMASK_ENABLE 10 none Enables use of the cmask ram. The cache + must be empty before this is changed. + POSSIBLE VALUES: + 00 - Disable + 01 - Enable +INDEPENDENT_COLOR_CHANNEL_MASK_ENABLE 12 0x0 Enables indepedent color channel masks + for the MRTs. Disabling this feature will + cause all the MRTs to use color channel + mask 0. + POSSIBLE VALUES: + 00 - Disable + 01 - Enable +WRITE_COMPRESSION_DISABLE 13 none Disables write compression. + POSSIBLE VALUES: + 00 - Enable write compression + 01 - Disable write compression +INDEPENDENT_COLORFORMAT_ENABLE 14 0x0 Enables independent color format for the + MRTs. Disabling this feature will cause + all the MRTs to use color format 0. + POSSIBLE VALUES: + 00 - Disable + 01 - Enable diff --git a/regs/rb3d_clrcmp_clr.txt b/regs/rb3d_clrcmp_clr.txt new file mode 100644 index 0000000..0e7e90f --- /dev/null +++ b/regs/rb3d_clrcmp_clr.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +CLRCMP_CLR 31:0 none Like RB2D_CLRCMP_CLR, but a separate register is + provided to keep 2D and 3D state separate. diff --git a/regs/rb3d_clrcmp_flipe.txt b/regs/rb3d_clrcmp_flipe.txt new file mode 100644 index 0000000..7114a4a --- /dev/null +++ b/regs/rb3d_clrcmp_flipe.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +CLRCMP_FLIPE 31:0 none Like RB2D_CLRCMP_FLIPE, but a separate register is + provided to keep 2D and 3D state separate. diff --git a/regs/rb3d_clrcmp_msk.txt b/regs/rb3d_clrcmp_msk.txt new file mode 100644 index 0000000..07da412 --- /dev/null +++ b/regs/rb3d_clrcmp_msk.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +CLRCMP_MSK 31:0 none Like RB2D_CLRCMP_CLR, but separate registers + provided to keep 2D and 3D state separate. diff --git a/regs/rb3d_color_channel_mask.txt b/regs/rb3d_color_channel_mask.txt new file mode 100644 index 0000000..dac0cf2 --- /dev/null +++ b/regs/rb3d_color_channel_mask.txt @@ -0,0 +1,65 @@ +Field Name Bits Default Description +BLUE_MASK 0 0x1 mask bit for the blue channel + POSSIBLE VALUES: + 00 - disable + 01 - enable +GREEN_MASK 1 0x1 mask bit for the green channel + POSSIBLE VALUES: + 00 - disable + 01 - enable +RED_MASK 2 0x1 mask bit for the red channel + POSSIBLE VALUES: + 00 - disable + 01 - enable +ALPHA_MASK 3 0x1 mask bit for the alpha channel + POSSIBLE VALUES: + 00 - disable + 01 - enable +BLUE_MASK1 4 0x1 mask bit for the blue channel of MRT 1 + POSSIBLE VALUES: + 00 - disable + 01 - enable +GREEN_MASK1 5 0x1 mask bit for the green channel of MRT 1 + POSSIBLE VALUES: + 00 - disable + 01 - enable +RED_MASK1 6 0x1 mask bit for the red channel of MRT 1 + POSSIBLE VALUES: + 00 - disable + 01 - enable +ALPHA_MASK1 7 0x1 mask bit for the alpha channel of MRT 1 + POSSIBLE VALUES: + 00 - disable + 01 - enable +BLUE_MASK2 8 0x1 mask bit for the blue channel of MRT 2 + POSSIBLE VALUES: + 00 - disable + 01 - enable +GREEN_MASK2 9 0x1 mask bit for the green channel of MRT 2 + POSSIBLE VALUES: + 00 - disable + 01 - enable +RED_MASK2 10 0x1 mask bit for the red channel of MRT 2 + POSSIBLE VALUES: + 00 - disable + 01 - enable +ALPHA_MASK2 11 0x1 mask bit for the alpha channel of MRT 2 + POSSIBLE VALUES: + 00 - disable + 01 - enable +BLUE_MASK3 12 0x1 mask bit for the blue channel of MRT 3 + POSSIBLE VALUES: + 00 - disable + 01 - enable +GREEN_MASK3 13 0x1 mask bit for the green channel of MRT 3 + POSSIBLE VALUES: + 00 - disable + 01 - enable +RED_MASK3 14 0x1 mask bit for the red channel of MRT 3 + POSSIBLE VALUES: + 00 - disable + 01 - enable +ALPHA_MASK3 15 0x1 mask bit for the alpha channel of MRT 3 + POSSIBLE VALUES: + 00 - disable + 01 - enable diff --git a/regs/rb3d_color_clear_value.txt b/regs/rb3d_color_clear_value.txt new file mode 100644 index 0000000..ac96c1e --- /dev/null +++ b/regs/rb3d_color_clear_value.txt @@ -0,0 +1,5 @@ +Field Name Bits Default Description +BLUE 7:0 none blue clear color +GREEN 15:8 none green clear color +RED 23:16 none red clear color +ALPHA 31:24 none alpha clear color diff --git a/regs/rb3d_color_clear_value_ar.txt b/regs/rb3d_color_clear_value_ar.txt new file mode 100644 index 0000000..fa5350a --- /dev/null +++ b/regs/rb3d_color_clear_value_ar.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +RED 15:0 none red clear color +ALPHA 31:16 none alpha clear color diff --git a/regs/rb3d_color_clear_value_gb.txt b/regs/rb3d_color_clear_value_gb.txt new file mode 100644 index 0000000..9045a35 --- /dev/null +++ b/regs/rb3d_color_clear_value_gb.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +BLUE 15:0 none blue clear color +GREEN 31:16 none green clear color diff --git a/regs/rb3d_coloroffset.txt b/regs/rb3d_coloroffset.txt new file mode 100644 index 0000000..4f00740 --- /dev/null +++ b/regs/rb3d_coloroffset.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +COLOROFFSET 31:5 none 256-bit aligned 3D destination offset address. The cache + must be empty before this is changed. diff --git a/regs/rb3d_colorpitch.txt b/regs/rb3d_colorpitch.txt new file mode 100644 index 0000000..467f626 --- /dev/null +++ b/regs/rb3d_colorpitch.txt @@ -0,0 +1,38 @@ +Field Name Bits Default Description +COLORPITCH 13:1 none 3D destination pitch in multiples of 2-pixels. +COLORTILE 16 none Denotes whether the 3D destination is in macrotiled + format. + POSSIBLE VALUES: + 00 - 3D destination is not macrotiled + 01 - 3D destination is macrotiled +COLORMICROTILE 18:17 none Denotes whether the 3D destination is in microtiled + format. + POSSIBLE VALUES: + 00 - 3D destination is no microtiled + 01 - 3D destination is microtiled + 02 - 3D destination is square microtiled. Only available in 16-bit + 03 - (reserved) +COLORENDIAN 20:19 none Specifies endian control for the color buffer. + POSSIBLE VALUES: + 00 - No swap + 01 - Word swap (2 bytes in 16-bit) + 02 - Dword swap (4 bytes in a 32-bit) + 03 - Half-Dword swap (2 16-bit in a 32-bit) +COLORFORMAT 24:21 0x6 3D destination color format. + POSSIBLE VALUES: + 00 - ARGB10101010 + 01 - UV1010 + 02 - CI8 (2D ONLY) + 03 - ARGB1555 + 04 - RGB565 + 05 - ARGB2101010 + 06 - ARGB8888 + 07 - ARGB32323232 + 08 - (Reserved) + 09 - I8 + 10 - ARGB16161616 + 11 - YUV422 packed (VYUY) + 12 - YUV422 packed (YVYU) + 13 - UV88 + 14 - I10 + 15 - ARGB4444 diff --git a/regs/rb3d_constant_color.txt b/regs/rb3d_constant_color.txt new file mode 100644 index 0000000..6a509fd --- /dev/null +++ b/regs/rb3d_constant_color.txt @@ -0,0 +1,9 @@ +Field Name Bits Default Description +BLUE 7:0 none blue constant color (For R520, this field is ignored, use + RB3D_CONSTANT_COLOR_GB__BLUE instead) +GREEN 15:8 none green constant color (For R520, this field is ignored, use + RB3D_CONSTANT_COLOR_GB__GREEN instead) +RED 23:16 none red constant color (For R520, this field is ignored, use + RB3D_CONSTANT_COLOR_AR__RED instead) +ALPHA 31:24 none alpha constant color (For R520, this field is ignored, use + RB3D_CONSTANT_COLOR_AR__ALPHA instead) diff --git a/regs/rb3d_constant_color_ar.txt b/regs/rb3d_constant_color_ar.txt new file mode 100644 index 0000000..79f283f --- /dev/null +++ b/regs/rb3d_constant_color_ar.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +RED 15:0 none red constant color in 0.10 fixed or FP16 format +ALPHA 31:16 none alpha constant color in 0.10 fixed or FP16 format diff --git a/regs/rb3d_constant_color_gb.txt b/regs/rb3d_constant_color_gb.txt new file mode 100644 index 0000000..d613d37 --- /dev/null +++ b/regs/rb3d_constant_color_gb.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +BLUE 15:0 none blue constant color in 0.10 fixed or FP16 format +GREEN 31:16 none green constant color in 0.10 fixed or FP16 format diff --git a/regs/rb3d_discard_src_pixel_gte_threshold.txt b/regs/rb3d_discard_src_pixel_gte_threshold.txt new file mode 100644 index 0000000..b6e0c5b --- /dev/null +++ b/regs/rb3d_discard_src_pixel_gte_threshold.txt @@ -0,0 +1,5 @@ +Field Name Bits Default Description +BLUE 7:0 0xFF Blue +GREEN 15:8 0xFF Green +RED 23:16 0xFF Red +ALPHA 31:24 0xFF Alpha diff --git a/regs/rb3d_discard_src_pixel_lte_threshold.txt b/regs/rb3d_discard_src_pixel_lte_threshold.txt new file mode 100644 index 0000000..b6e0c5b --- /dev/null +++ b/regs/rb3d_discard_src_pixel_lte_threshold.txt @@ -0,0 +1,5 @@ +Field Name Bits Default Description +BLUE 7:0 0xFF Blue +GREEN 15:8 0xFF Green +RED 23:16 0xFF Red +ALPHA 31:24 0xFF Alpha diff --git a/regs/rb3d_dither_ctl.txt b/regs/rb3d_dither_ctl.txt new file mode 100644 index 0000000..6e74be2 --- /dev/null +++ b/regs/rb3d_dither_ctl.txt @@ -0,0 +1,12 @@ +Field Name Bits Default Description +DITHER_MODE 1:0 0x0 Dither mode + POSSIBLE VALUES: + 00 - Truncate + 01 - Round + 02 - LUT dither + 03 - (reserved) +ALPHA_DITHER_MODE 3:2 0x0 POSSIBLE VALUES: + 00 - Truncate + 01 - Round + 02 - LUT dither + 03 - (reserved) diff --git a/regs/rb3d_dstcache_ctlstat.txt b/regs/rb3d_dstcache_ctlstat.txt new file mode 100644 index 0000000..08a0405 --- /dev/null +++ b/regs/rb3d_dstcache_ctlstat.txt @@ -0,0 +1,22 @@ +Field Name Bits Default Description +DC_FLUSH 1:0 0x0 Setting this bit flushes dirty data from the 3D Dst Cache. + Unless the DC_FREE bits are also set, the tags in the + cache remain valid. A purge is achieved by setting both + DC_FLUSH and DC_FREE. + POSSIBLE VALUES: + 00 - No effect + 01 - No effect + 02 - Flushes dirty 3D data + 03 - Flushes dirty 3D data +DC_FREE 3:2 0x0 Setting this bit invalidates the 3D Dst Cache tags. Unless + the DC_FLUSH bit is also set, the cache lines are not + written to memory. A purge is achieved by setting both + DC_FLUSH and DC_FREE. + POSSIBLE VALUES: + 00 - No effect + 01 - No effect + 02 - Free 3D tags + 03 - Free 3D tags +DC_FINISH 4 0x0 POSSIBLE VALUES: + 00 - do not send a finish signal to the CP + 01 - send a finish signal to the CP after the end of operation diff --git a/regs/rb3d_fifo_size.txt b/regs/rb3d_fifo_size.txt new file mode 100644 index 0000000..49aaac2 --- /dev/null +++ b/regs/rb3d_fifo_size.txt @@ -0,0 +1,7 @@ +Field Name Bits Default Description +OP_FIFO_SIZE 1:0 0x0 Determines the size of the op fifo + POSSIBLE VALUES: + 00 - Full size + 01 - 1/2 size + 02 - 1/4 size + 03 - 1/8 size diff --git a/regs/rb3d_ropcntl.txt b/regs/rb3d_ropcntl.txt new file mode 100644 index 0000000..74e4144 --- /dev/null +++ b/regs/rb3d_ropcntl.txt @@ -0,0 +1,7 @@ +Field Name Bits Default Description +ROP_ENABLE 2 0x0 POSSIBLE VALUES: + 00 - Disable ROP. (Forces ROP2 to be 0xC). + 01 - Enabled +ROP 11:8 none ROP2 code for 3D fragments. This value is replicated + into 2 nibbles to form the equivalent ROP3 code to + control the ROP3 logic. These are the GDI ROP2 codes. diff --git a/regs/rs_count.txt b/regs/rs_count.txt new file mode 100644 index 0000000..63cb703 --- /dev/null +++ b/regs/rs_count.txt @@ -0,0 +1,9 @@ +Field Name Bits Default Description +IT_COUNT 6:0 0x0 Specifies the total number of texture address components + contained in the rasterizer input packet (0:32). +IC_COUNT 10:7 0x0 Specifies the total number of colors contained in the + rasterizer input packet (0:4). +W_ADDR 17:12 0x0 Specifies the relative rasterizer input packet location of w + (if w_count==1) +HIRES_EN 18 0x0 Enable high resolution texture coordinate output when q + is equal to 1 diff --git a/regs/rs_inst.txt b/regs/rs_inst.txt new file mode 100644 index 0000000..1cfa208 --- /dev/null +++ b/regs/rs_inst.txt @@ -0,0 +1,30 @@ +Field Name Bits Default Description +TEX_ID 3:0 0x0 Specifies the index (into the RS_IP table) of the texture + address output during this rasterizer instruction +TEX_CN 4 0x0 Write enable for texture address + POSSIBLE VALUES: + 00 - No write - texture coordinate not valid + 01 - write - texture valid +TEX_ADDR 11:5 0x0 Specifies the destination address (within the current pixel + stack frame) of the texture address output during this + rasterizer instruction +COL_ID 15:12 0x0 Specifies the index (into the RS_IP table) of the color + output during this rasterizer instruction +COL_CN 17:16 0x0 Write enable for color + POSSIBLE VALUES: + 00 - No write - color not valid + 01 - write - color valid + 02 - write fbuffer - XY00->RGBA + 03 - write backface - B000->RGBA +COL_ADDR 24:18 0x0 Specifies the destination address (within the current pixel + stack frame) of the color output during this rasterizer + instruction +TEX_ADJ 25 0x0 Specifies whether to sample texture coordinates at the + real or adjusted pixel centers + POSSIBLE VALUES: + 00 - Sample texture coordinates at real pixel centers + 01 - Sample texture coordinates at adjusted pixel centers +W_CN 26 0x0 Specifies that the rasterizer should output w + POSSIBLE VALUES: + 00 - No write - w not valid + 01 - write - w valid diff --git a/regs/rs_inst_count.txt b/regs/rs_inst_count.txt new file mode 100644 index 0000000..30f6887 --- /dev/null +++ b/regs/rs_inst_count.txt @@ -0,0 +1,4 @@ +Field Name Bits Default Description +INST_COUNT 3:0 0x0 Number of rasterizer instructions (1:16) +TX_OFFSET 7:5 0x0 Indicates range of texture offset to minimize peroidic + errors on texels sampled right on their edges diff --git a/regs/rs_ip.txt b/regs/rs_ip.txt new file mode 100644 index 0000000..9d5f377 --- /dev/null +++ b/regs/rs_ip.txt @@ -0,0 +1,34 @@ +Field Name Bits Default Description +TEX_PTR_S 5:0 0x0 Specifies the relative rasterizer input packet location of + each component (S, T, R, and Q) of texture address (i[i]). + The values 62 and 63 select constant inputs for the + component: 62 selects K0 (0.0), and 63 selects K1 (1.0). +TEX_PTR_T 11:6 0x0 Specifies the relative rasterizer input packet location of + each component (S, T, R, and Q) of texture address (i[i]). + The values 62 and 63 select constant inputs for the + component: 62 selects K0 (0.0), and 63 selects K1 (1.0). +TEX_PTR_R 17:12 0x0 Specifies the relative rasterizer input packet location of + each component (S, T, R, and Q) of texture address (i[i]). + The values 62 and 63 select constant inputs for the + component: 62 selects K0 (0.0), and 63 selects K1 (1.0). +TEX_PTR_Q 23:18 0x0 Specifies the relative rasterizer input packet location of + each component (S, T, R, and Q) of texture address (i[i]). + The values 62 and 63 select constant inputs for the + component: 62 selects K0 (0.0), and 63 selects K1 (1.0). +COL_PTR 26:24 0x0 Specifies the relative rasterizer input packet location of + the color (c[i]). +COL_FMT 30:27 0x0 Specifies the format of the color (c[i]). + POSSIBLE VALUES: + 00 - Four components (R,G,B,A) + 01 - Three components (R,G,B,0) + 02 - Three components (R,G,B,1) + 04 - One component (0,0,0,A) + 05 - Zero components (0,0,0,0) + 06 - Zero components (0,0,0,1) + 08 - One component (1,1,1,A) + 09 - Zero components (1,1,1,0) + 10 - Zero components (1,1,1,1) +OFFSET_EN 31 0x0 Enable application of the TX_OFFSET in RS_INST_COUNT + POSSIBLE VALUES: + 00 - Do not apply the TX_OFFSET in RS_INST_COUNT + 01 - Apply the TX_OFFSET specified by RS_INST_COUNT diff --git a/regs/sc_clip_0_a.txt b/regs/sc_clip_0_a.txt new file mode 100644 index 0000000..5259b33 --- /dev/null +++ b/regs/sc_clip_0_a.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +XS0 12:0 0x0 Left hand edge of clip rectangle +YS0 25:13 0x0 Upper edge of clip rectangle diff --git a/regs/sc_clip_0_b.txt b/regs/sc_clip_0_b.txt new file mode 100644 index 0000000..cb4babb --- /dev/null +++ b/regs/sc_clip_0_b.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +XS1 12:0 0x0 Right hand edge of clip rectangle +YS1 25:13 0x0 Lower edge of clip rectangle diff --git a/regs/sc_clip_1_a.txt b/regs/sc_clip_1_a.txt new file mode 100644 index 0000000..5259b33 --- /dev/null +++ b/regs/sc_clip_1_a.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +XS0 12:0 0x0 Left hand edge of clip rectangle +YS0 25:13 0x0 Upper edge of clip rectangle diff --git a/regs/sc_clip_1_b.txt b/regs/sc_clip_1_b.txt new file mode 100644 index 0000000..cb4babb --- /dev/null +++ b/regs/sc_clip_1_b.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +XS1 12:0 0x0 Right hand edge of clip rectangle +YS1 25:13 0x0 Lower edge of clip rectangle diff --git a/regs/sc_clip_2_a.txt b/regs/sc_clip_2_a.txt new file mode 100644 index 0000000..5259b33 --- /dev/null +++ b/regs/sc_clip_2_a.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +XS0 12:0 0x0 Left hand edge of clip rectangle +YS0 25:13 0x0 Upper edge of clip rectangle diff --git a/regs/sc_clip_2_b.txt b/regs/sc_clip_2_b.txt new file mode 100644 index 0000000..cb4babb --- /dev/null +++ b/regs/sc_clip_2_b.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +XS1 12:0 0x0 Right hand edge of clip rectangle +YS1 25:13 0x0 Lower edge of clip rectangle diff --git a/regs/sc_clip_3_a.txt b/regs/sc_clip_3_a.txt new file mode 100644 index 0000000..5259b33 --- /dev/null +++ b/regs/sc_clip_3_a.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +XS0 12:0 0x0 Left hand edge of clip rectangle +YS0 25:13 0x0 Upper edge of clip rectangle diff --git a/regs/sc_clip_3_b.txt b/regs/sc_clip_3_b.txt new file mode 100644 index 0000000..cb4babb --- /dev/null +++ b/regs/sc_clip_3_b.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +XS1 12:0 0x0 Right hand edge of clip rectangle +YS1 25:13 0x0 Lower edge of clip rectangle diff --git a/regs/sc_clip_rule.txt b/regs/sc_clip_rule.txt new file mode 100644 index 0000000..5f141b8 --- /dev/null +++ b/regs/sc_clip_rule.txt @@ -0,0 +1,5 @@ +Field Name Bits Default Description +CLIP_RULE 15:0 0x0 OpenGL Clip boolean function. The `inside` flags for + each of the four clip rectangles form a 4-bit binary + number. The corresponding bit in this 16-bit number + specifies whether the pixel is visible. diff --git a/regs/sc_edgerule.txt b/regs/sc_edgerule.txt new file mode 100644 index 0000000..3d268d4 --- /dev/null +++ b/regs/sc_edgerule.txt @@ -0,0 +1,265 @@ +Field Name Bits Default Description +ER_TRI 4:0 0x0 Edge rules for triangles, points, left-right lines, right-left + lines, upper-bottom lines, bottom-upper lines. For values + 0 to 15, bit 0 specifies whether a sample on a horizontal- + bottom edge is in, bit 1 specifies whether a sample on a + horizontal-top edge is in, bit 2 species whether a sample + on a right edge is in, bit 3 specifies whether a sample on + a left edge is in. For values 16 to 31, bit 0 specifies + whether a sample on a vertical-right edge is in, bit 1 + specifies whether a sample on a vertical-left edge is in, + bit 2 species whether a sample on a bottom edge is in, bit + 3 specifies whether a sample on a top edge is in + POSSIBLE VALUES: + 00 - L-in,R-in,HT-in,HB-in + 01 - L-in,R-in,HT-in,HB-out + 02 - L-in,R-in,HT-out,HB-in + 03 - L-in,R-in,HT-out,HB-out + 04 - L-in,R-out,HT-in,HB-in + 05 - L-in,R-out,HT-in,HB-out + 06 - L-in,R-out,HT-out,HB-in + 07 - L-in,R-out,HT-out,HB-out + 08 - L-out,R-in,HT-in,HB-in + 09 - L-out,R-in,HT-in,HB-out + 10 - L-out,R-in,HT-out,HB-in + 11 - L-out,R-in,HT-out,HB-out + 12 - L-out,R-out,HT-in,HB-in + 13 - L-out,R-out,HT-in,HB-out + 14 - L-out,R-out,HT-out,HB-in + 15 - L-out,R-out,HT-out,HB-out + 16 - T-in,B-in,VL-in,VR-in + 17 - T-in,B-in,VL-in,VR-out + 18 - T-in,B-in,VL,VR-in + 19 - T-in,B-in,VL-out,VR-out + 20 - T-out,B-in,VL-in,VR-in + 21 - T-out,B-in,VL-in,VR-out + 22 - T-out,B-in,VL-out,VR-in + 23 - T-out,B-in,VL-out,VR-out + 24 - T-in,B-out,VL-in,VR-in + 25 - T-in,B-out,VL-in,VR-out + 26 - T-in,B-out,VL-out,VR-in + 27 - T-in,B-out,VL-out,VR-out + 28 - T-out,B-out,VL-in,VR-in + 29 - T-out,B-out,VL-in,VR-out + 30 - T-out,B-out,VL-out,VR-in + 31 - T-out,B-out,VL-out,VR-out +ER_POINT 9:5 0x0 Edge rules for triangles, points, left-right lines, right-left + lines, upper-bottom lines, bottom-upper lines. For values + 0 to 15, bit 0 specifies whether a sample on a horizontal- + bottom edge is in, bit 1 specifies whether a sample on a + horizontal-top edge is in, bit 2 species whether a sample + on a right edge is in, bit 3 specifies whether a sample on + a left edge is in. For values 16 to 31, bit 0 specifies + whether a sample on a vertical-right edge is in, bit 1 + specifies whether a sample on a vertical-left edge is in, + bit 2 species whether a sample on a bottom edge is in, bit + 3 specifies whether a sample on a top edge is in + POSSIBLE VALUES: + 00 - L-in,R-in,HT-in,HB-in + 01 - L-in,R-in,HT-in,HB-out + 02 - L-in,R-in,HT-out,HB-in + 03 - L-in,R-in,HT-out,HB-out + 04 - L-in,R-out,HT-in,HB-in + 05 - L-in,R-out,HT-in,HB-out + 06 - L-in,R-out,HT-out,HB-in + 07 - L-in,R-out,HT-out,HB-out + 08 - L-out,R-in,HT-in,HB-in + 09 - L-out,R-in,HT-in,HB-out + 10 - L-out,R-in,HT-out,HB-in + 11 - L-out,R-in,HT-out,HB-out + 12 - L-out,R-out,HT-in,HB-in + 13 - L-out,R-out,HT-in,HB-out + 14 - L-out,R-out,HT-out,HB-in + 15 - L-out,R-out,HT-out,HB-out + 16 - T-in,B-in,VL-in,VR-in + 17 - T-in,B-in,VL-in,VR-out + 18 - T-in,B-in,VL,VR-in + 19 - T-in,B-in,VL-out,VR-out + 20 - T-out,B-in,VL-in,VR-in + 21 - T-out,B-in,VL-in,VR-out + 22 - T-out,B-in,VL-out,VR-in + 23 - T-out,B-in,VL-out,VR-out + 24 - T-in,B-out,VL-in,VR-in + 25 - T-in,B-out,VL-in,VR-out + 26 - T-in,B-out,VL-out,VR-in + 27 - T-in,B-out,VL-out,VR-out + 28 - T-out,B-out,VL-in,VR-in + 29 - T-out,B-out,VL-in,VR-out + 30 - T-out,B-out,VL-out,VR-in + 31 - T-out,B-out,VL-out,VR-out +ER_LINE_LR 14:10 0x0 Edge rules for triangles, points, left-right lines, right-left + lines, upper-bottom lines, bottom-upper lines. For values + 0 to 15, bit 0 specifies whether a sample on a horizontal- + bottom edge is in, bit 1 specifies whether a sample on a + horizontal-top edge is in, bit 2 species whether a sample + on a right edge is in, bit 3 specifies whether a sample on + a left edge is in. For values 16 to 31, bit 0 specifies + whether a sample on a vertical-right edge is in, bit 1 + specifies whether a sample on a vertical-left edge is in, + bit 2 species whether a sample on a bottom edge is in, bit + 3 specifies whether a sample on a top edge is in + POSSIBLE VALUES: + 00 - L-in,R-in,HT-in,HB-in + 01 - L-in,R-in,HT-in,HB-out + 02 - L-in,R-in,HT-out,HB-in + 03 - L-in,R-in,HT-out,HB-out + 04 - L-in,R-out,HT-in,HB-in + 05 - L-in,R-out,HT-in,HB-out + 06 - L-in,R-out,HT-out,HB-in + 07 - L-in,R-out,HT-out,HB-out + 08 - L-out,R-in,HT-in,HB-in + 09 - L-out,R-in,HT-in,HB-out + 10 - L-out,R-in,HT-out,HB-in + 11 - L-out,R-in,HT-out,HB-out + 12 - L-out,R-out,HT-in,HB-in + 13 - L-out,R-out,HT-in,HB-out + 14 - L-out,R-out,HT-out,HB-in + 15 - L-out,R-out,HT-out,HB-out + 16 - T-in,B-in,VL-in,VR-in + 17 - T-in,B-in,VL-in,VR-out + 18 - T-in,B-in,VL,VR-in + 19 - T-in,B-in,VL-out,VR-out + 20 - T-out,B-in,VL-in,VR-in + 21 - T-out,B-in,VL-in,VR-out + 22 - T-out,B-in,VL-out,VR-in + 23 - T-out,B-in,VL-out,VR-out + 24 - T-in,B-out,VL-in,VR-in + 25 - T-in,B-out,VL-in,VR-out + 26 - T-in,B-out,VL-out,VR-in + 27 - T-in,B-out,VL-out,VR-out + 28 - T-out,B-out,VL-in,VR-in + 29 - T-out,B-out,VL-in,VR-out + 30 - T-out,B-out,VL-out,VR-in + 31 - T-out,B-out,VL-out,VR-out +ER_LINE_RL 19:15 0x0 Edge rules for triangles, points, left-right lines, right-left + lines, upper-bottom lines, bottom-upper lines. For values + 0 to 15, bit 0 specifies whether a sample on a horizontal- + bottom edge is in, bit 1 specifies whether a sample on a + horizontal-top edge is in, bit 2 species whether a sample + on a right edge is in, bit 3 specifies whether a sample on + a left edge is in. For values 16 to 31, bit 0 specifies + whether a sample on a vertical-right edge is in, bit 1 + specifies whether a sample on a vertical-left edge is in, + bit 2 species whether a sample on a bottom edge is in, bit + 3 specifies whether a sample on a top edge is in + POSSIBLE VALUES: + 00 - L-in,R-in,HT-in,HB-in + 01 - L-in,R-in,HT-in,HB-out + 02 - L-in,R-in,HT-out,HB-in + 03 - L-in,R-in,HT-out,HB-out + 04 - L-in,R-out,HT-in,HB-in + 05 - L-in,R-out,HT-in,HB-out + 06 - L-in,R-out,HT-out,HB-in + 07 - L-in,R-out,HT-out,HB-out + 08 - L-out,R-in,HT-in,HB-in + 09 - L-out,R-in,HT-in,HB-out + 10 - L-out,R-in,HT-out,HB-in + 11 - L-out,R-in,HT-out,HB-out + 12 - L-out,R-out,HT-in,HB-in + 13 - L-out,R-out,HT-in,HB-out + 14 - L-out,R-out,HT-out,HB-in + 15 - L-out,R-out,HT-out,HB-out + 16 - T-in,B-in,VL-in,VR-in + 17 - T-in,B-in,VL-in,VR-out + 18 - T-in,B-in,VL,VR-in + 19 - T-in,B-in,VL-out,VR-out + 20 - T-out,B-in,VL-in,VR-in + 21 - T-out,B-in,VL-in,VR-out + 22 - T-out,B-in,VL-out,VR-in + 23 - T-out,B-in,VL-out,VR-out + 24 - T-in,B-out,VL-in,VR-in + 25 - T-in,B-out,VL-in,VR-out + 26 - T-in,B-out,VL-out,VR-in + 27 - T-in,B-out,VL-out,VR-out + 28 - T-out,B-out,VL-in,VR-in + 29 - T-out,B-out,VL-in,VR-out + 30 - T-out,B-out,VL-out,VR-in + 31 - T-out,B-out,VL-out,VR-out +ER_LINE_TB 24:20 0x0 Edge rules for triangles, points, left-right lines, right-left + lines, upper-bottom lines, bottom-upper lines. For values + 0 to 15, bit 0 specifies whether a sample on a horizontal- + bottom edge is in, bit 1 specifies whether a sample on a + horizontal-top edge is in, bit 2 species whether a sample + on a right edge is in, bit 3 specifies whether a sample on + a left edge is in. For values 16 to 31, bit 0 specifies + whether a sample on a vertical-right edge is in, bit 1 + specifies whether a sample on a vertical-left edge is in, + bit 2 species whether a sample on a bottom edge is in, bit + 3 specifies whether a sample on a top edge is in + POSSIBLE VALUES: + 00 - L-in,R-in,HT-in,HB-in + 01 - L-in,R-in,HT-in,HB-out + 02 - L-in,R-in,HT-out,HB-in + 03 - L-in,R-in,HT-out,HB-out + 04 - L-in,R-out,HT-in,HB-in + 05 - L-in,R-out,HT-in,HB-out + 06 - L-in,R-out,HT-out,HB-in + 07 - L-in,R-out,HT-out,HB-out + 08 - L-out,R-in,HT-in,HB-in + 09 - L-out,R-in,HT-in,HB-out + 10 - L-out,R-in,HT-out,HB-in + 11 - L-out,R-in,HT-out,HB-out + 12 - L-out,R-out,HT-in,HB-in + 13 - L-out,R-out,HT-in,HB-out + 14 - L-out,R-out,HT-out,HB-in + 15 - L-out,R-out,HT-out,HB-out + 16 - T-in,B-in,VL-in,VR-in + 17 - T-in,B-in,VL-in,VR-out + 18 - T-in,B-in,VL,VR-in + 19 - T-in,B-in,VL-out,VR-out + 20 - T-out,B-in,VL-in,VR-in + 21 - T-out,B-in,VL-in,VR-out + 22 - T-out,B-in,VL-out,VR-in + 23 - T-out,B-in,VL-out,VR-out + 24 - T-in,B-out,VL-in,VR-in + 25 - T-in,B-out,VL-in,VR-out + 26 - T-in,B-out,VL-out,VR-in + 27 - T-in,B-out,VL-out,VR-out + 28 - T-out,B-out,VL-in,VR-in + 29 - T-out,B-out,VL-in,VR-out + 30 - T-out,B-out,VL-out,VR-in + 31 - T-out,B-out,VL-out,VR-out +ER_LINE_BT 29:25 0x0 Edge rules for triangles, points, left-right lines, right-left + lines, upper-bottom lines, bottom-upper lines. For values + 0 to 15, bit 0 specifies whether a sample on a horizontal- + bottom edge is in, bit 1 specifies whether a sample on a + horizontal-top edge is in, bit 2 species whether a sample + on a right edge is in, bit 3 specifies whether a sample on + a left edge is in. For values 16 to 31, bit 0 specifies + whether a sample on a vertical-right edge is in, bit 1 + specifies whether a sample on a vertical-left edge is in, + bit 2 species whether a sample on a bottom edge is in, bit + 3 specifies whether a sample on a top edge is in + POSSIBLE VALUES: + 00 - L-in,R-in,HT-in,HB-in + 01 - L-in,R-in,HT-in,HB-out + 02 - L-in,R-in,HT-out,HB-in + 03 - L-in,R-in,HT-out,HB-out + 04 - L-in,R-out,HT-in,HB-in + 05 - L-in,R-out,HT-in,HB-out + 06 - L-in,R-out,HT-out,HB-in + 07 - L-in,R-out,HT-out,HB-out + 08 - L-out,R-in,HT-in,HB-in + 09 - L-out,R-in,HT-in,HB-out + 10 - L-out,R-in,HT-out,HB-in + 11 - L-out,R-in,HT-out,HB-out + 12 - L-out,R-out,HT-in,HB-in + 13 - L-out,R-out,HT-in,HB-out + 14 - L-out,R-out,HT-out,HB-in + 15 - L-out,R-out,HT-out,HB-out + 16 - T-in,B-in,VL-in,VR-in + 17 - T-in,B-in,VL-in,VR-out + 18 - T-in,B-in,VL,VR-in + 19 - T-in,B-in,VL-out,VR-out + 20 - T-out,B-in,VL-in,VR-in + 21 - T-out,B-in,VL-in,VR-out + 22 - T-out,B-in,VL-out,VR-in + 23 - T-out,B-in,VL-out,VR-out + 24 - T-in,B-out,VL-in,VR-in + 25 - T-in,B-out,VL-in,VR-out + 26 - T-in,B-out,VL-out,VR-in + 27 - T-in,B-out,VL-out,VR-out + 28 - T-out,B-out,VL-in,VR-in + 29 - T-out,B-out,VL-in,VR-out + 30 - T-out,B-out,VL-out,VR-in + 31 - T-out,B-out,VL-out,VR-out diff --git a/regs/sc_hyperz_en.txt b/regs/sc_hyperz_en.txt new file mode 100644 index 0000000..61012c8 --- /dev/null +++ b/regs/sc_hyperz_en.txt @@ -0,0 +1,28 @@ +Field Name Bits Default Description +HZ_EN 0 0x0 Enable for hierarchical Z. + POSSIBLE VALUES: + 00 - Disables Hyper-Z. + 01 - Enables Hyper-Z. +HZ_MAX 1 0x0 Specifies whether to compute min or max z value + POSSIBLE VALUES: + 00 - HZ block computes minimum z value + 01 - HZ block computes maximum z value +HZ_ADJ 4:2 0x0 Specifies adjustment to get added or subtracted from + computed z value + POSSIBLE VALUES: + 00 - Add or Subtract 1/256 << ze + 01 - Add or Subtract 1/128 << ze + 02 - Add or Subtract 1/64 << ze + 03 - Add or Subtract 1/32 << ze + 04 - Add or Subtract 1/16 << ze + 05 - Add or Subtract 1/8 << ze + 06 - Add or Subtract 1/4 << ze + 07 - Add or Subtract 1/2 << ze +HZ_Z0MIN 5 0x0 Specifies whether vertex 0 z contains minimum z value + POSSIBLE VALUES: + 00 - Vertex 0 does not contain minimum z value + 01 - Vertex 0 does contain minimum z value +HZ_Z0MAX 6 0x0 Specifies whether vertex 0 z contains maximum z value + POSSIBLE VALUES: + 00 - Vertex 0 does not contain maximum z value + 01 - Vertex 0 does contain maximum z value diff --git a/regs/sc_scissor0.txt b/regs/sc_scissor0.txt new file mode 100644 index 0000000..7690450 --- /dev/null +++ b/regs/sc_scissor0.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +XS0 12:0 0x0 Left hand edge of scissor rectangle +YS0 25:13 0x0 Upper edge of scissor rectangle diff --git a/regs/sc_scissor1.txt b/regs/sc_scissor1.txt new file mode 100644 index 0000000..b93fb57 --- /dev/null +++ b/regs/sc_scissor1.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +XS1 12:0 0x0 Right hand edge of scissor rectangle +YS1 25:13 0x0 Lower edge of scissor rectangle diff --git a/regs/sc_screendoor.txt b/regs/sc_screendoor.txt new file mode 100644 index 0000000..e89bd3d --- /dev/null +++ b/regs/sc_screendoor.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +SCREENDOOR 23:0 0x0 Screen door sample mask - 1 means sample may be + covered, 0 means sample is not covered diff --git a/regs/su_cull_mode.txt b/regs/su_cull_mode.txt new file mode 100644 index 0000000..9a6ffc5 --- /dev/null +++ b/regs/su_cull_mode.txt @@ -0,0 +1,14 @@ +Field Name Bits Default Description +CULL_FRONT 0 0x0 Enable for front-face culling. + POSSIBLE VALUES: + 00 - Do not cull front-facing triangles. + 01 - Cull front-facing triangles. +CULL_BACK 1 0x0 Enable for back-face culling. + POSSIBLE VALUES: + 00 - Do not cull back-facing triangles. + 01 - Cull back-facing triangles. +FACE 2 0x0 X-Ored with cross product sign to determine positive + facing + POSSIBLE VALUES: + 00 - Positive cross product is front (CCW). + 01 - Negative cross product is front (CW). diff --git a/regs/su_depth_offset.txt b/regs/su_depth_offset.txt new file mode 100644 index 0000000..bfc4656 --- /dev/null +++ b/regs/su_depth_offset.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +OFFSET 31:0 0x0 SPFP Floating point applied to depth before conversion + to FXP. diff --git a/regs/su_depth_scale.txt b/regs/su_depth_scale.txt new file mode 100644 index 0000000..86b5170 --- /dev/null +++ b/regs/su_depth_scale.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +SCALE 31:0 0x3F800000 SPFP Floating point applied to depth before conversion + to FXP. diff --git a/regs/su_poly_offset_back_offset.txt b/regs/su_poly_offset_back_offset.txt new file mode 100644 index 0000000..0a7ea68 --- /dev/null +++ b/regs/su_poly_offset_back_offset.txt @@ -0,0 +1,4 @@ +Field Name Bits Default Description +OFFSET 31:0 0x0 Specifies polygon offset offset for back-facing polygons; + 32b IEEE float format; applied after Z scale & offset (0 + to 2^24-1 range) diff --git a/regs/su_poly_offset_back_scale.txt b/regs/su_poly_offset_back_scale.txt new file mode 100644 index 0000000..442c010 --- /dev/null +++ b/regs/su_poly_offset_back_scale.txt @@ -0,0 +1,5 @@ +Field Name Bits Default Description +SCALE 31:0 0x0 Specifies polygon offset scale for back-facing polygons; + 32-bit IEEE float format; applied after Z scale & offset + (0 to 2^24-1 range); slope computed in subpixels (1/12 or + 1/16) diff --git a/regs/su_poly_offset_enable.txt b/regs/su_poly_offset_enable.txt new file mode 100644 index 0000000..0a5b1b5 --- /dev/null +++ b/regs/su_poly_offset_enable.txt @@ -0,0 +1,15 @@ +Field Name Bits Default Description +FRONT_ENABLE 0 0x0 Enables front facing polygon`s offset. + POSSIBLE VALUES: + 00 - Disable front offset. + 01 - Enable front offset. +BACK_ENABLE 1 0x0 Enables back facing polygon`s offset. + POSSIBLE VALUES: + 00 - Disable back offset. + 01 - Enable back offset. +PARA_ENABLE 2 0x0 Forces all parallelograms to have FRONT_FACING for + poly offset -- Need to have FRONT_ENABLE also set to + have Z offset for parallelograms. + POSSIBLE VALUES: + 00 - Disable front offset for parallelograms. + 01 - Enable front offset for parallelograms. diff --git a/regs/su_poly_offset_front_offset.txt b/regs/su_poly_offset_front_offset.txt new file mode 100644 index 0000000..3e712bc --- /dev/null +++ b/regs/su_poly_offset_front_offset.txt @@ -0,0 +1,4 @@ +Field Name Bits Default Description +OFFSET 31:0 0x0 Specifies polygon offset offset for front-facing polygons; + 32b IEEE float format; applied after Z scale & offset (0 + to 2^24-1 range) diff --git a/regs/su_poly_offset_front_scale.txt b/regs/su_poly_offset_front_scale.txt new file mode 100644 index 0000000..5806518 --- /dev/null +++ b/regs/su_poly_offset_front_scale.txt @@ -0,0 +1,5 @@ +Field Name Bits Default Description +SCALE 31:0 0x0 Specifies polygon offset scale for front-facing polygons; + 32b IEEE float format; applied after Z scale & offset (0 + to 2^24-1 range); slope computed in subpixels (1/12 or + 1/16) diff --git a/regs/su_reg_dest.txt b/regs/su_reg_dest.txt new file mode 100644 index 0000000..c0ae7ba --- /dev/null +++ b/regs/su_reg_dest.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +SELECT 3:0 0xF Register read/write destination select: b0: logical pipe0, + b1: logical pipe1, b2: logical pipe2 and b3: logical pipe3 diff --git a/regs/su_tex_wrap.txt b/regs/su_tex_wrap.txt new file mode 100644 index 0000000..0744328 --- /dev/null +++ b/regs/su_tex_wrap.txt @@ -0,0 +1,161 @@ +Field Name Bits Default Description +T0C0 0 0x0 tNcM -- Enable texture wrapping on component M + (S,T,R,Q) of texture N. + POSSIBLE VALUES: + 00 - Disable cylindrical wrapping. + 01 - Enable cylindrical wrapping. +T0C1 1 0x0 tNcM -- Enable texture wrapping on component M + (S,T,R,Q) of texture N. + POSSIBLE VALUES: + 00 - Disable cylindrical wrapping. + 01 - Enable cylindrical wrapping. +T0C2 2 0x0 tNcM -- Enable texture wrapping on component M + (S,T,R,Q) of texture N. + POSSIBLE VALUES: + 00 - Disable cylindrical wrapping. + 01 - Enable cylindrical wrapping. +T0C3 3 0x0 tNcM -- Enable texture wrapping on component M + (S,T,R,Q) of texture N. + POSSIBLE VALUES: + 00 - Disable cylindrical wrapping. + 01 - Enable cylindrical wrapping. +T1C0 4 0x0 tNcM -- Enable texture wrapping on component M + (S,T,R,Q) of texture N. + POSSIBLE VALUES: + 00 - Disable cylindrical wrapping. + 01 - Enable cylindrical wrapping. +T1C1 5 0x0 tNcM -- Enable texture wrapping on component M + (S,T,R,Q) of texture N. + POSSIBLE VALUES: + 00 - Disable cylindrical wrapping. + 01 - Enable cylindrical wrapping. +T1C2 6 0x0 tNcM -- Enable texture wrapping on component M + (S,T,R,Q) of texture N. + POSSIBLE VALUES: + 00 - Disable cylindrical wrapping. + 01 - Enable cylindrical wrapping. +T1C3 7 0x0 tNcM -- Enable texture wrapping on component M + (S,T,R,Q) of texture N. + POSSIBLE VALUES: + 00 - Disable cylindrical wrapping. + 01 - Enable cylindrical wrapping. +T2C0 8 0x0 tNcM -- Enable texture wrapping on component M + (S,T,R,Q) of texture N. + POSSIBLE VALUES: + 00 - Disable cylindrical wrapping. + 01 - Enable cylindrical wrapping. +T2C1 9 0x0 tNcM -- Enable texture wrapping on component M + (S,T,R,Q) of texture N. + POSSIBLE VALUES: + 00 - Disable cylindrical wrapping. + 01 - Enable cylindrical wrapping. +T2C2 10 0x0 tNcM -- Enable texture wrapping on component M + (S,T,R,Q) of texture N. + POSSIBLE VALUES: + 00 - Disable cylindrical wrapping. + 01 - Enable cylindrical wrapping. +T2C3 11 0x0 tNcM -- Enable texture wrapping on component M + (S,T,R,Q) of texture N. + POSSIBLE VALUES: + 00 - Disable cylindrical wrapping. + 01 - Enable cylindrical wrapping. +T3C0 12 0x0 tNcM -- Enable texture wrapping on component M + (S,T,R,Q) of texture N. + POSSIBLE VALUES: + 00 - Disable cylindrical wrapping. + 01 - Enable cylindrical wrapping. +T3C1 13 0x0 tNcM -- Enable texture wrapping on component M + (S,T,R,Q) of texture N. + POSSIBLE VALUES: + 00 - Disable cylindrical wrapping. + 01 - Enable cylindrical wrapping. +T3C2 14 0x0 tNcM -- Enable texture wrapping on component M + (S,T,R,Q) of texture N. + POSSIBLE VALUES: + 00 - Disable cylindrical wrapping. + 01 - Enable cylindrical wrapping. +T3C3 15 0x0 tNcM -- Enable texture wrapping on component M + (S,T,R,Q) of texture N. + POSSIBLE VALUES: + 00 - Disable cylindrical wrapping. + 01 - Enable cylindrical wrapping. +T4C0 16 0x0 tNcM -- Enable texture wrapping on component M + (S,T,R,Q) of texture N. + POSSIBLE VALUES: + 00 - Disable cylindrical wrapping. + 01 - Enable cylindrical wrapping. +T4C1 17 0x0 tNcM -- Enable texture wrapping on component M + (S,T,R,Q) of texture N. + POSSIBLE VALUES: + 00 - Disable cylindrical wrapping. + 01 - Enable cylindrical wrapping. +T4C2 18 0x0 tNcM -- Enable texture wrapping on component M + (S,T,R,Q) of texture N. + POSSIBLE VALUES: + 00 - Disable cylindrical wrapping. + 01 - Enable cylindrical wrapping. +T4C3 19 0x0 tNcM -- Enable texture wrapping on component M + (S,T,R,Q) of texture N. + POSSIBLE VALUES: + 00 - Disable cylindrical wrapping. + 01 - Enable cylindrical wrapping. +T5C0 20 0x0 tNcM -- Enable texture wrapping on component M + (S,T,R,Q) of texture N. + POSSIBLE VALUES: + 00 - Disable cylindrical wrapping. + 01 - Enable cylindrical wrapping. +T5C1 21 0x0 tNcM -- Enable texture wrapping on component M + (S,T,R,Q) of texture N. + POSSIBLE VALUES: + 00 - Disable cylindrical wrapping. + 01 - Enable cylindrical wrapping. +T5C2 22 0x0 tNcM -- Enable texture wrapping on component M + (S,T,R,Q) of texture N. + POSSIBLE VALUES: + 00 - Disable cylindrical wrapping. + 01 - Enable cylindrical wrapping. +T5C3 23 0x0 tNcM -- Enable texture wrapping on component M + (S,T,R,Q) of texture N. + POSSIBLE VALUES: + 00 - Disable cylindrical wrapping. + 01 - Enable cylindrical wrapping. +T6C0 24 0x0 tNcM -- Enable texture wrapping on component M + (S,T,R,Q) of texture N. + POSSIBLE VALUES: + 00 - Disable cylindrical wrapping. + 01 - Enable cylindrical wrapping. +T6C1 25 0x0 tNcM -- Enable texture wrapping on component M + (S,T,R,Q) of texture N. + POSSIBLE VALUES: + 00 - Disable cylindrical wrapping. + 01 - Enable cylindrical wrapping. +T6C2 26 0x0 tNcM -- Enable texture wrapping on component M + (S,T,R,Q) of texture N. + POSSIBLE VALUES: + 00 - Disable cylindrical wrapping. + 01 - Enable cylindrical wrapping. +T6C3 27 0x0 tNcM -- Enable texture wrapping on component M + (S,T,R,Q) of texture N. + POSSIBLE VALUES: + 00 - Disable cylindrical wrapping. + 01 - Enable cylindrical wrapping. +T7C0 28 0x0 tNcM -- Enable texture wrapping on component M + (S,T,R,Q) of texture N. + POSSIBLE VALUES: + 00 - Disable cylindrical wrapping. + 01 - Enable cylindrical wrapping. +T7C1 29 0x0 tNcM -- Enable texture wrapping on component M + (S,T,R,Q) of texture N. + POSSIBLE VALUES: + 00 - Disable cylindrical wrapping. + 01 - Enable cylindrical wrapping. +T7C2 30 0x0 tNcM -- Enable texture wrapping on component M + (S,T,R,Q) of texture N. + POSSIBLE VALUES: + 00 - Disable cylindrical wrapping. + 01 - Enable cylindrical wrapping. +T7C3 31 0x0 tNcM -- Enable texture wrapping on component M + (S,T,R,Q) of texture N. + POSSIBLE VALUES: + 00 - Disable cylindrical wrapping. + 01 - Enable cylindrical wrapping. diff --git a/regs/su_tex_wrap_ps3.txt b/regs/su_tex_wrap_ps3.txt new file mode 100644 index 0000000..55ab5a9 --- /dev/null +++ b/regs/su_tex_wrap_ps3.txt @@ -0,0 +1,41 @@ +Field Name Bits Default Description +T9C0 0 0x0 tNcM -- Enable texture wrapping on component M + (S,T,R,Q) of texture N. + POSSIBLE VALUES: + 00 - Disable cylindrical wrapping. + 01 - Enable cylindrical wrapping. +T9C1 1 0x0 tNcM -- Enable texture wrapping on component M + (S,T,R,Q) of texture N. + POSSIBLE VALUES: + 00 - Disable cylindrical wrapping. + 01 - Enable cylindrical wrapping. +T9C2 2 0x0 tNcM -- Enable texture wrapping on component M + (S,T,R,Q) of texture N. + POSSIBLE VALUES: + 00 - Disable cylindrical wrapping. + 01 - Enable cylindrical wrapping. +T9C3 3 0x0 tNcM -- Enable texture wrapping on component M + (S,T,R,Q) of texture N. + POSSIBLE VALUES: + 00 - Disable cylindrical wrapping. + 01 - Enable cylindrical wrapping. +T8C0 4 0x0 tNcM -- Enable texture wrapping on component M + (S,T,R,Q) of texture N. + POSSIBLE VALUES: + 00 - Disable cylindrical wrapping. + 01 - Enable cylindrical wrapping. +T8C1 5 0x0 tNcM -- Enable texture wrapping on component M + (S,T,R,Q) of texture N. + POSSIBLE VALUES: + 00 - Disable cylindrical wrapping. + 01 - Enable cylindrical wrapping. +T8C2 6 0x0 tNcM -- Enable texture wrapping on component M + (S,T,R,Q) of texture N. + POSSIBLE VALUES: + 00 - Disable cylindrical wrapping. + 01 - Enable cylindrical wrapping. +T8C3 7 0x0 tNcM -- Enable texture wrapping on component M + (S,T,R,Q) of texture N. + POSSIBLE VALUES: + 00 - Disable cylindrical wrapping. + 01 - Enable cylindrical wrapping. diff --git a/regs/tx_border_color.txt b/regs/tx_border_color.txt new file mode 100644 index 0000000..728c7b6 --- /dev/null +++ b/regs/tx_border_color.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +BORDER_COLOR 31:0 none Color used for borders. Format is the same as the texture + being bordered. diff --git a/regs/tx_chroma_key.txt b/regs/tx_chroma_key.txt new file mode 100644 index 0000000..9339146 --- /dev/null +++ b/regs/tx_chroma_key.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +CHROMA_KEY 31:0 none Color used for chroma key compare. Format is the same + as the texture being keyed. diff --git a/regs/tx_enable.txt b/regs/tx_enable.txt new file mode 100644 index 0000000..a07f6c6 --- /dev/null +++ b/regs/tx_enable.txt @@ -0,0 +1,65 @@ +Field Name Bits Default Description +TEX_0_ENABLE 0 none Texture Map Enables. + POSSIBLE VALUES: + 00 - Disable, ARGB = 1,0,0,0 + 01 - Enable +TEX_1_ENABLE 1 none Texture Map Enables. + POSSIBLE VALUES: + 00 - Disable, ARGB = 1,0,0,0 + 01 - Enable +TEX_2_ENABLE 2 none Texture Map Enables. + POSSIBLE VALUES: + 00 - Disable, ARGB = 1,0,0,0 + 01 - Enable +TEX_3_ENABLE 3 none Texture Map Enables. + POSSIBLE VALUES: + 00 - Disable, ARGB = 1,0,0,0 + 01 - Enable +TEX_4_ENABLE 4 none Texture Map Enables. + POSSIBLE VALUES: + 00 - Disable, ARGB = 1,0,0,0 + 01 - Enable +TEX_5_ENABLE 5 none Texture Map Enables. + POSSIBLE VALUES: + 00 - Disable, ARGB = 1,0,0,0 + 01 - Enable +TEX_6_ENABLE 6 none Texture Map Enables. + POSSIBLE VALUES: + 00 - Disable, ARGB = 1,0,0,0 + 01 - Enable +TEX_7_ENABLE 7 none Texture Map Enables. + POSSIBLE VALUES: + 00 - Disable, ARGB = 1,0,0,0 + 01 - Enable +TEX_8_ENABLE 8 none Texture Map Enables. + POSSIBLE VALUES: + 00 - Disable, ARGB = 1,0,0,0 + 01 - Enable +TEX_9_ENABLE 9 none Texture Map Enables. + POSSIBLE VALUES: + 00 - Disable, ARGB = 1,0,0,0 + 01 - Enable +TEX_10_ENABLE 10 none Texture Map Enables. + POSSIBLE VALUES: + 00 - Disable, ARGB = 1,0,0,0 + 01 - Enable +TEX_11_ENABLE 11 none Texture Map Enables. + POSSIBLE VALUES: + 00 - Disable, ARGB = 1,0,0,0 + 01 - Enable +TEX_12_ENABLE 12 none Texture Map Enables. + POSSIBLE VALUES: + 00 - Disable, ARGB = 1,0,0,0 + 01 - Enable +TEX_13_ENABLE 13 none Texture Map Enables. + POSSIBLE VALUES: + 00 - Disable, ARGB = 1,0,0,0 + 01 - Enable +TEX_14_ENABLE 14 none Texture Map Enables. + POSSIBLE VALUES: + 00 - Disable, ARGB = 1,0,0,0 + 01 - Enable +TEX_15_ENABLE 15 none Texture Map Enables. + POSSIBLE VALUES: + 00 - Disable, ARGB = 1,0,0,0 + 01 - Enable diff --git a/regs/tx_filter0.txt b/regs/tx_filter0.txt new file mode 100644 index 0000000..ccf0e07 --- /dev/null +++ b/regs/tx_filter0.txt @@ -0,0 +1,58 @@ +Field Name Bits Default Description +CLAMP_S 2:0 none Clamp mode for texture coordinates + POSSIBLE VALUES: + 00 - Wrap (repeat) + 01 - Mirror + 02 - Clamp to last texel (0.0 to 1.0) + 03 - MirrorOnce to last texel (-1.0 to 1.0) + 04 - Clamp half way to border color (0.0 to 1.0) + 05 - MirrorOnce half way to border color (-1.0 to 1.0) + 06 - Clamp to border color (0.0 to 1.0) + 07 - MirrorOnce to border color (-1.0 to 1.0) +CLAMP_T 5:3 none Clamp mode for texture coordinates + POSSIBLE VALUES: + 00 - Wrap (repeat) + 01 - Mirror + 02 - Clamp to last texel (0.0 to 1.0) + 03 - MirrorOnce to last texel (-1.0 to 1.0) + 04 - Clamp half way to border color (0.0 to 1.0) + 05 - MirrorOnce half way to border color (-1.0 to 1.0) + 06 - Clamp to border color (0.0 to 1.0) + 07 - MirrorOnce to border color (-1.0 to 1.0) +CLAMP_R 8:6 none Clamp mode for texture coordinates + POSSIBLE VALUES: + 00 - Wrap (repeat) + 01 - Mirror + 02 - Clamp to last texel (0.0 to 1.0) + 03 - MirrorOnce to last texel (-1.0 to 1.0) + 04 - Clamp half way to border color (0.0 to 1.0) + 05 - MirrorOnce half way to border color (-1.0 to 1.0) + 06 - Clamp to border color (0.0 to 1.0) + 07 - MirrorOnce to border color (-1.0 to 1.0) +MAG_FILTER 10:9 none Filter used when texture is magnified + POSSIBLE VALUES: + 00 - Filter4 + 01 - Point + 02 - Linear + 03 - Reserved +MIN_FILTER 12:11 none Filter used when texture is minified + POSSIBLE VALUES: + 00 - Filter4 + 01 - Point + 02 - Linear + 03 - Reserved +MIP_FILTER 14:13 none Filter used between mipmap levels + POSSIBLE VALUES: + 00 - None + 01 - Point + 02 - Linear + 03 - Reserved +VOL_FILTER 16:15 none Filter used between layers of a volume + POSSIBLE VALUES: + 00 - None (no filter specifed, select from MIN/MAG filters) + 01 - Point + 02 - Linear + 03 - Reserved +MAX_MIP_LEVEL 20:17 none LOD index of largest (finest) mipmap to use (0 is + largest). Ranges from 0 to NUM_LEVELS. +ID 31:28 none Logical id for this physical texture diff --git a/regs/tx_filter1.txt b/regs/tx_filter1.txt new file mode 100644 index 0000000..f58415f --- /dev/null +++ b/regs/tx_filter1.txt @@ -0,0 +1,37 @@ +Field Name Bits Default Description +CHROMA_KEY_MODE 1:0 none Chroma Key Mode + POSSIBLE VALUES: + 00 - Disable + 01 - ChromaKey (kill pixel if any sample matches chroma key) + 02 - ChromaKeyBlend (set sample to 0 if it matches chroma key) +MC_ROUND 2 none Bilinear rounding mode + POSSIBLE VALUES: + 00 - Normal rounding on all components (+0.5) + 01 - MPEG4 rounding on all components (+0.25) +LOD_BIAS 12:3 none (s4.5). Ranges from -16.0 to 15.99. Mipmap LOD bias + measured in mipmap levels. Added to the signed, + computed LOD before the LOD is clamped. +MC_COORD_TRUNCATE 14 none MPEG coordinate truncation mode + POSSIBLE VALUES: + 00 - Dont truncate coordinate fractions. + 01 - Truncate coordinate fractions to 0.0 and 0.5 for MPEG +TRI_PERF 16:15 none Apply slope and bias to trilerp fraction to reduce the + number of 2-level fetches for trilinear. Should only be + used if MIP_FILTER is LINEAR. + POSSIBLE VALUES: + 00 - Breakpoint=0/8. lfrac_out = lfrac_in + 01 - Breakpoint=1/8. lfrac_out = clamp(4/3*lfrac_in - 1/6) + 02 - Breakpoint=1/4. lfrac_out = clamp(2*lfrac_in - 1/2) + 03 - Breakpoint=3/8. lfrac_out = clamp(4*lfrac_in - 3/2) +MACRO_SWITCH 22 none If enabled, addressing switches to macro-linear when + image width is <= 8 micro-tiles. If disabled, functionality + is same as RV350, switch to macro-linear when image + width is < 8 micro-tiles. + POSSIBLE VALUES: + 00 - RV350 mode + 01 - Switch from macro-tiled to macro-linear when (width <= 8 micro-tiles) +BORDER_FIX 31 none To fix issues when using non-square mipmaps, with + border_color, and extreme minification. + POSSIBLE VALUES: + 00 - R3xx R4xx mode + 01 - Stop right shifting coord once mip size is pinned to one diff --git a/regs/tx_filter4.txt b/regs/tx_filter4.txt new file mode 100644 index 0000000..07e7cbd --- /dev/null +++ b/regs/tx_filter4.txt @@ -0,0 +1,13 @@ +Field Name Bits Default Description +WEIGHT_1 10:0 none (s1.9). Bottom or Right weight of pair. +WEIGHT_0 21:11 none (s1.9). Top or Left weight of pair. +WEIGHT_PAIR 22 none Indicates which pair of weights within phase to load. + POSSIBLE VALUES: + 00 - Top or Left + 01 - Bottom or Right +PHASE 26:23 none Indicates which of 9 phases to load +DIRECTION 27 none Indicates whether to load the horizontal or vertical + weights + POSSIBLE VALUES: + 00 - Horizontal + 01 - Vertical diff --git a/regs/tx_format0.txt b/regs/tx_format0.txt new file mode 100644 index 0000000..46be625 --- /dev/null +++ b/regs/tx_format0.txt @@ -0,0 +1,24 @@ +Field Name Bits Default Description +TXWIDTH 10:0 none Image width - 1. The largest image is 4096 texels. When + wrapping or mirroring, must be a power of 2. When + mipmapping, must be a power of 2 or padded to a power + of 2 in memory. Can always be non-square, except for + cube maps which must be square. +TXHEIGHT 21:11 none Image height - 1. The largest image is 4096 texels. When + wrapping or mirroring, must be a power of 2. When + mipmapping, must be a power of 2 or padded to a power + of 2 in memory. Can always be non-square, except for + cube maps which must be square. +TXDEPTH 25:22 none LOG2(depth) of volume texture +NUM_LEVELS 29:26 none Number of mipmap levels minus 1. Ranges from 0 to 12. + Equivalent to LOD index of smallest (coarsest) mipmap + to use. +PROJECTED 30 none Specifies whether texture coords are projected. + POSSIBLE VALUES: + 00 - Non-Projected + 01 - Projected +TXPITCH_EN 31 none Indicates when TXPITCH should be used instead of + TXWIDTH for image addressing + POSSIBLE VALUES: + 00 - Use TXWIDTH for image addressing + 01 - Use TXPITCH for image addressing diff --git a/regs/tx_format1.txt b/regs/tx_format1.txt new file mode 100644 index 0000000..29c1bea --- /dev/null +++ b/regs/tx_format1.txt @@ -0,0 +1,145 @@ +Field Name Bits Default Description +TXFORMAT 4:0 none Texture Format. Components are numbered right to left. + Parenthesis indicate typical uses of each format. + POSSIBLE VALUES: + 00 - TX_FMT_8 or TX_FMT_1 (if TX_FORMAT2.TXFORMAT_MSB is set) + 01 - TX_FMT_16 or TX_FMT_1_REVERSE (if TX_FORMAT2.TXFORMAT_MSB is set) + 02 - TX_FMT_4_4 or TX_FMT_10 (if TX_FORMAT2.TXFORMAT_MSB is set) + 03 - TX_FMT_8_8 or TX_FMT_10_10 (if TX_FORMAT2.TXFORMAT_MSB is set) + 04 - TX_FMT_16_16 or TX_FMT_10_10_10_10 (if TX_FORMAT2.TXFORMAT_MSB is set) + 05 - TX_FMT_3_3_2 or TX_FMT_ATI1N (if TX_FORMAT2.TXFORMAT_MSB is set) + 06 - TX_FMT_5_6_5 or TX_FMT_24_8 (if TX_FORMAT2.TXFORMAT_MSB is set) + 07 - TX_FMT_6_5_5 + 08 - TX_FMT_11_11_10 + 09 - TX_FMT_10_11_11 + 10 - TX_FMT_4_4_4_4 + 11 - TX_FMT_1_5_5_5 + 12 - TX_FMT_8_8_8_8 + 13 - TX_FMT_2_10_10_10 + 14 - TX_FMT_16_16_16_16 + 15 - Reserved + 16 - Reserved + 17 - Reserved + 18 - TX_FMT_Y8 + 19 - TX_FMT_AVYU444 + 20 - TX_FMT_VYUY422 + 21 - TX_FMT_YVYU422 + 22 - TX_FMT_16_MPEG + 23 - TX_FMT_16_16_MPEG + 24 - TX_FMT_16f + 25 - TX_FMT_16f_16f + 26 - TX_FMT_16f_16f_16f_16f + 27 - TX_FMT_32f + 28 - TX_FMT_32f_32f + 29 - TX_FMT_32f_32f_32f_32f + 30 - TX_FMT_W24_FP + 31 - TX_FMT_ATI2N +SIGNED_COMP0 5 none Component filter should interpret texel data as signed or + unsigned. (Ignored for Y/YUV formats.) + POSSIBLE VALUES: + 00 - Component filter should interpret texel data as unsigned + 01 - Component filter should interpret texel data as signed +SIGNED_COMP1 6 none Component filter should interpret texel data as signed or + unsigned. (Ignored for Y/YUV formats.) + POSSIBLE VALUES: + 00 - Component filter should interpret texel data as unsigned + 01 - Component filter should interpret texel data as signed +SIGNED_COMP2 7 none Component filter should interpret texel data as signed or + unsigned. (Ignored for Y/YUV formats.) + POSSIBLE VALUES: + 00 - Component filter should interpret texel data as unsigned + 01 - Component filter should interpret texel data as signed +SIGNED_COMP3 8 none Component filter should interpret texel data as signed or + unsigned. (Ignored for Y/YUV formats.) + POSSIBLE VALUES: + 00 - Component filter should interpret texel data as unsigned + 01 - Component filter should interpret texel data as signed +SEL_ALPHA 11:9 none Specifies swizzling for each channel at the input of the + pixel shader. (Ignored for Y/YUV formats.) + POSSIBLE VALUES: + 00 - Select Texture Component0. + 01 - Select Texture Component1. + 02 - Select Texture Component2. + 03 - Select Texture Component3. + 04 - Select the value 0. + 05 - Select the value 1. +SEL_RED 14:12 none Specifies swizzling for each channel at the input of the + pixel shader. (Ignored for Y/YUV formats.) + POSSIBLE VALUES: + 00 - Select Texture Component0. + 01 - Select Texture Component1. + 02 - Select Texture Component2. + 03 - Select Texture Component3. + 04 - Select the value 0. + 05 - Select the value 1. +SEL_GREEN 17:15 none Specifies swizzling for each channel at the input of the + pixel shader. (Ignored for Y/YUV formats.) + POSSIBLE VALUES: + 00 - Select Texture Component0. + 01 - Select Texture Component1. + 02 - Select Texture Component2. + 03 - Select Texture Component3. + 04 - Select the value 0. + 05 - Select the value 1. +SEL_BLUE 20:18 none Specifies swizzling for each channel at the input of the + pixel shader. (Ignored for Y/YUV formats.) + POSSIBLE VALUES: + 00 - Select Texture Component0. + 01 - Select Texture Component1. + 02 - Select Texture Component2. + 03 - Select Texture Component3. + 04 - Select the value 0. + 05 - Select the value 1. +GAMMA 21 none Optionally remove gamma from texture before passing to + shader. Only apply to 8bit or less components. + POSSIBLE VALUES: + 00 - Disable gamma removal + 01 - Enable gamma removal +YUV_TO_RGB 23:22 none YUV to RGB conversion mode + POSSIBLE VALUES: + 00 - Disable YUV to RGB conversion + 01 - Enable YUV to RGB conversion (with clamp) + 02 - Enable YUV to RGB conversion (without clamp) +SWAP_YUV 24 none POSSIBLE VALUES: + 00 - Disable swap YUV mode + 01 - Enable swap YUV mode (hw inverts upper bit of U and V) +TEX_COORD_TYPE 26:25 none Specifies coordinate type. + POSSIBLE VALUES: + 00 - 2D + 01 - 3D + 02 - Cube + 03 - Reserved +CACHE 31:27 none This field is ignored on R520 and RV510. + POSSIBLE VALUES: + 00 - WHOLE + 01 - Reserved + 02 - HALF_REGION_0 + 03 - HALF_REGION_1 + 04 - FOURTH_REGION_0 + 05 - FOURTH_REGION_1 + 06 - FOURTH_REGION_2 + 07 - FOURTH_REGION_3 + 08 - EIGHTH_REGION_0 + 09 - EIGHTH_REGION_1 + 10 - EIGHTH_REGION_2 + 11 - EIGHTH_REGION_3 + 12 - EIGHTH_REGION_4 + 13 - EIGHTH_REGION_5 + 14 - EIGHTH_REGION_6 + 15 - EIGHTH_REGION_7 + 16 - SIXTEENTH_REGION_0 + 17 - SIXTEENTH_REGION_1 + 18 - SIXTEENTH_REGION_2 + 19 - SIXTEENTH_REGION_3 + 20 - SIXTEENTH_REGION_4 + 21 - SIXTEENTH_REGION_5 + 22 - SIXTEENTH_REGION_6 + 23 - SIXTEENTH_REGION_7 + 24 - SIXTEENTH_REGION_8 + 25 - SIXTEENTH_REGION_9 + 26 - SIXTEENTH_REGION_A + 27 - SIXTEENTH_REGION_B + 28 - SIXTEENTH_REGION_C + 29 - SIXTEENTH_REGION_D + 30 - SIXTEENTH_REGION_E + 31 - SIXTEENTH_REGION_F diff --git a/regs/tx_format2.txt b/regs/tx_format2.txt new file mode 100644 index 0000000..74f92dd --- /dev/null +++ b/regs/tx_format2.txt @@ -0,0 +1,22 @@ +Field Name Bits Default Description +TXPITCH 13:0 none Used instead of TXWIDTH for image addressing when + TXPITCH_EN is asserted. Pitch is given as number of + texels minus one. Maximum pitch is 16K texels. +TXFORMAT_MSB 14 none Specifies the MSB of the texture format to extend the + number of formats to 64. +TXWIDTH_11 15 none Specifies bit 11 of TXWIDTH to extend the largest + image to 4096 texels. +TXHEIGHT_11 16 none Specifies bit 11 of TXHEIGHT to extend the largest + image to 4096 texels. +POW2FIX2FLT 17 none Optionally divide by 256 instead of 255 during fix2float. + Can only be asserted for 8-bit components. + POSSIBLE VALUES: + 00 - Divide by pow2-1 for fix2float (default) + 01 - Divide by pow2 for fix2float +SEL_FILTER4 19:18 none If filter4 is enabled, specifies which texture component + to apply filter4 to. + POSSIBLE VALUES: + 00 - Select Texture Component0. + 01 - Select Texture Component1. + 02 - Select Texture Component2. + 03 - Select Texture Component3. diff --git a/regs/tx_invaltags.txt b/regs/tx_invaltags.txt new file mode 100644 index 0000000..6c53601 --- /dev/null +++ b/regs/tx_invaltags.txt @@ -0,0 +1,2 @@ +Field Name Bits Default Description +RESERVED 31:0 none Unused diff --git a/regs/tx_offset.txt b/regs/tx_offset.txt new file mode 100644 index 0000000..b58f27b --- /dev/null +++ b/regs/tx_offset.txt @@ -0,0 +1,18 @@ +Field Name Bits Default Description +ENDIAN_SWAP 1:0 none Endian Control + POSSIBLE VALUES: + 00 - No swap + 01 - 16 bit swap + 02 - 32 bit swap + 03 - Half-DWORD swap +MACRO_TILE 2 none Macro Tile Control + POSSIBLE VALUES: + 00 - 2KB page is linear + 01 - 2KB page is tiled +MICRO_TILE 4:3 none Micro Tile Control + POSSIBLE VALUES: + 00 - 32 byte cache line is linear + 01 - 32 byte cache line is tiled + 02 - 32 byte cache line is tiled square (only applies to 16-bit texel) + 03 - Reserved +TXOFFSET 31:5 none 32-byte aligned pointer to base map diff --git a/regs/us_code_addr.txt b/regs/us_code_addr.txt new file mode 100644 index 0000000..4d71dcc --- /dev/null +++ b/regs/us_code_addr.txt @@ -0,0 +1,11 @@ +Field Name Bits Default Description +START_ADDR 8:0 0x0 Specifies the address of the first instruction to execute in + the shader program. This address is relative to the shader + program offset given in + US_CODE_OFFSET.OFFSET_ADDR. +END_ADDR 24:16 0x0 Specifies the address of the last instruction to execute in + the shader program. This address is relative to the shader + program offset given in + US_CODE_OFFSET.OFFSET_ADDR. Shader program + execution will always terminate after the instruction at + this address is executed. diff --git a/regs/us_code_offset.txt b/regs/us_code_offset.txt new file mode 100644 index 0000000..5df48e9 --- /dev/null +++ b/regs/us_code_offset.txt @@ -0,0 +1,4 @@ +Field Name Bits Default Description +OFFSET_ADDR 8:0 0x0 Specifies the offset to add to relative instruction + addresses, including START_ADDR, END_ADDR, and + some flow control jump addresses. diff --git a/regs/us_code_range.txt b/regs/us_code_range.txt new file mode 100644 index 0000000..a94f54b --- /dev/null +++ b/regs/us_code_range.txt @@ -0,0 +1,6 @@ +Field Name Bits Default Description +CODE_ADDR 8:0 0x0 Specifies the start address of the current code window. + This address is an absolute address. +CODE_SIZE 24:16 0x0 Specifies the size of the current code window, minus + one. The last instruction in the code window is given by + CODE_ADDR + CODE_SIZE. diff --git a/regs/us_config.txt b/regs/us_config.txt new file mode 100644 index 0000000..be06e9f --- /dev/null +++ b/regs/us_config.txt @@ -0,0 +1,7 @@ +Field Name Bits Default Description +ZERO_TIMES_ANYTHING_EQUALS_ZERO 1 0x0 Control how ALU multiplier behaves when one + argument is zero. This affects the multiplier used in + MAD and dot product calculations. + POSSIBLE VALUES: + 00 - Default behaviour (0*inf=nan,0*nan=nan) + 01 - Legacy behaviour for shader model 1 (0*anything=0) diff --git a/regs/us_fc_bool_const.txt b/regs/us_fc_bool_const.txt new file mode 100644 index 0000000..ec3156b --- /dev/null +++ b/regs/us_fc_bool_const.txt @@ -0,0 +1,2 @@ +Field Name Bits Default Description +KBOOL 31:0 0x0 Specifies the boolean value for constants 0-31. diff --git a/regs/us_fc_ctrl.txt b/regs/us_fc_ctrl.txt new file mode 100644 index 0000000..a6a2434 --- /dev/null +++ b/regs/us_fc_ctrl.txt @@ -0,0 +1,11 @@ +Field Name Bits Default Description +TEST_EN 30 0x0 Specifies whether test mode is enabled. This flag + currently has no effect in hardware. + POSSIBLE VALUES: + 00 - Normal mode + 01 - Test mode (currently unused) +FULL_FC_EN 31 0x0 Specifies whether full flow control functionality is + enabled. + POSSIBLE VALUES: + 00 - Use partial flow-control (enables twice the contexts). Loops and subroutines are not available in partial flow-control mode, and the nesting depth of branch statements is limited. + 01 - Use full pixel shader 3.0 flow control, including loops and subroutines. diff --git a/regs/us_fc_int_const.txt b/regs/us_fc_int_const.txt new file mode 100644 index 0000000..7ceed13 --- /dev/null +++ b/regs/us_fc_int_const.txt @@ -0,0 +1,8 @@ +Field Name Bits Default Description +KR 7:0 0x0 Specifies the number of iterations. Unsigned 8-bit integer + in [0, 255]. +KG 15:8 0x0 Specifies the initial value of the loop register (aL). + Unsigned 8-bit integer in [0, 255]. +KB 23:16 0x0 Specifies the increment used to change the loop register + (aL) on each iteration. Signed 7-bit integer in [-128, + 127]. diff --git a/regs/us_format.txt b/regs/us_format.txt new file mode 100644 index 0000000..ee3bf36 --- /dev/null +++ b/regs/us_format.txt @@ -0,0 +1,7 @@ +Field Name Bits Default Description +TXWIDTH 10:0 0x0 +TXHEIGHT 21:11 0x0 +TXDEPTH 25:22 0x0 POSSIBLE VALUES: + 13 - width > 2048, height <= 2048 + 14 - width <= 2048, height > 2048 + 15 - width > 2048, height > 2048 diff --git a/regs/us_out_fmt.txt b/regs/us_out_fmt.txt new file mode 100644 index 0000000..f707264 --- /dev/null +++ b/regs/us_out_fmt.txt @@ -0,0 +1,48 @@ +Field Name Bits Default Description +OUT_FMT 4:0 0x0 POSSIBLE VALUES: + 00 - C4_8 (S/U) + 01 - C4_10 (U) + 02 - C4_10_GAMMA - (U) + 03 - C_16 - (S/U) + 04 - C2_16 - (S/U) + 05 - C4_16 - (S/U) + 06 - C_16_MPEG - (S) + 07 - C2_16_MPEG - (S) + 08 - C2_4 - (U) + 09 - C_3_3_2 - (U) + 10 - C_6_5_6 - (S/U) + 11 - C_11_11_10 - (S/U) + 12 - C_10_11_11 - (S/U) + 13 - C_2_10_10_10 - (S/U) + 14 - reserved + 15 - UNUSED - Render target is not used + 16 - C_16_FP - (S10E5) + 17 - C2_16_FP - (S10E5) + 18 - C4_16_FP - (S10E5) + 19 - C_32_FP - (S23E8) + 20 - C2_32_FP - (S23E8) + 21 - C4_32_FP - (S23E8) +C0_SEL 9:8 0x0 POSSIBLE VALUES: + 00 - Alpha + 01 - Red + 02 - Green + 03 - Blue +C1_SEL 11:10 0x0 POSSIBLE VALUES: + 00 - Alpha + 01 - Red + 02 - Green + 03 - Blue +C2_SEL 13:12 0x0 POSSIBLE VALUES: + 00 - Alpha + 01 - Red + 02 - Green + 03 - Blue +C3_SEL 15:14 0x0 POSSIBLE VALUES: + 00 - Alpha + 01 - Red + 02 - Green + 03 - Blue +OUT_SIGN 19:16 0x0 +ROUND_ADJ 20 0x0 POSSIBLE VALUES: + 00 - Normal rounding + 01 - Modified rounding of fixed-point data diff --git a/regs/us_pixsize.txt b/regs/us_pixsize.txt new file mode 100644 index 0000000..e3abf94 --- /dev/null +++ b/regs/us_pixsize.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +PIX_SIZE 6:0 0x0 Specifies the total size of the current pixel stack frame + (1:128) diff --git a/regs/us_w_fmt.txt b/regs/us_w_fmt.txt new file mode 100644 index 0000000..52a3db7 --- /dev/null +++ b/regs/us_w_fmt.txt @@ -0,0 +1,11 @@ +Field Name Bits Default Description +W_FMT 1:0 0x0 Format for W + POSSIBLE VALUES: + 00 - W0 - W is always zero + 01 - W24 - 24-bit fixed point + 02 - W24_FP - 24-bit floating point. The floating point values are a special format that preserve sorting order when values are compared as integers, allowing higher precision in W without additional logic in other blocks. + 03 - Reserved +W_SRC 2 0x0 Source for W + POSSIBLE VALUES: + 00 - WSRC_US - W comes from shader instruction + 01 - WSRC_RAS - W comes from rasterizer diff --git a/regs/vap_alt_num_vertices.txt b/regs/vap_alt_num_vertices.txt new file mode 100644 index 0000000..ef5131b --- /dev/null +++ b/regs/vap_alt_num_vertices.txt @@ -0,0 +1,4 @@ +Field Name Bits Default Description +NUM_VERTICES 23:0 0x0 24-bit vertex count for command packet. Used instead of + bits 31:16 of VAP_VF_CNTL if + VAP_VF_CNTL.USE_ALT_NUM_VERTS is set. diff --git a/regs/vap_clip_cntl.txt b/regs/vap_clip_cntl.txt new file mode 100644 index 0000000..f82fe00 --- /dev/null +++ b/regs/vap_clip_cntl.txt @@ -0,0 +1,20 @@ +Field Name Bits Default Description +UCP_ENA_0 0 0x0 Enable User Clip Plane 0 +UCP_ENA_1 1 0x0 Enable User Clip Plane 1 +UCP_ENA_2 2 0x0 Enable User Clip Plane 2 +UCP_ENA_3 3 0x0 Enable User Clip Plane 3 +UCP_ENA_4 4 0x0 Enable User Clip Plane 4 +UCP_ENA_5 5 0x0 Enable User Clip Plane 5 +PS_UCP_MODE 15:14 0x0 0 = Cull using distance from center of point + 1 = Cull using radius-based distance from center of point + 2 = Cull using radius-based distance from center of point, Expand and Clip on intersection + 3 = Always expand and clip as trifan +CLIP_DISABLE 16 0x0 Disables clip code generation and clipping process for + TCL +UCP_CULL_ONLY_ENA 17 0x0 Cull Primitives against UCPS, but don`t clip +BOUNDARY_EDGE_FLAG_ENA 18 0x0 If set, boundary edges are highlighted, else they are not + highlighted +COLOR2_IS_TEXTURE 20 0x0 If set, color2 is used as texture8 by GA (PS3.0 + requirement) +COLOR3_IS_TEXTURE 21 0x0 If set, color3 is used as texture9 by GA (PS3.0 + requirement) diff --git a/regs/vap_cntl.txt b/regs/vap_cntl.txt new file mode 100644 index 0000000..96f4dd4 --- /dev/null +++ b/regs/vap_cntl.txt @@ -0,0 +1,31 @@ +Field Name Bits Default Description +PVS_NUM_SLOTS 3:0 0x0 Specifies the number of vertex slots to be used in the + VAP PVS process. A slot represents a single vertex + storage location1 across multiple engines (one vertex per + engine). By decreasing the number of slots, there is more + memory for each vertex, but less parallel processing. + Similarly, by increasing the number of slots, there is less + memory per vertex but more vertices being processed in + parallel. +PVS_NUM_CNTLRS 7:4 0x0 Specifies the maximum number of controllers to be + processing in parallel. In general should be set to max + value of TBD. Can be changed for performance analysis. +PVS_NUM_FPUS 11:8 0x0 Specifies the number of Floating Point Units + (Vector/Math Engines) to use when processing vertices. +VAP_NO_RENDER 17 0x0 If set, VAP will not process any draw commands (i.e. + writes to VAP_VF_CNTL, the INDX and DATAPORT + and Immediate mode writes are ignored. +VF_MAX_VTX_NUM 21:18 0x9 This field controls the number of vertices that the vertex + fetcher manages for the TCL and Setup Vertex Storage + memories (and therefore the number of vertices that can + be re-used). This value should be set to 12 for most + operation, This number may be modified for + performance evaluation. The value is the maximum + vertex number used which is one less than the number of + vertices (i.e. a 12 means 13 vertices will be used) +DX_CLIP_SPACE_DEF 22 0x0 Clip space is defined as: + 0: -W < X < W, -W < Y < W, -W < Z < W (OpenGL Definition) + 1: -W < X < W, -W < Y < W, 0 < Z < W (DirectX Definition) +TCL_STATE_OPTIMIZATION 23 0x0 If set, enables the TCL state optimization, and the new + state is used only if there is a change in TCL state, + between VF_CNTL (triggers) diff --git a/regs/vap_cntl_status.txt b/regs/vap_cntl_status.txt new file mode 100644 index 0000000..41ce6bb --- /dev/null +++ b/regs/vap_cntl_status.txt @@ -0,0 +1,29 @@ +Field Name Bits Default Description +VC_SWAP 1:0 0x0 Endian-Swap Control. + POSSIBLE VALUES: + 00 - No swap 1 = 16-bit swap: 0xAABBCCDD becomes 0xBBAADDCC + 02 - 32-bit swap: 0xAABBCCDD becomes 0xDDCCBBAA + 03 - Half-dword swap: 0xAABBCCDD becomes 0xCCDDAABB +PVS_BYPASS 8 0x0 The TCL engine is logically or physically removed from + the circuit. +PVS_BUSY 11 0x0 Transform/Clip/Light (TCL) Engine is Busy. Read-only. +MAX_MPS 19:16 0x0 Maximum number of MPs fused for this chip. Read-only. + For A11, fusemask is fixed to 1XXX. + For A12, + CG.CC_COMBINEDSTRAPS.MAX_MPS[7:5] = 000 => max_mps[3:0] = 1XXX => 8 MPs + CG.CC_COMBINEDSTRAPS.MAX_MPS[7:5] = 001 => max_mps[3:0] = 0110 => 6 MPs + CG.CC_COMBINEDSTRAPS.MAX_MPS[7:5] = 010 => max_mps[3:0] = 0101 => 5 MPs + CG.CC_COMBINEDSTRAPS.MAX_MPS[7:5] = 011 => max_mps[3:0] = 0100 => 4 MPs + CG.CC_COMBINEDSTRAPS.MAX_MPS[7:5] = 100 => max_mps[3:0] = 0011 => 3 MPs + CG.CC_COMBINEDSTRAPS.MAX_MPS[7:5] = 101 => max_mps[3:0] = 0010 => 2 MPs + CG.CC_COMBINEDSTRAPS.MAX_MPS[7:5] = 110 => max_mps[3:0] = 0001 => 1 MP + CG.CC_COMBINEDSTRAPS.MAX_MPS[7:5] = 111 => max_mps[3:0] = 0000 => 0 MP + Note that max_mps[3:0] = 0111 = 7 MPs is not available +VS_BUSY 24 0x0 Vertex Store is Busy. Read-only. +RCP_BUSY 25 0x0 Reciprocal Engine is Busy. Read-only. +VTE_BUSY 26 0x0 ViewPort Transform Engine is Busy. Read-only. +MIU_BUSY 27 0x0 Memory Interface Unit is Busy. Read-only. +VC_BUSY 28 0x0 Vertex Cache is Busy. Read-only. +VF_BUSY 29 0x0 Vertex Fetcher is Busy. Read-only. +REGPIPE_BUSY 30 0x0 Register Pipeline is Busy. Read-only. +VAP_BUSY 31 0x0 VAP Engine is Busy. Read-only. diff --git a/regs/vap_gb_horz_clip_adj.txt b/regs/vap_gb_horz_clip_adj.txt new file mode 100644 index 0000000..30c9c6c --- /dev/null +++ b/regs/vap_gb_horz_clip_adj.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +DATA_REGISTER 31:0 0x0 32-bit floating point value. Should be set to 1.0 for no + guard band. diff --git a/regs/vap_gb_horz_disc_adj.txt b/regs/vap_gb_horz_disc_adj.txt new file mode 100644 index 0000000..30c9c6c --- /dev/null +++ b/regs/vap_gb_horz_disc_adj.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +DATA_REGISTER 31:0 0x0 32-bit floating point value. Should be set to 1.0 for no + guard band. diff --git a/regs/vap_gb_vert_clip_adj.txt b/regs/vap_gb_vert_clip_adj.txt new file mode 100644 index 0000000..30c9c6c --- /dev/null +++ b/regs/vap_gb_vert_clip_adj.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +DATA_REGISTER 31:0 0x0 32-bit floating point value. Should be set to 1.0 for no + guard band. diff --git a/regs/vap_gb_vert_disc_adj.txt b/regs/vap_gb_vert_disc_adj.txt new file mode 100644 index 0000000..30c9c6c --- /dev/null +++ b/regs/vap_gb_vert_disc_adj.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +DATA_REGISTER 31:0 0x0 32-bit floating point value. Should be set to 1.0 for no + guard band. diff --git a/regs/vap_index_offset.txt b/regs/vap_index_offset.txt new file mode 100644 index 0000000..57ca224 --- /dev/null +++ b/regs/vap_index_offset.txt @@ -0,0 +1,2 @@ +Field Name Bits Default Description +INDEX_OFFSET 24:0 0x0 25-bit signed 2`s comp offset value diff --git a/regs/vap_out_vtx_fmt_0.txt b/regs/vap_out_vtx_fmt_0.txt new file mode 100644 index 0000000..de1e355 --- /dev/null +++ b/regs/vap_out_vtx_fmt_0.txt @@ -0,0 +1,7 @@ +Field Name Bits Default Description +VTX_POS_PRESENT 0 0x0 Output the Position Vector +VTX_COLOR_0_PRESENT 1 0x0 Output Color 0 Vector +VTX_COLOR_1_PRESENT 2 0x0 Output Color 1 Vector +VTX_COLOR_2_PRESENT 3 0x0 Output Color 2 Vector +VTX_COLOR_3_PRESENT 4 0x0 Output Color 3 Vector +VTX_PT_SIZE_PRESENT 16 0x0 Output Point Size Vector diff --git a/regs/vap_out_vtx_fmt_1.txt b/regs/vap_out_vtx_fmt_1.txt new file mode 100644 index 0000000..187cdcb --- /dev/null +++ b/regs/vap_out_vtx_fmt_1.txt @@ -0,0 +1,49 @@ +Field Name Bits Default Description +TEX_0_COMP_CNT 2:0 0x0 Number of words in texture + 0 = Not Present + 1 = 1 component + 2 = 2 components + 3 = 3 components + 4 = 4 components +TEX_1_COMP_CNT 5:3 0x0 Number of words in texture + 0 = Not Present + 1 = 1 component + 2 = 2 components + 3 = 3 components + 4 = 4 components +TEX_2_COMP_CNT 8:6 0x0 Number of words in texture + 0 = Not Present + 1 = 1 component + 2 = 2 components + 3 = 3 components + 4 = 4 components +TEX_3_COMP_CNT 11:9 0x0 Number of words in texture + 0 = Not Present + 1 = 1 component + 2 = 2 components + 3 = 3 components + 4 = 4 components +TEX_4_COMP_CNT 14:12 0x0 Number of words in texture + 0 = Not Present + 1 = 1 component + 2 = 2 components + 3 = 3 components + 4 = 4 components +TEX_5_COMP_CNT 17:15 0x0 Number of words in texture + 0 = Not Present + 1 = 1 component + 2 = 2 components + 3 = 3 components + 4 = 4 components +TEX_6_COMP_CNT 20:18 0x0 Number of words in texture + 0 = Not Present + 1 = 1 component + 2 = 2 components + 3 = 3 components + 4 = 4 components +TEX_7_COMP_CNT 23:21 0x0 Number of words in texture + 0 = Not Present + 1 = 1 component + 2 = 2 components + 3 = 3 components + 4 = 4 components diff --git a/regs/vap_port_data.txt b/regs/vap_port_data.txt new file mode 100644 index 0000000..f124a20 --- /dev/null +++ b/regs/vap_port_data.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +DATAPORT0 31:0 0x0 1st of 16 consecutive dwords for writing vertex data + information. diff --git a/regs/vap_port_data_idx_128.txt b/regs/vap_port_data_idx_128.txt new file mode 100644 index 0000000..2b726bc --- /dev/null +++ b/regs/vap_port_data_idx_128.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +DATA_IDX_PORT_128 31:0 0x0 128-bit Data Port for Indexed Primitives. + Write-only. diff --git a/regs/vap_port_idx.txt b/regs/vap_port_idx.txt new file mode 100644 index 0000000..7c0cc7f --- /dev/null +++ b/regs/vap_port_idx.txt @@ -0,0 +1,6 @@ +Field Name Bits Default Description +IDXPORT0 31:0 0x0 1st of 16 consecutive dwords for writing vertex index + information, in the format of: + 15:0 Index 0 + 31:16 Index 1 + Write-only. diff --git a/regs/vap_prog_stream_cntl.txt b/regs/vap_prog_stream_cntl.txt new file mode 100644 index 0000000..87f1dbb --- /dev/null +++ b/regs/vap_prog_stream_cntl.txt @@ -0,0 +1,48 @@ +Field Name Bits Default Description +DATA_TYPE_0 3:0 0x0 The data type for element 0 + * These data types use the SIGNED and NORMALIZE flags described below. + POSSIBLE VALUES: + 00 - FLOAT_1 (Single IEEE Float) + 01 - FLOAT_2 (2 IEEE floats) + 02 - FLOAT_3 (3 IEEE Floats) + 03 - FLOAT_4 (4 IEEE Floats) + 04 - BYTE * (1 DWORD w 4 8-bit fixed point values) (X = [7:0], Y = [15:8], Z = [23:16], W = [31:24]) + 05 - D3DCOLOR * (Same as BYTE except has X->Z,Z->X swap for D3D color def) (Z = [7:0], Y = [15:8], X = [23:16], W = [31:24]) + 06 - SHORT_2 * (1 DWORD with 2 16-bit fixed point values) (X = [15:0], Y = [31:16], Z = 0.0, W = 1.0) + 07 - SHORT_4 * (2 DWORDS with 4(2 per dword) 16-bit fixed point values) (X = DW0 [15:0], Y = DW0 [31:16], Z = DW1 [15:0], W = DW1 [31:16]) + 08 - VECTOR_3_TTT * (1 DWORD with 3 10-bit fixed point values) (X = [9:0], Y = [19:10], Z = [29:20], W = 1.0) + 09 - VECTOR_3_EET * (1 DWORD with 2 11-bit and 1 10-bit fixed point values) (X = [10:0], Y = [21:11], Z = [31:22], W = 1.0) + 10 - FLOAT_8 (8 IEEE Floats) Sames as 2 FLOAT_4 but must use consecutive DST_VEC_LOC. Used to allow > 16 PSC for OGL path. + 11 - FLT16_2 (1 DWORD with 2 16-bit floating point values (SE5M10 exp bias of 15, supports denormalized numbers)) (X = [15:0], Y = [31:16], Z = 0.0, W = 1.0) + 12 - FLT16_4 (2 DWORDS with 4(2 per dword) 16-bit floating point values (SE5M10 exp bias of 15, supports denormalized numbers))) (X = DW0 [15:0], Y = DW0 [31:16], Z = DW1 [15:0], W = DW1 [31:16]) +SKIP_DWORDS_0 7:4 0x0 The number of DWORDS to skip (discard) after + processing the current element. +DST_VEC_LOC_0 12:8 0x0 The vector address in the input memory to write this + element +LAST_VEC_0 13 0x0 If set, indicates the last vector of the current vertex + stream +SIGNED_0 14 0x0 Determines whether fixed point data types are unsigned + (0) or 2`s complement signed (1) data types. See + NORMALIZE for complete description of affect +NORMALIZE_0 15 0x0 Determines whether the fixed to floating point + conversion will normalize the value (i.e. fixed point + value is all fractional bits) or not (i.e. fixed point value is + all integer bits). + This table describes the fixed to float conversion results + SIGNED NORMALIZE FLT RANGE + 0 0 0.0 - (2^n - 1) (i.e. 8-bit -> 0.0 - 255.0) + 0 1 0.0 - 1.0 + 1 0 -2^(n-1) - (2^(n-1) - 1) (i.e. 8-bit -> -128.0 - 127.0) + 1 1 -1.0 - 1.0 + where n is the number of bits in the associated fixed + point value + For signed, normalize conversion, since the fixed point + range is not evenly distributed around 0, there are 3 + different methods supported by R300. See the + VAP_PSC_SGN_NORM_CNTL description for details. +DATA_TYPE_1 19:16 0x0 Similar to DATA_TYPE_0 +SKIP_DWORDS_1 23:20 0x0 See SKIP_DWORDS_0 +DST_VEC_LOC_1 28:24 0x0 See DST_VEC_LOC_0 +LAST_VEC_1 29 0x0 See LAST_VEC_0 +SIGNED_1 30 0x0 See SIGNED_0 +NORMALIZE_1 31 0x0 See NORMALIZE_0 diff --git a/regs/vap_prog_stream_cntl_ext.txt b/regs/vap_prog_stream_cntl_ext.txt new file mode 100644 index 0000000..6633556 --- /dev/null +++ b/regs/vap_prog_stream_cntl_ext.txt @@ -0,0 +1,75 @@ +Field Name Bits Default Description +SWIZZLE_SELECT_X_0 2:0 0x0 X-Component Swizzle Select + POSSIBLE VALUES: + 00 - SELECT_X + 01 - SELECT_Y + 02 - SELECT_Z + 03 - SELECT_W + 04 - SELECT_FP_ZERO (Floating Point 0.0) + 05 - SELECT_FP_ONE (Floating Point 1.0) +SWIZZLE_SELECT_Y_0 5:3 0x0 Y-Component Swizzle Select + POSSIBLE VALUES: + 00 - SELECT_X + 01 - SELECT_Y + 02 - SELECT_Z + 03 - SELECT_W + 04 - SELECT_FP_ZERO (Floating Point 0.0) + 05 - SELECT_FP_ONE (Floating Point 1.0) +SWIZZLE_SELECT_Z_0 8:6 0x0 Z-Component Swizzle Select + POSSIBLE VALUES: + 00 - SELECT_X + 01 - SELECT_Y + 02 - SELECT_Z + 03 - SELECT_W + 04 - SELECT_FP_ZERO (Floating Point 0.0) + 05 - SELECT_FP_ONE (Floating Point 1.0) +SWIZZLE_SELECT_W_0 11:9 0x0 W-Component Swizzle Select + POSSIBLE VALUES: + 00 - SELECT_X + 01 - SELECT_Y + 02 - SELECT_Z + 03 - SELECT_W + 04 - SELECT_FP_ZERO (Floating Point 0.0) + 05 - SELECT_FP_ONE (Floating Point 1.0) +WRITE_ENA_0 15:12 0x0 4-bit write enable. + Bit 0 maps to X + Bit 1 maps to Y + Bit 2 maps to Z + Bit 3 maps to W +SWIZZLE_SELECT_X_1 18:16 0x0 X-Component Swizzle Select + POSSIBLE VALUES: + 00 - SELECT_X + 01 - SELECT_Y + 02 - SELECT_Z + 03 - SELECT_W + 04 - SELECT_FP_ZERO (Floating Point 0.0) + 05 - SELECT_FP_ONE (Floating Point 1.0) +SWIZZLE_SELECT_Y_1 21:19 0x0 Y-Component Swizzle Select + POSSIBLE VALUES: + 00 - SELECT_X + 01 - SELECT_Y + 02 - SELECT_Z + 03 - SELECT_W + 04 - SELECT_FP_ZERO (Floating Point 0.0) + 05 - SELECT_FP_ONE (Floating Point 1.0) +SWIZZLE_SELECT_Z_1 24:22 0x0 Z-Component Swizzle Select + POSSIBLE VALUES: + 00 - SELECT_X + 01 - SELECT_Y + 02 - SELECT_Z + 03 - SELECT_W + 04 - SELECT_FP_ZERO (Floating Point 0.0) + 05 - SELECT_FP_ONE (Floating Point 1.0) +SWIZZLE_SELECT_W_1 27:25 0x0 W-Component Swizzle Select + POSSIBLE VALUES: + 00 - SELECT_X + 01 - SELECT_Y + 02 - SELECT_Z + 03 - SELECT_W + 04 - SELECT_FP_ZERO (Floating Point 0.0) + 05 - SELECT_FP_ONE (Floating Point 1.0) +WRITE_ENA_1 31:28 0x0 4-bit write enable. + Bit 0 maps to X + Bit 1 maps to Y + Bit 2 maps to Z + Bit 3 maps to W diff --git a/regs/vap_psc_sgn_norm_cntl.txt b/regs/vap_psc_sgn_norm_cntl.txt new file mode 100644 index 0000000..42cc6be --- /dev/null +++ b/regs/vap_psc_sgn_norm_cntl.txt @@ -0,0 +1,27 @@ +Field Name Bits Default Description +SGN_NORM_METHOD_0 1:0 0x0 There are 3 methods of normalizing signed numbers: + 0: SGN_NORM_ZERO : value / (2^(n-1)-1), so - + 128/127 will be less that -1.0, -127/127 will yeild -1.0, + 0/127 will yield 0, and 127/127 will yield 1.0 for 8-bit + numbers. + 1: SGN_NORM_ZERO_CLAMP_MINUS_ONE: Same + as SGN_NORM_ZERO except -128/127 will yield -1.0 + for 8-bit numbers. + 2: SGN_NORM_NO_ZERO: (2 * value + 1)/2^n, so - + 128 will yield -255/255 = -1.0, 127 will yield 255/255 = + 1.0, but 0 will yield 1/255 != 0. +SGN_NORM_METHOD_1 3:2 0x0 See SGN_NORM_METHOD_0 +SGN_NORM_METHOD_2 5:4 0x0 See SGN_NORM_METHOD_0 +SGN_NORM_METHOD_3 7:6 0x0 See SGN_NORM_METHOD_0 +SGN_NORM_METHOD_4 9:8 0x0 See SGN_NORM_METHOD_0 +SGN_NORM_METHOD_5 11:10 0x0 See SGN_NORM_METHOD_0 +SGN_NORM_METHOD_6 13:12 0x0 See SGN_NORM_METHOD_0 +SGN_NORM_METHOD_7 15:14 0x0 See SGN_NORM_METHOD_0 +SGN_NORM_METHOD_8 17:16 0x0 See SGN_NORM_METHOD_0 +SGN_NORM_METHOD_9 19:18 0x0 See SGN_NORM_METHOD_0 +SGN_NORM_METHOD_10 21:20 0x0 See SGN_NORM_METHOD_0 +SGN_NORM_METHOD_11 23:22 0x0 See SGN_NORM_METHOD_0 +SGN_NORM_METHOD_12 25:24 0x0 See SGN_NORM_METHOD_0 +SGN_NORM_METHOD_13 27:26 0x0 See SGN_NORM_METHOD_0 +SGN_NORM_METHOD_14 29:28 0x0 See SGN_NORM_METHOD_0 +SGN_NORM_METHOD_15 31:30 0x0 See SGN_NORM_METHOD_0 diff --git a/regs/vap_pvs_code_cntl_0.txt b/regs/vap_pvs_code_cntl_0.txt new file mode 100644 index 0000000..dba00e6 --- /dev/null +++ b/regs/vap_pvs_code_cntl_0.txt @@ -0,0 +1,8 @@ +Field Name Bits Default Description +PVS_FIRST_INST 9:0 0x0 First Instruction to Execute in PVS. +PVS_XYZW_VALID_INST 19:10 0x0 The PVS Instruction which updates the clip coordinate + position for the last time. This value is used to lower the + processing priority while trivial clip and back-face + culling decisions are made. This field must be set to valid + instruction. +PVS_LAST_INST 29:20 0x0 Last Instruction (Inclusive) for the PVS to execute. diff --git a/regs/vap_pvs_code_cntl_1.txt b/regs/vap_pvs_code_cntl_1.txt new file mode 100644 index 0000000..6674fa4 --- /dev/null +++ b/regs/vap_pvs_code_cntl_1.txt @@ -0,0 +1,5 @@ +Field Name Bits Default Description +PVS_LAST_VTX_SRC_INST 9:0 0x0 The PVS Instruction which uses the Input Vertex + Memory for the last time. This value is used to free up + the Input Vertex Slots ASAP. This field must be set to a + valid instruction. diff --git a/regs/vap_pvs_const_cntl.txt b/regs/vap_pvs_const_cntl.txt new file mode 100644 index 0000000..a5d5845 --- /dev/null +++ b/regs/vap_pvs_const_cntl.txt @@ -0,0 +1,8 @@ +Field Name Bits Default Description +PVS_CONST_BASE_OFFSET 7:0 0x0 Vector Offset into PVS constant memory to the start of + the constants for the current shader +PVS_MAX_CONST_ADDR 23:16 0x0 The maximum constant address which should be + generated by the shader (Inst Const Addr + Addr + Register). If the address which is generated by the shader + is outside the range of 0 to PVS_MAX_CONST_ADDR, + then (0,0,0,0) is returned as the source operand data. diff --git a/regs/vap_pvs_flow_cntl_addrs.txt b/regs/vap_pvs_flow_cntl_addrs.txt new file mode 100644 index 0000000..f7bfb5a --- /dev/null +++ b/regs/vap_pvs_flow_cntl_addrs.txt @@ -0,0 +1,24 @@ +Field Name Bits Default Description +PVS_FC_ACT_ADRS_0 7:0 0x0 This field defines the last PVS instruction to execute + prior to the control flow redirection. + JUMP - The last instruction executed prior to the jump + LOOP - The last instruction executed prior to the loop + (init loop counter/inc) + JSR - The last instruction executed prior to the jump to + the subroutine. +PVS_FC_LOOP_CNT_JMP_INST_0 15:8 0x0 This field has multiple definitions as follows: + JUMP - The instruction address to jump to. + LOOP - The loop count. *Note loop count of 0 must be + replaced by a jump. + JSR - The instruction address to jump to (first inst of + subroutine). +PVS_FC_LAST_INST_0 23:16 0x0 This field has multiple definitions as follows: + JUMP - Not Applicable + LOOP - The last instruction of the loop. + JSR - The last instruction of the subroutine. +PVS_FC_RTN_INST_0 31:24 0x0 This field has multiple definitions as follows: + JUMP - Not Applicable + LOOP - First Instruction of Loop (Typically + ACT_ADRS + 1) + JSR - First Instruction After JSR (Typically + ACT_ADRS + 1) diff --git a/regs/vap_pvs_flow_cntl_addrs_lw.txt b/regs/vap_pvs_flow_cntl_addrs_lw.txt new file mode 100644 index 0000000..06eac80 --- /dev/null +++ b/regs/vap_pvs_flow_cntl_addrs_lw.txt @@ -0,0 +1,16 @@ +Field Name Bits Default Description +PVS_FC_ACT_ADRS_0 15:0 0x0 This field defines the last PVS instruction to execute + prior to the control flow redirection. + JUMP - The last instruction executed prior to the jump + LOOP - The last instruction executed prior to the loop + (init loop counter/inc) + JSR - The last instruction executed prior to the jump to + the subroutine. + (Addrss_Range:1K=[9:0];512=[8:0];256=[7:0]) +PVS_FC_LOOP_CNT_JMP_INST_0 31:16 0x0 This field has multiple definitions as follows: + JUMP - The instruction address to jump to. + LOOP - The loop count. *Note loop count of 0 must be + replaced by a jump. + JSR - The instruction address to jump to (first inst of + subroutine). + (Addrss_Range:1K=[24:15];512=[23:15];256=[22:15]) diff --git a/regs/vap_pvs_flow_cntl_addrs_uw.txt b/regs/vap_pvs_flow_cntl_addrs_uw.txt new file mode 100644 index 0000000..5013710 --- /dev/null +++ b/regs/vap_pvs_flow_cntl_addrs_uw.txt @@ -0,0 +1,13 @@ +Field Name Bits Default Description +PVS_FC_LAST_INST_0 15:0 0x0 This field has multiple definitions as follows: + JUMP - Not Applicable + LOOP - The last instruction of the loop. + JSR - The last instruction of the subroutine. + (Addrss_Range:1K=[9:0];512=[8:0];256=[7:0]) +PVS_FC_RTN_INST_0 31:16 0x0 This field has multiple definitions as follows: + JUMP - Not Applicable + LOOP - First Instruction of Loop (Typically + ACT_ADRS + 1) + JSR - First Instruction After JSR (Typically ACT_ADRS + + 1). + (Addrss_Range:1K=[24:15];512=[23:15];256=[22:15]) diff --git a/regs/vap_pvs_flow_cntl_loop_index.txt b/regs/vap_pvs_flow_cntl_loop_index.txt new file mode 100644 index 0000000..0c9e3c5 --- /dev/null +++ b/regs/vap_pvs_flow_cntl_loop_index.txt @@ -0,0 +1,15 @@ +Field Name Bits Default Description +PVS_FC_LOOP_INIT_VAL_0 7:0 0x0 This field stores the automatic loop index register init + value. This is an 8-bit unsigned value 0-255. This field + is only used if the corresponding control flow + instruction is a loop. +PVS_FC_LOOP_STEP_VAL_0 15:8 0x0 This field stores the automatic loop index register step + value. This is an 8-bit 2`s comp signed value -128-127. + This field is only used if the corresponding control + flow instruction is a loop. +PVS_FC_LOOP_REPEAT_NO_FLI_0 31 0x0 When this field is set, the automatic loop index register + init value is not used at loop activation. The intial loop + index is inherited from outer loop. The loop index + register step value is used at the end of each loop + iteration ; after loop completion, the outer loop index + register is restored diff --git a/regs/vap_pvs_flow_cntl_opc.txt b/regs/vap_pvs_flow_cntl_opc.txt new file mode 100644 index 0000000..686dcce --- /dev/null +++ b/regs/vap_pvs_flow_cntl_opc.txt @@ -0,0 +1,22 @@ +Field Name Bits Default Description +PVS_FC_OPC_0 1:0 0x0 This opcode field determines what type of control flow + instruction to execute. + 0 = NO_OP + 1 = JUMP + 2 = LOOP + 3 = JSR (Jump to Subroutine) +PVS_FC_OPC_1 3:2 0x0 See PVS_FC_OPC_0. +PVS_FC_OPC_2 5:4 0x0 See PVS_FC_OPC_0. +PVS_FC_OPC_3 7:6 0x0 See PVS_FC_OPC_0. +PVS_FC_OPC_4 9:8 0x0 See PVS_FC_OPC_0. +PVS_FC_OPC_5 11:10 0x0 See PVS_FC_OPC_0. +PVS_FC_OPC_6 13:12 0x0 See PVS_FC_OPC_0. +PVS_FC_OPC_7 15:14 0x0 See PVS_FC_OPC_0. +PVS_FC_OPC_8 17:16 0x0 See PVS_FC_OPC_0. +PVS_FC_OPC_9 19:18 0x0 See PVS_FC_OPC_0. +PVS_FC_OPC_10 21:20 0x0 See PVS_FC_OPC_0. +PVS_FC_OPC_11 23:22 0x0 See PVS_FC_OPC_0. +PVS_FC_OPC_12 25:24 0x0 See PVS_FC_OPC_0. +PVS_FC_OPC_13 27:26 0x0 See PVS_FC_OPC_0. +PVS_FC_OPC_14 29:28 0x0 See PVS_FC_OPC_0. +PVS_FC_OPC_15 31:30 0x0 See PVS_FC_OPC_0. diff --git a/regs/vap_pvs_state_flush_reg.txt b/regs/vap_pvs_state_flush_reg.txt new file mode 100644 index 0000000..7848958 --- /dev/null +++ b/regs/vap_pvs_state_flush_reg.txt @@ -0,0 +1,10 @@ +Field Name Bits Default Description +DATA_REGISTER 31:0 0x0 This register is used to force a flush of the PVS block + when single-buffered updates are performed. The multi- + state control of PVS Code and Const memories by the + driver is primarily for more flexible PVS state control + and for performance testing. When this register address + is written, the State Block will force a flush of PVS + processing so that both versions of PVS state are + available before updates are processed. This register is + write only, and the data that is written is unused. diff --git a/regs/vap_pvs_vector_data_reg.txt b/regs/vap_pvs_vector_data_reg.txt new file mode 100644 index 0000000..a36627d --- /dev/null +++ b/regs/vap_pvs_vector_data_reg.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +DATA_REGISTER 31:0 0x0 32-bit data to write to Vector Memory. Used for PVS + code and Constant updates. diff --git a/regs/vap_pvs_vector_data_reg_128.txt b/regs/vap_pvs_vector_data_reg_128.txt new file mode 100644 index 0000000..249cc98 --- /dev/null +++ b/regs/vap_pvs_vector_data_reg_128.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +DATA_REGISTER 31:0 0x0 128-bit data path to write to Vector Memory. Used for + PVS code and Constant updates. diff --git a/regs/vap_pvs_vector_indx_reg.txt b/regs/vap_pvs_vector_indx_reg.txt new file mode 100644 index 0000000..56cf8a7 --- /dev/null +++ b/regs/vap_pvs_vector_indx_reg.txt @@ -0,0 +1,2 @@ +Field Name Bits Default Description +OCTWORD_OFFSET 10:0 0x0 Octword offset to begin writing. diff --git a/regs/vap_pvs_vtx_timeout_reg.txt b/regs/vap_pvs_vtx_timeout_reg.txt new file mode 100644 index 0000000..082c38f --- /dev/null +++ b/regs/vap_pvs_vtx_timeout_reg.txt @@ -0,0 +1,6 @@ +Field Name Bits Default Description +CLK_COUNT 31:0 0xFFFFFFFF This register is used to define the number of core clocks + to wait for a vertex to be received by the VAP input + controller (while the primitive path is backed up) before + forcing any accumulated vertices to be submitted to the + vertex processing path. diff --git a/regs/vap_tex_to_color_cntl.txt b/regs/vap_tex_to_color_cntl.txt new file mode 100644 index 0000000..1a31e05 --- /dev/null +++ b/regs/vap_tex_to_color_cntl.txt @@ -0,0 +1,25 @@ +Field Name Bits Default Description +TEX_RGB_SHADE_FUNC_0 0 0x0 +TEX_ALPHA_SHADE_FUNC_0 1 0x0 +TEX_RGBA_CLAMP_0 2 0x0 +TEX_RGB_SHADE_FUNC_1 4 0x0 +TEX_ALPHA_SHADE_FUNC_1 5 0x0 +TEX_RGBA_CLAMP_1 6 0x0 +TEX_RGB_SHADE_FUNC_2 8 0x0 +TEX_ALPHA_SHADE_FUNC_2 9 0x0 +TEX_RGBA_CLAMP_2 10 0x0 +TEX_RGB_SHADE_FUNC_3 12 0x0 +TEX_ALPHA_SHADE_FUNC_3 13 0x0 +TEX_RGBA_CLAMP_3 14 0x0 +TEX_RGB_SHADE_FUNC_4 16 0x0 +TEX_ALPHA_SHADE_FUNC_4 17 0x0 +TEX_RGBA_CLAMP_4 18 0x0 +TEX_RGB_SHADE_FUNC_5 20 0x0 +TEX_ALPHA_SHADE_FUNC_5 21 0x0 +TEX_RGBA_CLAMP_5 22 0x0 +TEX_RGB_SHADE_FUNC_6 24 0x0 +TEX_ALPHA_SHADE_FUNC_6 25 0x0 +TEX_RGBA_CLAMP_6 26 0x0 +TEX_RGB_SHADE_FUNC_7 28 0x0 +TEX_ALPHA_SHADE_FUNC_7 29 0x0 +TEX_RGBA_CLAMP_7 30 0x0 diff --git a/regs/vap_vf_cntl.txt b/regs/vap_vf_cntl.txt new file mode 100644 index 0000000..956cfef --- /dev/null +++ b/regs/vap_vf_cntl.txt @@ -0,0 +1,49 @@ +Field Name Bits Default Description +PRIM_TYPE 3:0 0x0 Primitive Type + *Encoding 7 indicates whether a 16-bit word of wFlags + is present in the stream of indices arriving when the + VTX_AMODE is programmed as a `0`. The Setup + Engine just steps over the wFlags word; ignoring it. + 0 = Stream contains just indices, as: + [ Index1, Index0] + [ Index3, Index2] + [ Index5, Index4 ] + etc... + 1 = Stream contains indices and wFlags: + [ Index1, Index0] + [ wFlags,Index 2 ] + [ Index4, Index3] + [ wFlags, Index5 ] + etc... + POSSIBLE VALUES: + 00 - None (will not trigger Setup Engine to run) + 01 - Point List + 02 - Line List + 03 - Line Strip + 04 - Triangle List + 05 - Triangle Fan + 06 - Triangle Strip + 07 - Triangle with wFlags (aka, Rage128 `Type-2` triangles) * + 12 - Line Loop + 13 - Quad List + 14 - Quad Strip + 15 - Polygon +PRIM_WALK 5:4 0x0 Method of Passing Vertex Data. + POSSIBLE VALUES: + 00 - State-Based Vertex Data. (Vertex data and tokens embedded in command stream.) + 01 - Indexes (Indices embedded in command stream; vertex data to be fetched from memory.) + 02 - Vertex List (Vertex data to be fetched from memory.) + 03 - Vertex Data (Vertex data embedded in command stream.) +INDEX_SIZE 11 0x0 When set, vertex indices are 32-bits/indx, otherwise, 16- + bits/indx. +VTX_REUSE_DIS 12 0x0 When set, vertex reuse is disabled. DO NOT SET unless + PRIM_WALK is Indexes. +DUAL_INDEX_MODE 13 0x0 When set, the incoming index is treated as two separate + indices. Bits 23-16 are used as the index for AOS 0 + (These are 0 for 16-bit indices) Bits 15-0 are used as the + index for AOS 1-15. This mode was added specifically + for HOS usage +USE_ALT_NUM_VERTS 14 0x0 When set, the number of vertices in the command packet + is taken from VAP_ALT_NUM_VERTICES register + instead of bits 31:16 of VAP_VF_CNTL +NUM_VERTICES 31:16 0x0 Number of vertices in the command packet. diff --git a/regs/vp_vid_src_addr.txt b/regs/vp_vid_src_addr.txt new file mode 100644 index 0000000..6bf9f1a --- /dev/null +++ b/regs/vp_vid_src_addr.txt @@ -0,0 +1,3 @@ +Field Name Bits Default Description +CP_VID_SRC_ADDR 31:0 none Source address for PIO DMAs to the VID DMA. Only + DWORD access is allowed to this register.