From 3df0aed6bae104f4192ba018f1a2c53694f305c7 Mon Sep 17 00:00:00 2001 From: Zack Buhman Date: Mon, 20 Oct 2025 18:33:13 -0500 Subject: [PATCH] assembler/fs/emitter: set default float addr if unspecified --- regs/assembler/fs/emitter.py | 48 ++++++++++++++---------------------- regs/us_disassemble.py | 9 +++++-- 2 files changed, 25 insertions(+), 32 deletions(-) diff --git a/regs/assembler/fs/emitter.py b/regs/assembler/fs/emitter.py index 47d81a3..d1839eb 100644 --- a/regs/assembler/fs/emitter.py +++ b/regs/assembler/fs/emitter.py @@ -137,38 +137,26 @@ def emit_rgb_op(code, rgb_op): mod_func(code, sel.mod) def emit_addr(code, addr): - if addr.alpha.src0 is not None: - is_const = int(addr.alpha.src0.type is SrcAddrType.const) - is_float = int(addr.alpha.src0.type is SrcAddrType.float) - US_ALU_ALPHA_ADDR.ADDR0(code, (is_float << 7) | addr.alpha.src0.value) - US_ALU_ALPHA_ADDR.ADDR0_CONST(code, is_const) - if addr.alpha.src1 is not None: - is_const = int(addr.alpha.src1.type is SrcAddrType.const) - is_float = int(addr.alpha.src1.type is SrcAddrType.float) - US_ALU_ALPHA_ADDR.ADDR1(code, (is_float << 7) | addr.alpha.src1.value) - US_ALU_ALPHA_ADDR.ADDR1_CONST(code, is_const) - if addr.alpha.src2 is not None: - is_const = int(addr.alpha.src2.type is SrcAddrType.const) - is_float = int(addr.alpha.src2.type is SrcAddrType.float) - US_ALU_ALPHA_ADDR.ADDR2(code, (is_float << 7) | addr.alpha.src2.value) - US_ALU_ALPHA_ADDR.ADDR2_CONST(code, is_const) + srcs = [ + (addr.alpha.src0 , US_ALU_ALPHA_ADDR.ADDR0 , US_ALU_ALPHA_ADDR.ADDR0_CONST), + (addr.alpha.src1 , US_ALU_ALPHA_ADDR.ADDR1 , US_ALU_ALPHA_ADDR.ADDR1_CONST), + (addr.alpha.src2 , US_ALU_ALPHA_ADDR.ADDR2 , US_ALU_ALPHA_ADDR.ADDR2_CONST), + (addr.rgb.src0 , US_ALU_RGB_ADDR.ADDR0 , US_ALU_RGB_ADDR.ADDR0_CONST), + (addr.rgb.src1 , US_ALU_RGB_ADDR.ADDR1 , US_ALU_RGB_ADDR.ADDR1_CONST), + (addr.rgb.src2 , US_ALU_RGB_ADDR.ADDR2 , US_ALU_RGB_ADDR.ADDR2_CONST), + ] + + for src, ADDR, ADDR_CONST in srcs: + if src is not None: + is_const = int(src.type is SrcAddrType.const) + is_float = int(src.type is SrcAddrType.float) + ADDR(code, (is_float << 7) | addr.alpha.src0.value) + ADDR_CONST(code, is_const) + else: + ADDR(code, (1 << 7) | 0) + if addr.alpha.srcp is not None: US_ALU_ALPHA_ADDR.SRCP_OP(code, addr.alpha.srcp.value) - if addr.rgb.src0 is not None: - is_const = int(addr.rgb.src0.type is SrcAddrType.const) - is_float = int(addr.rgb.src0.type is SrcAddrType.float) - US_ALU_RGB_ADDR.ADDR0(code, (is_float << 7) | addr.rgb.src0.value) - US_ALU_RGB_ADDR.ADDR0_CONST(code, is_const) - if addr.rgb.src1 is not None: - is_const = int(addr.rgb.src1.type is SrcAddrType.const) - is_float = int(addr.rgb.src1.type is SrcAddrType.float) - US_ALU_RGB_ADDR.ADDR1(code, (is_float << 7) | addr.rgb.src1.value) - US_ALU_RGB_ADDR.ADDR1_CONST(code, is_const) - if addr.rgb.src2 is not None: - is_const = int(addr.rgb.src2.type is SrcAddrType.const) - is_float = int(addr.rgb.src2.type is SrcAddrType.float) - US_ALU_RGB_ADDR.ADDR2(code, (is_float << 7) | addr.rgb.src2.value) - US_ALU_RGB_ADDR.ADDR2_CONST(code, is_const) if addr.rgb.srcp is not None: US_ALU_RGB_ADDR.SRCP_OP(code, addr.rgb.srcp.value) diff --git a/regs/us_disassemble.py b/regs/us_disassemble.py index 652176d..61895c8 100644 --- a/regs/us_disassemble.py +++ b/regs/us_disassemble.py @@ -101,8 +101,7 @@ def disassemble(code, ix): field_pv_name = get_field_pv_name(value, d) yield ' '.join([d.field_name.ljust(max_length), f"{field_pv_name}"]) - def inner(register_name_list): - + def inner_columns(register_name_list): columns = [] for i, register_name in enumerate(register_name_list): columns.append(list(inner2(i, register_name))) @@ -124,6 +123,12 @@ def disassemble(code, ix): ]) print(" ", row) + def inner_rows(register_name_list): + for i, register_name in enumerate(register_name_list): + print('\n'.join(inner2(i, register_name))) + + inner = inner_rows + inst_type = get_field_pv_name(us_cmn_inst, US_CMN_INST["TYPE"]) if inst_type in {"US_INST_TYPE_OUT", "US_INST_TYPE_ALU"}: inner(alu_output)