regs/us_disassemble: read input from file

This commit is contained in:
Zack Buhman 2025-10-16 21:52:36 -05:00
parent 4fb8b47231
commit 3a0521b76b
2 changed files with 24 additions and 31 deletions

View File

@ -1,5 +1,5 @@
import sys
import parse_bits
from pprint import pprint
from collections import OrderedDict
from os import path
@ -55,34 +55,6 @@ def parse_registers():
registers = dict(parse_registers())
US_CMN_INST = registers["US_CMN_INST"]
code = [
0x00078005,
0x08020080,
0x08020080,
0x1c9b04d8,
0x1c810003,
0x00000005,
]
# DCL IN[0].xyz, GENERIC[0], PERSPECTIVE
# DCL OUT[0], COLOR
# IMM[0] FLT32 { 1.0000, 0.0000, 0.0000, 0.0000}
# 0: MOV OUT[0].xyz, IN[0].xyzx
# 1: MOV OUT[0].w, IMM[0].xxxx
# 2: END
# Radeon Compiler Program
# 0: src0.xyz = input[0]
# MAX color[0].xyz (OMOD DISABLE), src0.xyz, src0.xyz
# MAX color[0].w (OMOD DISABLE), src0.1, src0.1
code = [
0x00078005,
0x08020000,
0x08020080,
0x1c440220,
0x1cc18003,
0x00000005,
]
def get_field(n, descriptor):
if type(descriptor.bits) is int:
return (n >> descriptor.bits) & 1
@ -117,8 +89,11 @@ def disassemble(code, ix):
def inner(register_name_list):
for i, register_name in enumerate(register_name_list):
value = code[ix + i]
register = registers[register_name]
print(" ", f"{value:08x}", register_name)
if register_name == 0:
assert value == 0
continue
register = registers[register_name]
for d in register.values():
field_pv_name = get_field_pv_name(value, d)
print(" ", d.field_name.ljust(max_length), field_pv_name)
@ -133,4 +108,14 @@ def disassemble(code, ix):
else:
assert False, inst_type
disassemble(code, 0)
def parse_hex(s):
assert s.startswith('0x')
return int(s.removeprefix('0x'), 16)
if __name__ == "__main__":
filename = sys.argv[1]
with open(filename) as f:
buf = f.read()
code = [parse_hex(c.strip()) for c in buf.split(',') if c.strip()]
for i in range(len(code) // 6):
disassemble(code, i * 6)

View File

@ -0,0 +1,8 @@
0x00302203,
0x01f90021,
0x01248021,
0x01248021,
0x00f00203,
0x01510001,
0x01248001,
0x01248001,