From 3213edda43e416c9ce18fc914d441d82e6fc8600 Mon Sep 17 00:00:00 2001
From: Zack Buhman <zack@buhman.org>
Date: Tue, 21 Oct 2025 11:41:54 -0500
Subject: [PATCH] drm: add shadertoy_sin.fs.asm

---
 drm/shadertoy.c                               |  2 +-
 drm/shadertoy_sin.fs.asm                      | 22 ++++++++
 drm/shadertoy_sin.fs.inc                      | 42 ++++++++++++++
 regs/us_disassemble2.py                       | 13 +++--
 .../mesa/shadertoy_circle_sin.fs.txt          | 48 ++++++++++++++++
 .../mesa/shadertoy_circle_smoothstep.fs.txt   | 55 +++++++++++++++++++
 6 files changed, 175 insertions(+), 7 deletions(-)
 create mode 100644 drm/shadertoy_sin.fs.asm
 create mode 100644 drm/shadertoy_sin.fs.inc
 create mode 100644 shader_examples/mesa/shadertoy_circle_sin.fs.txt
 create mode 100644 shader_examples/mesa/shadertoy_circle_smoothstep.fs.txt

diff --git a/drm/shadertoy.c b/drm/shadertoy.c
index b34b60c..0572446 100644
--- a/drm/shadertoy.c
+++ b/drm/shadertoy.c
@@ -452,7 +452,7 @@ int indirect_buffer()
   // fragment code
 
   const uint32_t fragment_shader[] = {
-    #include "shadertoy_circle.fs.inc"
+    #include "shadertoy_sin.fs.inc"
   };
   const int fragment_shader_length = (sizeof (fragment_shader)) / (sizeof (fragment_shader[0]));
   assert(fragment_shader_length % 6 == 0);
diff --git a/drm/shadertoy_sin.fs.asm b/drm/shadertoy_sin.fs.asm
new file mode 100644
index 0000000..7465d34
--- /dev/null
+++ b/drm/shadertoy_sin.fs.asm
@@ -0,0 +1,22 @@
+# d = length(uv)
+src0.rgb = temp[0] :
+  temp[0].r    = DP3 src0.rg0 src0.rg0 ;
+src0.rgb = temp[0] :
+  temp[0].a    = RSQ |src0.r| ;
+src0.a   = temp[0] :
+  temp[0].a    = RCP src0.a ;
+
+# d = d * 1.625 + 0
+src0.a = temp[0],
+src1.a = float(61) : # 1.625
+  temp[0].a    = MAD src0.a src1.a src0.0 ;
+
+# d = frc(d)
+src0.a = temp[0] :
+  temp[0].a    = FRC src0.a ;
+
+# d = cos(d * 2π)
+OUT TEX_SEM_WAIT
+src0.a = temp[0] :
+                 COS src0.a ,
+  out[0].rgb   = SOP ;
diff --git a/drm/shadertoy_sin.fs.inc b/drm/shadertoy_sin.fs.inc
new file mode 100644
index 0000000..014fb8c
--- /dev/null
+++ b/drm/shadertoy_sin.fs.inc
@@ -0,0 +1,42 @@
+0x00000800,
+0x08020000,
+0x08020080,
+0x00840420,
+0x00000000,
+0x00000001,
+
+0x00004000,
+0x08020000,
+0x08020080,
+0x00000000,
+0x0004000b,
+0x00000000,
+
+0x00004000,
+0x08020080,
+0x08020000,
+0x00000000,
+0x0000c00a,
+0x00000000,
+
+0x00004000,
+0x08020080,
+0x0802f400,
+0x00000000,
+0x0068c000,
+0x20000000,
+
+0x00004000,
+0x08020080,
+0x08020000,
+0x00000000,
+0x0000c007,
+0x00000000,
+
+0x00038005,
+0x08020080,
+0x08020000,
+0x00000000,
+0x0000c00d,
+0x0000000a,
+
diff --git a/regs/us_disassemble2.py b/regs/us_disassemble2.py
index 60b11fe..b2d7344 100644
--- a/regs/us_disassemble2.py
+++ b/regs/us_disassemble2.py
@@ -228,10 +228,6 @@ def assert_zeros(code):
     assert nop == 0
     alu_wait = US_CMN_INST.ALU_WAIT(code)
     assert alu_wait == 0
-    rgb_clamp = US_CMN_INST.RGB_CLAMP(code)
-    assert rgb_clamp == 0
-    alpha_clamp = US_CMN_INST.ALPHA_CLAMP(code)
-    assert alpha_clamp == 0
     alu_result_sel = US_CMN_INST.ALU_RESULT_SEL(code)
     assert alu_result_sel == 0
     alpha_pred_inv = US_CMN_INST.ALPHA_PRED_INV(code)
@@ -334,12 +330,17 @@ def disassemble_alu(code, is_output):
         a_addr_strs = [s for i, s in enumerate(a_addr_strs) if i in a_sources]
         rgb_addr_strs = [s for i, s in enumerate(rgb_addr_strs) if i in rgb_sources]
 
+    rgb_clamp = US_CMN_INST.RGB_CLAMP(code)
+    alpha_clamp = US_CMN_INST.ALPHA_CLAMP(code)
+    rgb_clamp_str = ".CLAMP" if rgb_clamp != 0 else ""
+    a_clamp_str = ".CLAMP" if alpha_clamp != 0 else ""
+
     print(", ".join([*a_addr_strs, *rgb_addr_strs]), ":")
     #print(", ".join(a_addr_strs), ":")
-    print(f"  {a_out_str} = {a_temp_str} = {a_op.removeprefix('OP_').ljust(3)} {' '.join(a_swizzle_sel)}", ",")
+    print(f"  {a_out_str} = {a_temp_str} = {a_op.removeprefix('OP_').ljust(3)}{a_clamp_str} {' '.join(a_swizzle_sel)}", ",")
 
     #print(", ".join(rgb_addr_strs), ":")
-    print(f"  {rgb_out_str} = {rgb_temp_str} = {rgb_op.removeprefix('OP_').ljust(3)} {' '.join(rgb_swizzle_sel)}", ";")
+    print(f"  {rgb_out_str} = {rgb_temp_str} = {rgb_op.removeprefix('OP_').ljust(3)}{rgb_clamp_str} {' '.join(rgb_swizzle_sel)}", ";")
 
 def disassemble(code):
     assert len(code) == 6, len(code)
diff --git a/shader_examples/mesa/shadertoy_circle_sin.fs.txt b/shader_examples/mesa/shadertoy_circle_sin.fs.txt
new file mode 100644
index 0000000..457823b
--- /dev/null
+++ b/shader_examples/mesa/shadertoy_circle_sin.fs.txt
@@ -0,0 +1,48 @@
+0x00000800,
+0x08020000,
+0x08020080,
+0x00840420,
+0x00000000,
+0x00000001,
+
+0x00004000,
+0x08020000,
+0x08020080,
+0x00000000,
+0x0004000b,
+0x00000000,
+
+0x00004000,
+0x08020080,
+0x08020000,
+0x00000000,
+0x0000c00a,
+0x00000000,
+
+0x00000800,
+0x08020100,
+0x08020000,
+0x00918480,
+0x00000000,
+0x00490000,
+
+0x00000800,
+0x08020000,
+0x08020080,
+0x00000480,
+0x00000000,
+0x00000009,
+
+0x00008001,
+0x08020000,
+0x08020080,
+0x00000000,
+0x0000000d,
+0x0000000a,
+
+0x00070005,
+0x08020080,
+0x08020080,
+0x1c920490,
+0x1cc18003,
+0x00000005,
diff --git a/shader_examples/mesa/shadertoy_circle_smoothstep.fs.txt b/shader_examples/mesa/shadertoy_circle_smoothstep.fs.txt
new file mode 100644
index 0000000..8f23ca3
--- /dev/null
+++ b/shader_examples/mesa/shadertoy_circle_smoothstep.fs.txt
@@ -0,0 +1,55 @@
+0x00000800,
+0x08020000,
+0x08020080,
+0x00840420,
+0x00000000,
+0x00000001,
+
+0x00004000,
+0x08020000,
+0x08020080,
+0x00000000,
+0x0004000b,
+0x00000000,
+
+0x00004000,
+0x08020080,
+0x08020000,
+0x00000000,
+0x0000c00a,
+0x00000000,
+
+0x00000800,
+0x08020080,
+0x08020000,
+0x0093048c,
+0x00000000,
+0x00c94000,
+
+0x00080800,
+0x08020000,
+0x080200d2,
+0x00919480,
+0x00000000,
+0x00490000,
+
+0x00001000,
+0x08020000,
+0x080310c0,
+0x00820c70,
+0x00000000,
+0x00471000,
+
+0x00001000,
+0x08000000,
+0x08020080,
+0x00862410,
+0x00000000,
+0x00490000,
+
+0x00078005,
+0x08000000,
+0x08020080,
+0x0024a000,
+0x1cc18003,
+0x00490000,