#pragma once

#define CP_CSQ2_STAT__CSQ_WPTR_INDIRECT(n) (((n) & 0x3ff) << 0)
#define CP_CSQ2_STAT__CSQ_RPTR_INDIRECT2(n) (((n) & 0x3ff) << 10)
#define CP_CSQ2_STAT__CSQ_WPTR_INDIRECT2(n) (((n) & 0x3ff) << 20)
#define CP_CSQ_ADDR__CSQ_ADDR(n) (((n) & 0x3ff) << 2)
#define CP_CSQ_APER_INDIRECT__CP_CSQ_APER_INDIRECT(n) (((n) & 0xffffffff) << 0)
#define CP_CSQ_APER_INDIRECT2__CP_CSQ_APER_INDIRECT2(n) (((n) & 0xffffffff) << 0)
#define CP_CSQ_APER_PRIMARY__CP_CSQ_APER_PRIMARY(n) (((n) & 0xffffffff) << 0)
#define CP_CSQ_AVAIL__CSQ_CNT_PRIMARY(n) (((n) & 0x3ff) << 0)
#define CP_CSQ_AVAIL__CSQ_CNT_INDIRECT(n) (((n) & 0x3ff) << 10)
#define CP_CSQ_AVAIL__CSQ_CNT_INDIRECT2(n) (((n) & 0x3ff) << 20)
#define CP_CSQ_CNTL__CSQ_MODE(n) (((n) & 0xf) << 28)
#define CP_CSQ_DATA__CSQ_DATA(n) (((n) & 0xffffffff) << 0)
#define CP_CSQ_MODE__INDIRECT2_START(n) (((n) & 0x7f) << 0)
#define CP_CSQ_MODE__INDIRECT1_START(n) (((n) & 0x7f) << 8)
#define CP_CSQ_MODE__INDIRECT1_START__PIO (0x0 << 8)
#define CP_CSQ_MODE__INDIRECT1_START__BM (0x1 << 8)
#define CP_CSQ_MODE__CSQ_INDIRECT2_ENABLE(n) (((n) & 0x1) << 27)
#define CP_CSQ_MODE__CSQ_INDIRECT2_ENABLE__PIO (0x0 << 27)
#define CP_CSQ_MODE__CSQ_INDIRECT2_ENABLE__BM (0x1 << 27)
#define CP_CSQ_MODE__CSQ_INDIRECT1_ENABLE(n) (((n) & 0x1) << 29)
#define CP_CSQ_MODE__CSQ_INDIRECT1_ENABLE__PIO (0x0 << 29)
#define CP_CSQ_MODE__CSQ_INDIRECT1_ENABLE__BM (0x1 << 29)
#define CP_CSQ_MODE__CSQ_PRIMARY_ENABLE(n) (((n) & 0x1) << 31)
#define CP_CSQ_STAT__CSQ_RPTR_PRIMARY(n) (((n) & 0x3ff) << 0)
#define CP_CSQ_STAT__CSQ_WPTR_PRIMARY(n) (((n) & 0x3ff) << 10)
#define CP_CSQ_STAT__CSQ_RPTR_INDIRECT(n) (((n) & 0x3ff) << 20)
#define CP_GUI_COMMAND__CP_GUI_COMMAND(n) (((n) & 0xffffffff) << 0)
#define CP_GUI_DST_ADDR__CP_GUI_DST_ADDR(n) (((n) & 0xffffffff) << 0)
#define CP_GUI_SRC_ADDR__CP_GUI_SRC_ADDR(n) (((n) & 0xffffffff) << 0)
#define CP_IB2_BASE__IB2_BASE(n) (((n) & 0x3fffffff) << 2)
#define CP_IB2_BUFZ__IB2_BUFSZ(n) (((n) & 0x7fffff) << 0)
#define CP_IB_BASE__IB_BASE(n) (((n) & 0x3fffffff) << 2)
#define CP_IB_BUFSZ__IB_BUFSZ(n) (((n) & 0x7fffff) << 0)
#define CP_ME_CNTL__ME_STAT(n) (((n) & 0xffff) << 0)
#define CP_ME_CNTL__ME_STATMUX(n) (((n) & 0x1f) << 16)
#define CP_ME_CNTL__ME_BUSY(n) (((n) & 0x1) << 29)
#define CP_ME_CNTL__ME_MODE(n) (((n) & 0x1) << 30)
#define CP_ME_CNTL__ME_STEP(n) (((n) & 0x1) << 31)
#define CP_ME_RAM_ADDR__ME_RAM_ADDR(n) (((n) & 0xff) << 0)
#define CP_ME_RAM_DATAH__ME_RAM_DATAH(n) (((n) & 0xff) << 0)
#define CP_ME_RAM_DATAL__ME_RAM_DATAL(n) (((n) & 0xffffffff) << 0)
#define CP_ME_RAM_RADDR__ME_RAM_RADDR(n) (((n) & 0xff) << 0)
#define CP_RB_BASE__RB_BASE(n) (((n) & 0x3fffffff) << 2)
#define CP_RB_CNTL__RB_BUFSZ(n) (((n) & 0x3f) << 0)
#define CP_RB_CNTL__RB_BLKSZ(n) (((n) & 0x3f) << 8)
#define CP_RB_CNTL__BUF_SWAP(n) (((n) & 0x3) << 16)
#define CP_RB_CNTL__MAX_FETCH(n) (((n) & 0x3) << 18)
#define CP_RB_CNTL__RB_NO_UPDATE(n) (((n) & 0x1) << 27)
#define CP_RB_CNTL__RB_RPTR_WR_ENA(n) (((n) & 0x1) << 31)
#define CP_RB_RPTR__RB_RPTR(n) (((n) & 0x7fffff) << 0)
#define CP_RB_RPTR_ADDR__RB_RPTR_SWAP(n) (((n) & 0x3) << 0)
#define CP_RB_RPTR_ADDR__RB_RPTR_ADDR(n) (((n) & 0x3fffffff) << 2)
#define CP_RB_RPTR_WR__RB_RPTR_WR(n) (((n) & 0x7fffff) << 0)
#define CP_RB_WPTR__RB_WPTR(n) (((n) & 0x7fffff) << 0)
#define CP_RB_WPTR_DELAY__PRE_WRITE_TIMER(n) (((n) & 0xfffffff) << 0)
#define CP_RB_WPTR_DELAY__PRE_WRITE_LIMIT(n) (((n) & 0xf) << 28)
#define CP_RESYNC_ADDR__RESYNC_ADDR(n) (((n) & 0x7) << 0)
#define CP_RESYNC_DATA__RESYNC_DATA(n) (((n) & 0xffffffff) << 0)
#define CP_STAT__MRU_BUSY(n) (((n) & 0x1) << 0)
#define CP_STAT__MWU_BUSY(n) (((n) & 0x1) << 1)
#define CP_STAT__RSIU_BUSY(n) (((n) & 0x1) << 2)
#define CP_STAT__RCIU_BUSY(n) (((n) & 0x1) << 3)
#define CP_STAT__CSF_PRIMARY_BUSY(n) (((n) & 0x1) << 9)
#define CP_STAT__CSF_INDIRECT_BUSY(n) (((n) & 0x1) << 10)
#define CP_STAT__CSQ_PRIMARY_BUSY(n) (((n) & 0x1) << 11)
#define CP_STAT__CSQ_INDIRECT_BUSY(n) (((n) & 0x1) << 12)
#define CP_STAT__CSI_BUSY(n) (((n) & 0x1) << 13)
#define CP_STAT__CSF_INDIRECT2_BUSY(n) (((n) & 0x1) << 14)
#define CP_STAT__CSQ_INDIRECT2_BUSY(n) (((n) & 0x1) << 15)
#define CP_STAT__GUIDMA_BUSY(n) (((n) & 0x1) << 28)
#define CP_STAT__VIDDMA_BUSY(n) (((n) & 0x1) << 29)
#define CP_STAT__CMDSTRM_BUSY(n) (((n) & 0x1) << 30)
#define CP_STAT__CP_BUSY(n) (((n) & 0x1) << 31)
#define CP_VID_ADDR_CNTL__SCRATCH_ALT_VP_WR(n) (((n) & 0x1) << 0)
#define CP_VID_ADDR_CNTL__SCRATCH_VP_WR(n) (((n) & 0x1) << 1)
#define CP_VID_ADDR_CNTL__RPTR_VP_UPDATE(n) (((n) & 0x1) << 2)
#define CP_VID_ADDR_CNTL__VIDDMA_VP_WR(n) (((n) & 0x1) << 3)
#define CP_VID_ADDR_CNTL__VIDDMA_VP_RD(n) (((n) & 0x1) << 4)
#define CP_VID_ADDR_CNTL__GUIDMA_VP_WR(n) (((n) & 0x1) << 5)
#define CP_VID_ADDR_CNTL__GUIDMA_VP_RD(n) (((n) & 0x1) << 6)
#define CP_VID_ADDR_CNTL__INDR2_VP_FETCH(n) (((n) & 0x1) << 7)
#define CP_VID_ADDR_CNTL__INDR1_VP_FETCH(n) (((n) & 0x1) << 8)
#define CP_VID_ADDR_CNTL__RING_VP_FETCH(n) (((n) & 0x1) << 9)
#define CP_VID_COMMAND__CP_VID_COMMAND(n) (((n) & 0xffffffff) << 0)
#define CP_VID_DST_ADDR__CP_VID_DST_ADDR(n) (((n) & 0xffffffff) << 0)
#define CP_VID_SRC_ADDR__CP_VID_SRC_ADDR(n) (((n) & 0xffffffff) << 0)
#define FG_ALPHA_FUNC__AF_VAL(n) (((n) & 0xff) << 0)
#define FG_ALPHA_FUNC__AF_FUNC(n) (((n) & 0x7) << 8)
#define FG_ALPHA_FUNC__AF_FUNC__AF_NEVER (0x0 << 8)
#define FG_ALPHA_FUNC__AF_FUNC__AF_LESS (0x1 << 8)
#define FG_ALPHA_FUNC__AF_FUNC__AF_EQUAL (0x2 << 8)
#define FG_ALPHA_FUNC__AF_FUNC__AF_LE (0x3 << 8)
#define FG_ALPHA_FUNC__AF_FUNC__AF_GREATER (0x4 << 8)
#define FG_ALPHA_FUNC__AF_FUNC__AF_NOTEQUAL (0x5 << 8)
#define FG_ALPHA_FUNC__AF_FUNC__AF_GE (0x6 << 8)
#define FG_ALPHA_FUNC__AF_FUNC__AF_ALWAYS (0x7 << 8)
#define FG_ALPHA_FUNC__AF_EN(n) (((n) & 0x1) << 11)
#define FG_ALPHA_FUNC__AF_EN_8BIT(n) (((n) & 0x1) << 12)
#define FG_ALPHA_FUNC__AM_EN(n) (((n) & 0x1) << 16)
#define FG_ALPHA_FUNC__AM_CFG(n) (((n) & 0x1) << 17)
#define FG_ALPHA_FUNC__DITH_EN(n) (((n) & 0x1) << 20)
#define FG_ALPHA_FUNC__ALP_OFF_EN(n) (((n) & 0x1) << 24)
#define FG_ALPHA_FUNC__DISCARD_ZERO_MASK_QUAD(n) (((n) & 0x1) << 25)
#define FG_ALPHA_FUNC__FP16_ENABLE(n) (((n) & 0x1) << 28)
#define FG_ALPHA_VALUE__AF_VAL(n) (((n) & 0xffff) << 0)
#define FG_DEPTH_SRC__DEPTH_SRC(n) (((n) & 0x1) << 0)
#define FG_FOG_BLEND__ENABLE(n) (((n) & 0x1) << 0)
#define FG_FOG_BLEND__FN(n) (((n) & 0x3) << 1)
#define FG_FOG_COLOR_B__BLUE(n) (((n) & 0x3ff) << 0)
#define FG_FOG_COLOR_G__GREEN(n) (((n) & 0x3ff) << 0)
#define FG_FOG_COLOR_R__RED(n) (((n) & 0x3ff) << 0)
#define FG_FOG_FACTOR__FACTOR(n) (((n) & 0x3ff) << 0)
#define GA_COLOR_CONTROL__RGB0_SHADING(n) (((n) & 0x3) << 0)
#define GA_COLOR_CONTROL__ALPHA0_SHADING(n) (((n) & 0x3) << 2)
#define GA_COLOR_CONTROL__RGB1_SHADING(n) (((n) & 0x3) << 4)
#define GA_COLOR_CONTROL__ALPHA1_SHADING(n) (((n) & 0x3) << 6)
#define GA_COLOR_CONTROL__RGB2_SHADING(n) (((n) & 0x3) << 8)
#define GA_COLOR_CONTROL__ALPHA2_SHADING(n) (((n) & 0x3) << 10)
#define GA_COLOR_CONTROL__RGB3_SHADING(n) (((n) & 0x3) << 12)
#define GA_COLOR_CONTROL__ALPHA3_SHADING(n) (((n) & 0x3) << 14)
#define GA_COLOR_CONTROL__PROVOKING_VERTEX(n) (((n) & 0x3) << 16)
#define GA_COLOR_CONTROL_PS3__TEX0_SHADING_PS3(n) (((n) & 0x3) << 0)
#define GA_COLOR_CONTROL_PS3__TEX1_SHADING_PS3(n) (((n) & 0x3) << 2)
#define GA_COLOR_CONTROL_PS3__TEX2_SHADING_PS3(n) (((n) & 0x3) << 4)
#define GA_COLOR_CONTROL_PS3__TEX3_SHADING_PS3(n) (((n) & 0x3) << 6)
#define GA_COLOR_CONTROL_PS3__TEX4_SHADING_PS3(n) (((n) & 0x3) << 8)
#define GA_COLOR_CONTROL_PS3__TEX5_SHADING_PS3(n) (((n) & 0x3) << 10)
#define GA_COLOR_CONTROL_PS3__TEX6_SHADING_PS3(n) (((n) & 0x3) << 12)
#define GA_COLOR_CONTROL_PS3__TEX7_SHADING_PS3(n) (((n) & 0x3) << 14)
#define GA_COLOR_CONTROL_PS3__TEX8_SHADING_PS3(n) (((n) & 0x3) << 16)
#define GA_COLOR_CONTROL_PS3__TEX9_SHADING_PS3(n) (((n) & 0x3) << 18)
#define GA_COLOR_CONTROL_PS3__TEX10_SHADING_PS3(n) (((n) & 0x3) << 20)
#define GA_COLOR_CONTROL_PS3__COLOR0_TEX_OVERRIDE(n) (((n) & 0xf) << 22)
#define GA_COLOR_CONTROL_PS3__COLOR1_TEX_OVERRIDE(n) (((n) & 0xf) << 26)
#define GA_ENHANCE__DEADLOCK_CNTL(n) (((n) & 0x1) << 0)
#define GA_ENHANCE__FASTSYNC_CNTL(n) (((n) & 0x1) << 1)
#define GA_ENHANCE__REG_READWRITE(n) (((n) & 0x1) << 2)
#define GA_ENHANCE__REG_NOSTALL(n) (((n) & 0x1) << 3)
#define GA_FIFO_CNTL__VERTEX_FIFO(n) (((n) & 0x7) << 0)
#define GA_FIFO_CNTL__INDEX_FIFO(n) (((n) & 0x7) << 3)
#define GA_FIFO_CNTL__REG_FIFO(n) (((n) & 0xff) << 6)
#define GA_FILL_A__COLOR_ALPHA(n) (((n) & 0xffffffff) << 0)
#define GA_FILL_B__COLOR_BLUE(n) (((n) & 0xffffffff) << 0)
#define GA_FILL_G__COLOR_GREEN(n) (((n) & 0xffffffff) << 0)
#define GA_FILL_R__COLOR_RED(n) (((n) & 0xffffffff) << 0)
#define GA_FOG_OFFSET__VALUE(n) (((n) & 0xffffffff) << 0)
#define GA_FOG_SCALE__VALUE(n) (((n) & 0xffffffff) << 0)
#define GA_IDLE__PIPE3_Z_IDLE(n) (((n) & 0x1) << 0)
#define GA_IDLE__PIPE2_Z_IDLE(n) (((n) & 0x1) << 1)
#define GA_IDLE__PIPE3_CB_IDLE(n) (((n) & 0x1) << 2)
#define GA_IDLE__PIPE2_CB_IDLE(n) (((n) & 0x1) << 3)
#define GA_IDLE__PIPE3_FG_IDLE(n) (((n) & 0x1) << 4)
#define GA_IDLE__PIPE2_FG_IDLE(n) (((n) & 0x1) << 5)
#define GA_IDLE__PIPE3_US_IDLE(n) (((n) & 0x1) << 6)
#define GA_IDLE__PIPE2_US_IDLE(n) (((n) & 0x1) << 7)
#define GA_IDLE__PIPE3_SC_IDLE(n) (((n) & 0x1) << 8)
#define GA_IDLE__PIPE2_SC_IDLE(n) (((n) & 0x1) << 9)
#define GA_IDLE__PIPE3_RS_IDLE(n) (((n) & 0x1) << 10)
#define GA_IDLE__PIPE2_RS_IDLE(n) (((n) & 0x1) << 11)
#define GA_IDLE__PIPE1_Z_IDLE(n) (((n) & 0x1) << 12)
#define GA_IDLE__PIPE0_Z_IDLE(n) (((n) & 0x1) << 13)
#define GA_IDLE__PIPE1_CB_IDLE(n) (((n) & 0x1) << 14)
#define GA_IDLE__PIPE0_CB_IDLE(n) (((n) & 0x1) << 15)
#define GA_IDLE__PIPE1_FG_IDLE(n) (((n) & 0x1) << 16)
#define GA_IDLE__PIPE0_FG_IDLE(n) (((n) & 0x1) << 17)
#define GA_IDLE__PIPE1_US_IDLE(n) (((n) & 0x1) << 18)
#define GA_IDLE__PIPE0_US_IDLE(n) (((n) & 0x1) << 19)
#define GA_IDLE__PIPE1_SC_IDLE(n) (((n) & 0x1) << 20)
#define GA_IDLE__PIPE0_SC_IDLE(n) (((n) & 0x1) << 21)
#define GA_IDLE__PIPE1_RS_IDLE(n) (((n) & 0x1) << 22)
#define GA_IDLE__PIPE0_RS_IDLE(n) (((n) & 0x1) << 23)
#define GA_IDLE__SU_IDLE(n) (((n) & 0x1) << 24)
#define GA_IDLE__GA_IDLE(n) (((n) & 0x1) << 25)
#define GA_IDLE__GA_UNIT2_IDLE(n) (((n) & 0x1) << 26)
#define GA_LINE_CNTL__WIDTH(n) (((n) & 0xffff) << 0)
#define GA_LINE_CNTL__END_TYPE(n) (((n) & 0x3) << 16)
#define GA_LINE_CNTL__END_TYPE__HORIZONTAL (0x0 << 16)
#define GA_LINE_CNTL__END_TYPE__VERTICAL (0x1 << 16)
#define GA_LINE_CNTL__SORT(n) (((n) & 0x1) << 18)
#define GA_LINE_S0__S0(n) (((n) & 0xffffffff) << 0)
#define GA_LINE_S1__S1(n) (((n) & 0xffffffff) << 0)
#define GA_LINE_STIPPLE_CONFIG__LINE_RESET(n) (((n) & 0x3) << 0)
#define GA_LINE_STIPPLE_CONFIG__STIPPLE_SCALE(n) (((n) & 0x3fffffff) << 2)
#define GA_OFFSET__X_OFFSET(n) (((n) & 0xffff) << 0)
#define GA_OFFSET__Y_OFFSET(n) (((n) & 0xffff) << 16)
#define GA_POINT_MINMAX__MIN_SIZE(n) (((n) & 0xffff) << 0)
#define GA_POINT_MINMAX__MAX_SIZE(n) (((n) & 0xffff) << 16)
#define GA_POINT_S0__S0(n) (((n) & 0xffffffff) << 0)
#define GA_POINT_S1__S1(n) (((n) & 0xffffffff) << 0)
#define GA_POINT_SIZE__HEIGHT(n) (((n) & 0xffff) << 0)
#define GA_POINT_SIZE__WIDTH(n) (((n) & 0xffff) << 16)
#define GA_POINT_T0__T0(n) (((n) & 0xffffffff) << 0)
#define GA_POINT_T1__T1(n) (((n) & 0xffffffff) << 0)
#define GA_POLY_MODE__POLY_MODE(n) (((n) & 0x3) << 0)
#define GA_POLY_MODE__FRONT_PTYPE(n) (((n) & 0x7) << 4)
#define GA_POLY_MODE__BACK_PTYPE(n) (((n) & 0x7) << 7)
#define GA_ROUND_MODE__GEOMETRY_ROUND(n) (((n) & 0x3) << 0)
#define GA_ROUND_MODE__COLOR_ROUND(n) (((n) & 0x3) << 2)
#define GA_ROUND_MODE__RGB_CLAMP(n) (((n) & 0x1) << 4)
#define GA_ROUND_MODE__ALPHA_CLAMP(n) (((n) & 0x1) << 5)
#define GA_ROUND_MODE__GEOMETRY_MASK(n) (((n) & 0xf) << 6)
#define GA_SOLID_BA__COLOR_ALPHA(n) (((n) & 0xffff) << 0)
#define GA_SOLID_BA__COLOR_BLUE(n) (((n) & 0xffff) << 16)
#define GA_SOLID_RG__COLOR_GREEN(n) (((n) & 0xffff) << 0)
#define GA_SOLID_RG__COLOR_RED(n) (((n) & 0xffff) << 16)
#define GA_TRIANGLE_STIPPLE__X_SHIFT(n) (((n) & 0xf) << 0)
#define GA_TRIANGLE_STIPPLE__Y_SHIFT(n) (((n) & 0xf) << 16)
#define GA_US_VECTOR_DATA__DATA(n) (((n) & 0xffffffff) << 0)
#define GA_US_VECTOR_INDEX__INDEX(n) (((n) & 0x1ff) << 0)
#define GA_US_VECTOR_INDEX__TYPE(n) (((n) & 0x1) << 16)
#define GA_US_VECTOR_INDEX__CLAMP(n) (((n) & 0x1) << 17)
#define GB_AA_CONFIG__AA_ENABLE(n) (((n) & 0x1) << 0)
#define GB_AA_CONFIG__NUM_AA_SUBSAMPLES(n) (((n) & 0x3) << 1)
#define GB_ENABLE__POINT_STUFF_ENABLE(n) (((n) & 0x1) << 0)
#define GB_ENABLE__LINE_STUFF_ENABLE(n) (((n) & 0x1) << 1)
#define GB_ENABLE__TRIANGLE_STUFF_ENABLE(n) (((n) & 0x1) << 2)
#define GB_ENABLE__STENCIL_AUTO(n) (((n) & 0x3) << 4)
#define GB_ENABLE__TEX0_SOURCE(n) (((n) & 0x3) << 16)
#define GB_ENABLE__TEX1_SOURCE(n) (((n) & 0x3) << 18)
#define GB_ENABLE__TEX2_SOURCE(n) (((n) & 0x3) << 20)
#define GB_ENABLE__TEX3_SOURCE(n) (((n) & 0x3) << 22)
#define GB_ENABLE__TEX4_SOURCE(n) (((n) & 0x3) << 24)
#define GB_ENABLE__TEX5_SOURCE(n) (((n) & 0x3) << 26)
#define GB_ENABLE__TEX6_SOURCE(n) (((n) & 0x3) << 28)
#define GB_ENABLE__TEX7_SOURCE(n) (((n) & 0x3) << 30)
#define GB_FIFO_SIZE__SC_IFIFO_SIZE(n) (((n) & 0x3) << 0)
#define GB_FIFO_SIZE__SC_TZFIFO_SIZE(n) (((n) & 0x3) << 2)
#define GB_FIFO_SIZE__SC_BFIFO_SIZE(n) (((n) & 0x3) << 4)
#define GB_FIFO_SIZE__RS_TFIFO_SIZE(n) (((n) & 0x3) << 6)
#define GB_FIFO_SIZE__RS_CFIFO_SIZE(n) (((n) & 0x3) << 8)
#define GB_FIFO_SIZE__US_RAM_SIZE(n) (((n) & 0x3) << 10)
#define GB_FIFO_SIZE__US_OFIFO_SIZE(n) (((n) & 0x3) << 12)
#define GB_FIFO_SIZE__US_WFIFO_SIZE(n) (((n) & 0x3) << 14)
#define GB_FIFO_SIZE__RS_HIGHWATER_COL(n) (((n) & 0x7) << 16)
#define GB_FIFO_SIZE__RS_HIGHWATER_TEX(n) (((n) & 0x7) << 19)
#define GB_FIFO_SIZE__US_OFIFO_HIGHWATER(n) (((n) & 0x3) << 22)
#define GB_FIFO_SIZE__US_CUBE_FIFO_HIGHWATER(n) (((n) & 0x1f) << 24)
#define GB_FIFO_SIZE1__SC_HIGHWATER_IFIFO(n) (((n) & 0x3f) << 0)
#define GB_FIFO_SIZE1__SC_HIGHWATER_BFIFO(n) (((n) & 0x3f) << 6)
#define GB_FIFO_SIZE1__RS_HIGHWATER_COL(n) (((n) & 0x3f) << 12)
#define GB_FIFO_SIZE1__RS_HIGHWATER_TEX(n) (((n) & 0x3f) << 18)
#define GB_MSPOS0__MS_X0(n) (((n) & 0xf) << 0)
#define GB_MSPOS0__MS_Y0(n) (((n) & 0xf) << 4)
#define GB_MSPOS0__MS_X1(n) (((n) & 0xf) << 8)
#define GB_MSPOS0__MS_Y1(n) (((n) & 0xf) << 12)
#define GB_MSPOS0__MS_X2(n) (((n) & 0xf) << 16)
#define GB_MSPOS0__MS_Y2(n) (((n) & 0xf) << 20)
#define GB_MSPOS0__MSBD0_Y(n) (((n) & 0xf) << 24)
#define GB_MSPOS0__MSBD0_X(n) (((n) & 0xf) << 28)
#define GB_MSPOS1__MS_X3(n) (((n) & 0xf) << 0)
#define GB_MSPOS1__MS_Y3(n) (((n) & 0xf) << 4)
#define GB_MSPOS1__MS_X4(n) (((n) & 0xf) << 8)
#define GB_MSPOS1__MS_Y4(n) (((n) & 0xf) << 12)
#define GB_MSPOS1__MS_X5(n) (((n) & 0xf) << 16)
#define GB_MSPOS1__MS_Y5(n) (((n) & 0xf) << 20)
#define GB_MSPOS1__MSBD1(n) (((n) & 0xf) << 24)
#define GB_PIPE_SELECT__PIPE0_ID(n) (((n) & 0x3) << 0)
#define GB_PIPE_SELECT__PIPE1_ID(n) (((n) & 0x3) << 2)
#define GB_PIPE_SELECT__PIPE2_ID(n) (((n) & 0x3) << 4)
#define GB_PIPE_SELECT__PIPE3_ID(n) (((n) & 0x3) << 6)
#define GB_PIPE_SELECT__PIPE_MASK(n) (((n) & 0xf) << 8)
#define GB_PIPE_SELECT__MAX_PIPE(n) (((n) & 0x3) << 12)
#define GB_PIPE_SELECT__BAD_PIPES(n) (((n) & 0xf) << 14)
#define GB_PIPE_SELECT__CONFIG_PIPES(n) (((n) & 0x1) << 18)
#define GB_SELECT__FOG_SELECT(n) (((n) & 0x7) << 0)
#define GB_SELECT__DEPTH_SELECT(n) (((n) & 0x1) << 3)
#define GB_SELECT__W_SELECT(n) (((n) & 0x1) << 4)
#define GB_SELECT__FOG_STUFF_ENABLE(n) (((n) & 0x1) << 5)
#define GB_SELECT__FOG_STUFF_TEX(n) (((n) & 0xf) << 6)
#define GB_SELECT__FOG_STUFF_COMP(n) (((n) & 0x3) << 10)
#define GB_TILE_CONFIG__ENABLE(n) (((n) & 0x1) << 0)
#define GB_TILE_CONFIG__PIPE_COUNT(n) (((n) & 0x7) << 1)
#define GB_TILE_CONFIG__TILE_SIZE(n) (((n) & 0x3) << 4)
#define GB_TILE_CONFIG__SUPER_SIZE(n) (((n) & 0x7) << 6)
#define GB_TILE_CONFIG__SUPER_X(n) (((n) & 0x7) << 9)
#define GB_TILE_CONFIG__SUPER_Y(n) (((n) & 0x7) << 12)
#define GB_TILE_CONFIG__SUPER_TILE(n) (((n) & 0x1) << 15)
#define GB_TILE_CONFIG__SUBPIXEL(n) (((n) & 0x1) << 16)
#define GB_TILE_CONFIG__QUADS_PER_RAS(n) (((n) & 0x3) << 17)
#define GB_TILE_CONFIG__BB_SCAN(n) (((n) & 0x1) << 19)
#define GB_TILE_CONFIG__ALT_SCAN_EN(n) (((n) & 0x1) << 20)
#define GB_TILE_CONFIG__ALT_OFFSET(n) (((n) & 0x1) << 21)
#define GB_TILE_CONFIG__SUBPRECISION(n) (((n) & 0x1) << 22)
#define GB_TILE_CONFIG__ALT_TILING(n) (((n) & 0x1) << 23)
#define GB_TILE_CONFIG__Z_EXTENDED(n) (((n) & 0x1) << 24)
#define GB_Z_PEQ_CONFIG__Z_PEQ_SIZE(n) (((n) & 0x1) << 0)
#define PS3_ENABLE__PS3_MODE(n) (((n) & 0x1) << 0)
#define PS3_TEX_SOURCE__TEX0_SOURCE(n) (((n) & 0x3) << 0)
#define PS3_TEX_SOURCE__TEX1_SOURCE(n) (((n) & 0x3) << 2)
#define PS3_TEX_SOURCE__TEX2_SOURCE(n) (((n) & 0x3) << 4)
#define PS3_TEX_SOURCE__TEX3_SOURCE(n) (((n) & 0x3) << 6)
#define PS3_TEX_SOURCE__TEX4_SOURCE(n) (((n) & 0x3) << 8)
#define PS3_TEX_SOURCE__TEX5_SOURCE(n) (((n) & 0x3) << 10)
#define PS3_TEX_SOURCE__TEX6_SOURCE(n) (((n) & 0x3) << 12)
#define PS3_TEX_SOURCE__TEX7_SOURCE(n) (((n) & 0x3) << 14)
#define PS3_TEX_SOURCE__TEX8_SOURCE(n) (((n) & 0x3) << 16)
#define PS3_TEX_SOURCE__TEX9_SOURCE(n) (((n) & 0x3) << 18)
#define PS3_VTX_FMT__TEX_0_COMP_CNT(n) (((n) & 0x7) << 0)
#define PS3_VTX_FMT__TEX_1_COMP_CNT(n) (((n) & 0x7) << 3)
#define PS3_VTX_FMT__TEX_2_COMP_CNT(n) (((n) & 0x7) << 6)
#define PS3_VTX_FMT__TEX_3_COMP_CNT(n) (((n) & 0x7) << 9)
#define PS3_VTX_FMT__TEX_4_COMP_CNT(n) (((n) & 0x7) << 12)
#define PS3_VTX_FMT__TEX_5_COMP_CNT(n) (((n) & 0x7) << 15)
#define PS3_VTX_FMT__TEX_6_COMP_CNT(n) (((n) & 0x7) << 18)
#define PS3_VTX_FMT__TEX_7_COMP_CNT(n) (((n) & 0x7) << 21)
#define PS3_VTX_FMT__TEX_8_COMP_CNT(n) (((n) & 0x7) << 24)
#define PS3_VTX_FMT__TEX_9_COMP_CNT(n) (((n) & 0x7) << 27)
#define PS3_VTX_FMT__TEX_10_COMP_CNT(n) (((n) & 0x3) << 30)
#define RB3D_AARESOLVE_CTL__AARESOLVE_MODE(n) (((n) & 0x1) << 0)
#define RB3D_AARESOLVE_CTL__AARESOLVE_GAMMA(n) (((n) & 0x1) << 1)
#define RB3D_AARESOLVE_CTL__AARESOLVE_GAMMA__1_0 (0x0 << 1)
#define RB3D_AARESOLVE_CTL__AARESOLVE_GAMMA__2_2 (0x1 << 1)
#define RB3D_AARESOLVE_CTL__AARESOLVE_ALPHA(n) (((n) & 0x1) << 2)
#define RB3D_AARESOLVE_OFFSET__AARESOLVE_OFFSET(n) (((n) & 0x7ffffff) << 5)
#define RB3D_AARESOLVE_PITCH__AARESOLVE_PITCH(n) (((n) & 0x1fff) << 1)
#define RB3D_ABLENDCNTL__COMB_FCN(n) (((n) & 0x7) << 12)
#define RB3D_ABLENDCNTL__SRCBLEND(n) (((n) & 0x3f) << 16)
#define RB3D_ABLENDCNTL__SRCBLEND__D3D_ZERO (0x1 << 16)
#define RB3D_ABLENDCNTL__SRCBLEND__D3D_ONE (0x2 << 16)
#define RB3D_ABLENDCNTL__SRCBLEND__D3D_SRCCOLOR (0x3 << 16)
#define RB3D_ABLENDCNTL__SRCBLEND__D3D_INVSRCCOLOR (0x4 << 16)
#define RB3D_ABLENDCNTL__SRCBLEND__D3D_SRCALPHA (0x5 << 16)
#define RB3D_ABLENDCNTL__SRCBLEND__D3D_INVSRCALPHA (0x6 << 16)
#define RB3D_ABLENDCNTL__SRCBLEND__D3D_DESTALPHA (0x7 << 16)
#define RB3D_ABLENDCNTL__SRCBLEND__D3D_INVDESTALPHA (0x8 << 16)
#define RB3D_ABLENDCNTL__SRCBLEND__D3D_DESTCOLOR (0x9 << 16)
#define RB3D_ABLENDCNTL__SRCBLEND__D3D_INVDESTCOLOR (0xa << 16)
#define RB3D_ABLENDCNTL__SRCBLEND__D3D_SRCALPHASAT (0xb << 16)
#define RB3D_ABLENDCNTL__SRCBLEND__D3D_BOTHSRCALPHA (0xc << 16)
#define RB3D_ABLENDCNTL__SRCBLEND__D3D_BOTHINVSRCALPHA (0xd << 16)
#define RB3D_ABLENDCNTL__SRCBLEND__GL_ZERO (0x20 << 16)
#define RB3D_ABLENDCNTL__SRCBLEND__GL_ONE (0x21 << 16)
#define RB3D_ABLENDCNTL__SRCBLEND__GL_SRC_COLOR (0x22 << 16)
#define RB3D_ABLENDCNTL__SRCBLEND__GL_ONE_MINUS_SRC_COLOR (0x23 << 16)
#define RB3D_ABLENDCNTL__SRCBLEND__GL_DST_COLOR (0x24 << 16)
#define RB3D_ABLENDCNTL__SRCBLEND__GL_ONE_MINUS_DST_COLOR (0x25 << 16)
#define RB3D_ABLENDCNTL__SRCBLEND__GL_SRC_ALPHA (0x26 << 16)
#define RB3D_ABLENDCNTL__SRCBLEND__GL_ONE_MINUS_SRC_ALPHA (0x27 << 16)
#define RB3D_ABLENDCNTL__SRCBLEND__GL_DST_ALPHA (0x28 << 16)
#define RB3D_ABLENDCNTL__SRCBLEND__GL_ONE_MINUS_DST_ALPHA (0x29 << 16)
#define RB3D_ABLENDCNTL__SRCBLEND__GL_SRC_ALPHA_SATURATE (0x2a << 16)
#define RB3D_ABLENDCNTL__SRCBLEND__GL_CONSTANT_COLOR (0x2b << 16)
#define RB3D_ABLENDCNTL__SRCBLEND__GL_ONE_MINUS_CONSTANT_COLOR (0x2c << 16)
#define RB3D_ABLENDCNTL__SRCBLEND__GL_CONSTANT_ALPHA (0x2d << 16)
#define RB3D_ABLENDCNTL__SRCBLEND__GL_ONE_MINUS_CONSTANT_ALPHA (0x2e << 16)
#define RB3D_ABLENDCNTL__DESTBLEND(n) (((n) & 0x3f) << 24)
#define RB3D_ABLENDCNTL__DESTBLEND__D3D_ZERO (0x1 << 24)
#define RB3D_ABLENDCNTL__DESTBLEND__D3D_ONE (0x2 << 24)
#define RB3D_ABLENDCNTL__DESTBLEND__D3D_SRCCOLOR (0x3 << 24)
#define RB3D_ABLENDCNTL__DESTBLEND__D3D_INVSRCCOLOR (0x4 << 24)
#define RB3D_ABLENDCNTL__DESTBLEND__D3D_SRCALPHA (0x5 << 24)
#define RB3D_ABLENDCNTL__DESTBLEND__D3D_INVSRCALPHA (0x6 << 24)
#define RB3D_ABLENDCNTL__DESTBLEND__D3D_DESTALPHA (0x7 << 24)
#define RB3D_ABLENDCNTL__DESTBLEND__D3D_INVDESTALPHA (0x8 << 24)
#define RB3D_ABLENDCNTL__DESTBLEND__D3D_DESTCOLOR (0x9 << 24)
#define RB3D_ABLENDCNTL__DESTBLEND__D3D_INVDESTCOLOR (0xa << 24)
#define RB3D_ABLENDCNTL__DESTBLEND__GL_ZERO (0x20 << 24)
#define RB3D_ABLENDCNTL__DESTBLEND__GL_ONE (0x21 << 24)
#define RB3D_ABLENDCNTL__DESTBLEND__GL_SRC_COLOR (0x22 << 24)
#define RB3D_ABLENDCNTL__DESTBLEND__GL_ONE_MINUS_SRC_COLOR (0x23 << 24)
#define RB3D_ABLENDCNTL__DESTBLEND__GL_DST_COLOR (0x24 << 24)
#define RB3D_ABLENDCNTL__DESTBLEND__GL_ONE_MINUS_DST_COLOR (0x25 << 24)
#define RB3D_ABLENDCNTL__DESTBLEND__GL_SRC_ALPHA (0x26 << 24)
#define RB3D_ABLENDCNTL__DESTBLEND__GL_ONE_MINUS_SRC_ALPHA (0x27 << 24)
#define RB3D_ABLENDCNTL__DESTBLEND__GL_DST_ALPHA (0x28 << 24)
#define RB3D_ABLENDCNTL__DESTBLEND__GL_ONE_MINUS_DST_ALPHA (0x29 << 24)
#define RB3D_ABLENDCNTL__DESTBLEND__GL_CONSTANT_COLOR (0x2b << 24)
#define RB3D_ABLENDCNTL__DESTBLEND__GL_ONE_MINUS_CONSTANT_COLOR (0x2c << 24)
#define RB3D_ABLENDCNTL__DESTBLEND__GL_CONSTANT_ALPHA (0x2d << 24)
#define RB3D_ABLENDCNTL__DESTBLEND__GL_ONE_MINUS_CONSTANT_ALPHA (0x2e << 24)
#define RB3D_BLENDCNTL__ALPHA_BLEND_ENABLE(n) (((n) & 0x1) << 0)
#define RB3D_BLENDCNTL__ALPHA_BLEND_ENABLE__DISABLE (0x0 << 0)
#define RB3D_BLENDCNTL__ALPHA_BLEND_ENABLE__ENABLE (0x1 << 0)
#define RB3D_BLENDCNTL__SEPARATE_ALPHA_ENABLE(n) (((n) & 0x1) << 1)
#define RB3D_BLENDCNTL__READ_ENABLE(n) (((n) & 0x1) << 2)
#define RB3D_BLENDCNTL__DISCARD_SRC_PIXELS(n) (((n) & 0x7) << 3)
#define RB3D_BLENDCNTL__DISCARD_SRC_PIXELS__DISABLE (0x0 << 3)
#define RB3D_BLENDCNTL__DISCARD_SRC_PIXELS__(RESERVED) (0x7 << 3)
#define RB3D_BLENDCNTL__COMB_FCN(n) (((n) & 0x7) << 12)
#define RB3D_BLENDCNTL__SRCBLEND(n) (((n) & 0x3f) << 16)
#define RB3D_BLENDCNTL__SRCBLEND__D3D_ZERO (0x1 << 16)
#define RB3D_BLENDCNTL__SRCBLEND__D3D_ONE (0x2 << 16)
#define RB3D_BLENDCNTL__SRCBLEND__D3D_SRCCOLOR (0x3 << 16)
#define RB3D_BLENDCNTL__SRCBLEND__D3D_INVSRCCOLOR (0x4 << 16)
#define RB3D_BLENDCNTL__SRCBLEND__D3D_SRCALPHA (0x5 << 16)
#define RB3D_BLENDCNTL__SRCBLEND__D3D_INVSRCALPHA (0x6 << 16)
#define RB3D_BLENDCNTL__SRCBLEND__D3D_DESTALPHA (0x7 << 16)
#define RB3D_BLENDCNTL__SRCBLEND__D3D_INVDESTALPHA (0x8 << 16)
#define RB3D_BLENDCNTL__SRCBLEND__D3D_DESTCOLOR (0x9 << 16)
#define RB3D_BLENDCNTL__SRCBLEND__D3D_INVDESTCOLOR (0xa << 16)
#define RB3D_BLENDCNTL__SRCBLEND__D3D_SRCALPHASAT (0xb << 16)
#define RB3D_BLENDCNTL__SRCBLEND__D3D_BOTHSRCALPHA (0xc << 16)
#define RB3D_BLENDCNTL__SRCBLEND__D3D_BOTHINVSRCALPHA (0xd << 16)
#define RB3D_BLENDCNTL__SRCBLEND__GL_ZERO (0x20 << 16)
#define RB3D_BLENDCNTL__SRCBLEND__GL_ONE (0x21 << 16)
#define RB3D_BLENDCNTL__SRCBLEND__GL_SRC_COLOR (0x22 << 16)
#define RB3D_BLENDCNTL__SRCBLEND__GL_ONE_MINUS_SRC_COLOR (0x23 << 16)
#define RB3D_BLENDCNTL__SRCBLEND__GL_DST_COLOR (0x24 << 16)
#define RB3D_BLENDCNTL__SRCBLEND__GL_ONE_MINUS_DST_COLOR (0x25 << 16)
#define RB3D_BLENDCNTL__SRCBLEND__GL_SRC_ALPHA (0x26 << 16)
#define RB3D_BLENDCNTL__SRCBLEND__GL_ONE_MINUS_SRC_ALPHA (0x27 << 16)
#define RB3D_BLENDCNTL__SRCBLEND__GL_DST_ALPHA (0x28 << 16)
#define RB3D_BLENDCNTL__SRCBLEND__GL_ONE_MINUS_DST_ALPHA (0x29 << 16)
#define RB3D_BLENDCNTL__SRCBLEND__GL_SRC_ALPHA_SATURATE (0x2a << 16)
#define RB3D_BLENDCNTL__SRCBLEND__GL_CONSTANT_COLOR (0x2b << 16)
#define RB3D_BLENDCNTL__SRCBLEND__GL_ONE_MINUS_CONSTANT_COLOR (0x2c << 16)
#define RB3D_BLENDCNTL__SRCBLEND__GL_CONSTANT_ALPHA (0x2d << 16)
#define RB3D_BLENDCNTL__SRCBLEND__GL_ONE_MINUS_CONSTANT_ALPHA (0x2e << 16)
#define RB3D_BLENDCNTL__DESTBLEND(n) (((n) & 0x3f) << 24)
#define RB3D_BLENDCNTL__DESTBLEND__D3D_ZERO (0x1 << 24)
#define RB3D_BLENDCNTL__DESTBLEND__D3D_ONE (0x2 << 24)
#define RB3D_BLENDCNTL__DESTBLEND__D3D_SRCCOLOR (0x3 << 24)
#define RB3D_BLENDCNTL__DESTBLEND__D3D_INVSRCCOLOR (0x4 << 24)
#define RB3D_BLENDCNTL__DESTBLEND__D3D_SRCALPHA (0x5 << 24)
#define RB3D_BLENDCNTL__DESTBLEND__D3D_INVSRCALPHA (0x6 << 24)
#define RB3D_BLENDCNTL__DESTBLEND__D3D_DESTALPHA (0x7 << 24)
#define RB3D_BLENDCNTL__DESTBLEND__D3D_INVDESTALPHA (0x8 << 24)
#define RB3D_BLENDCNTL__DESTBLEND__D3D_DESTCOLOR (0x9 << 24)
#define RB3D_BLENDCNTL__DESTBLEND__D3D_INVDESTCOLOR (0xa << 24)
#define RB3D_BLENDCNTL__DESTBLEND__GL_ZERO (0x20 << 24)
#define RB3D_BLENDCNTL__DESTBLEND__GL_ONE (0x21 << 24)
#define RB3D_BLENDCNTL__DESTBLEND__GL_SRC_COLOR (0x22 << 24)
#define RB3D_BLENDCNTL__DESTBLEND__GL_ONE_MINUS_SRC_COLOR (0x23 << 24)
#define RB3D_BLENDCNTL__DESTBLEND__GL_DST_COLOR (0x24 << 24)
#define RB3D_BLENDCNTL__DESTBLEND__GL_ONE_MINUS_DST_COLOR (0x25 << 24)
#define RB3D_BLENDCNTL__DESTBLEND__GL_SRC_ALPHA (0x26 << 24)
#define RB3D_BLENDCNTL__DESTBLEND__GL_ONE_MINUS_SRC_ALPHA (0x27 << 24)
#define RB3D_BLENDCNTL__DESTBLEND__GL_DST_ALPHA (0x28 << 24)
#define RB3D_BLENDCNTL__DESTBLEND__GL_ONE_MINUS_DST_ALPHA (0x29 << 24)
#define RB3D_BLENDCNTL__DESTBLEND__GL_CONSTANT_COLOR (0x2b << 24)
#define RB3D_BLENDCNTL__DESTBLEND__GL_ONE_MINUS_CONSTANT_COLOR (0x2c << 24)
#define RB3D_BLENDCNTL__DESTBLEND__GL_CONSTANT_ALPHA (0x2d << 24)
#define RB3D_BLENDCNTL__DESTBLEND__GL_ONE_MINUS_CONSTANT_ALPHA (0x2e << 24)
#define RB3D_BLENDCNTL__SRC_ALPHA_0_NO_READ(n) (((n) & 0x1) << 30)
#define RB3D_BLENDCNTL__SRC_ALPHA_1_NO_READ(n) (((n) & 0x1) << 31)
#define RB3D_CCTL__NUM_MULTIWRITES(n) (((n) & 0x3) << 5)
#define RB3D_CCTL__CLRCMP_FLIPE_ENABLE(n) (((n) & 0x1) << 7)
#define RB3D_CCTL__AA_COMPRESSION_ENABLE(n) (((n) & 0x1) << 9)
#define RB3D_CCTL__CMASK_ENABLE(n) (((n) & 0x1) << 10)
#define RB3D_CCTL__CMASK_ENABLE__DISABLE (0x0 << 10)
#define RB3D_CCTL__CMASK_ENABLE__ENABLE (0x1 << 10)
#define RB3D_CCTL__INDEPENDENT_COLOR_CHANNEL_MASK_ENABLE(n) (((n) & 0x1) << 12)
#define RB3D_CCTL__INDEPENDENT_COLOR_CHANNEL_MASK_ENABLE__DISABLE (0x0 << 12)
#define RB3D_CCTL__INDEPENDENT_COLOR_CHANNEL_MASK_ENABLE__ENABLE (0x1 << 12)
#define RB3D_CCTL__WRITE_COMPRESSION_DISABLE(n) (((n) & 0x1) << 13)
#define RB3D_CCTL__INDEPENDENT_COLORFORMAT_ENABLE(n) (((n) & 0x1) << 14)
#define RB3D_CCTL__INDEPENDENT_COLORFORMAT_ENABLE__DISABLE (0x0 << 14)
#define RB3D_CCTL__INDEPENDENT_COLORFORMAT_ENABLE__ENABLE (0x1 << 14)
#define RB3D_CLRCMP_CLR__CLRCMP_CLR(n) (((n) & 0xffffffff) << 0)
#define RB3D_CLRCMP_FLIPE__CLRCMP_FLIPE(n) (((n) & 0xffffffff) << 0)
#define RB3D_CLRCMP_MSK__CLRCMP_MSK(n) (((n) & 0xffffffff) << 0)
#define RB3D_COLOR_CHANNEL_MASK__BLUE_MASK(n) (((n) & 0x1) << 0)
#define RB3D_COLOR_CHANNEL_MASK__BLUE_MASK__DISABLE (0x0 << 0)
#define RB3D_COLOR_CHANNEL_MASK__BLUE_MASK__ENABLE (0x1 << 0)
#define RB3D_COLOR_CHANNEL_MASK__GREEN_MASK(n) (((n) & 0x1) << 1)
#define RB3D_COLOR_CHANNEL_MASK__GREEN_MASK__DISABLE (0x0 << 1)
#define RB3D_COLOR_CHANNEL_MASK__GREEN_MASK__ENABLE (0x1 << 1)
#define RB3D_COLOR_CHANNEL_MASK__RED_MASK(n) (((n) & 0x1) << 2)
#define RB3D_COLOR_CHANNEL_MASK__RED_MASK__DISABLE (0x0 << 2)
#define RB3D_COLOR_CHANNEL_MASK__RED_MASK__ENABLE (0x1 << 2)
#define RB3D_COLOR_CHANNEL_MASK__ALPHA_MASK(n) (((n) & 0x1) << 3)
#define RB3D_COLOR_CHANNEL_MASK__ALPHA_MASK__DISABLE (0x0 << 3)
#define RB3D_COLOR_CHANNEL_MASK__ALPHA_MASK__ENABLE (0x1 << 3)
#define RB3D_COLOR_CHANNEL_MASK__BLUE_MASK1(n) (((n) & 0x1) << 4)
#define RB3D_COLOR_CHANNEL_MASK__BLUE_MASK1__DISABLE (0x0 << 4)
#define RB3D_COLOR_CHANNEL_MASK__BLUE_MASK1__ENABLE (0x1 << 4)
#define RB3D_COLOR_CHANNEL_MASK__GREEN_MASK1(n) (((n) & 0x1) << 5)
#define RB3D_COLOR_CHANNEL_MASK__GREEN_MASK1__DISABLE (0x0 << 5)
#define RB3D_COLOR_CHANNEL_MASK__GREEN_MASK1__ENABLE (0x1 << 5)
#define RB3D_COLOR_CHANNEL_MASK__RED_MASK1(n) (((n) & 0x1) << 6)
#define RB3D_COLOR_CHANNEL_MASK__RED_MASK1__DISABLE (0x0 << 6)
#define RB3D_COLOR_CHANNEL_MASK__RED_MASK1__ENABLE (0x1 << 6)
#define RB3D_COLOR_CHANNEL_MASK__ALPHA_MASK1(n) (((n) & 0x1) << 7)
#define RB3D_COLOR_CHANNEL_MASK__ALPHA_MASK1__DISABLE (0x0 << 7)
#define RB3D_COLOR_CHANNEL_MASK__ALPHA_MASK1__ENABLE (0x1 << 7)
#define RB3D_COLOR_CHANNEL_MASK__BLUE_MASK2(n) (((n) & 0x1) << 8)
#define RB3D_COLOR_CHANNEL_MASK__BLUE_MASK2__DISABLE (0x0 << 8)
#define RB3D_COLOR_CHANNEL_MASK__BLUE_MASK2__ENABLE (0x1 << 8)
#define RB3D_COLOR_CHANNEL_MASK__GREEN_MASK2(n) (((n) & 0x1) << 9)
#define RB3D_COLOR_CHANNEL_MASK__GREEN_MASK2__DISABLE (0x0 << 9)
#define RB3D_COLOR_CHANNEL_MASK__GREEN_MASK2__ENABLE (0x1 << 9)
#define RB3D_COLOR_CHANNEL_MASK__RED_MASK2(n) (((n) & 0x1) << 10)
#define RB3D_COLOR_CHANNEL_MASK__RED_MASK2__DISABLE (0x0 << 10)
#define RB3D_COLOR_CHANNEL_MASK__RED_MASK2__ENABLE (0x1 << 10)
#define RB3D_COLOR_CHANNEL_MASK__ALPHA_MASK2(n) (((n) & 0x1) << 11)
#define RB3D_COLOR_CHANNEL_MASK__ALPHA_MASK2__DISABLE (0x0 << 11)
#define RB3D_COLOR_CHANNEL_MASK__ALPHA_MASK2__ENABLE (0x1 << 11)
#define RB3D_COLOR_CHANNEL_MASK__BLUE_MASK3(n) (((n) & 0x1) << 12)
#define RB3D_COLOR_CHANNEL_MASK__BLUE_MASK3__DISABLE (0x0 << 12)
#define RB3D_COLOR_CHANNEL_MASK__BLUE_MASK3__ENABLE (0x1 << 12)
#define RB3D_COLOR_CHANNEL_MASK__GREEN_MASK3(n) (((n) & 0x1) << 13)
#define RB3D_COLOR_CHANNEL_MASK__GREEN_MASK3__DISABLE (0x0 << 13)
#define RB3D_COLOR_CHANNEL_MASK__GREEN_MASK3__ENABLE (0x1 << 13)
#define RB3D_COLOR_CHANNEL_MASK__RED_MASK3(n) (((n) & 0x1) << 14)
#define RB3D_COLOR_CHANNEL_MASK__RED_MASK3__DISABLE (0x0 << 14)
#define RB3D_COLOR_CHANNEL_MASK__RED_MASK3__ENABLE (0x1 << 14)
#define RB3D_COLOR_CHANNEL_MASK__ALPHA_MASK3(n) (((n) & 0x1) << 15)
#define RB3D_COLOR_CHANNEL_MASK__ALPHA_MASK3__DISABLE (0x0 << 15)
#define RB3D_COLOR_CHANNEL_MASK__ALPHA_MASK3__ENABLE (0x1 << 15)
#define RB3D_COLOR_CLEAR_VALUE__BLUE(n) (((n) & 0xff) << 0)
#define RB3D_COLOR_CLEAR_VALUE__GREEN(n) (((n) & 0xff) << 8)
#define RB3D_COLOR_CLEAR_VALUE__RED(n) (((n) & 0xff) << 16)
#define RB3D_COLOR_CLEAR_VALUE__ALPHA(n) (((n) & 0xff) << 24)
#define RB3D_COLOR_CLEAR_VALUE_AR__RED(n) (((n) & 0xffff) << 0)
#define RB3D_COLOR_CLEAR_VALUE_AR__ALPHA(n) (((n) & 0xffff) << 16)
#define RB3D_COLOR_CLEAR_VALUE_GB__BLUE(n) (((n) & 0xffff) << 0)
#define RB3D_COLOR_CLEAR_VALUE_GB__GREEN(n) (((n) & 0xffff) << 16)
#define RB3D_COLOROFFSET__COLOROFFSET(n) (((n) & 0x7ffffff) << 5)
#define RB3D_COLORPITCH__COLORPITCH(n) (((n) & 0x1fff) << 1)
#define RB3D_COLORPITCH__COLORTILE(n) (((n) & 0x1) << 16)
#define RB3D_COLORPITCH__COLORMICROTILE(n) (((n) & 0x3) << 17)
#define RB3D_COLORPITCH__COLORMICROTILE__(RESERVED) (0x3 << 17)
#define RB3D_COLORPITCH__COLORENDIAN(n) (((n) & 0x3) << 19)
#define RB3D_COLORPITCH__COLORFORMAT(n) (((n) & 0xf) << 21)
#define RB3D_COLORPITCH__COLORFORMAT__ARGB10101010 (0x0 << 21)
#define RB3D_COLORPITCH__COLORFORMAT__UV1010 (0x1 << 21)
#define RB3D_COLORPITCH__COLORFORMAT__ARGB1555 (0x3 << 21)
#define RB3D_COLORPITCH__COLORFORMAT__RGB565 (0x4 << 21)
#define RB3D_COLORPITCH__COLORFORMAT__ARGB2101010 (0x5 << 21)
#define RB3D_COLORPITCH__COLORFORMAT__ARGB8888 (0x6 << 21)
#define RB3D_COLORPITCH__COLORFORMAT__ARGB32323232 (0x7 << 21)
#define RB3D_COLORPITCH__COLORFORMAT__(RESERVED) (0x8 << 21)
#define RB3D_COLORPITCH__COLORFORMAT__I8 (0x9 << 21)
#define RB3D_COLORPITCH__COLORFORMAT__ARGB16161616 (0xa << 21)
#define RB3D_COLORPITCH__COLORFORMAT__UV88 (0xd << 21)
#define RB3D_COLORPITCH__COLORFORMAT__I10 (0xe << 21)
#define RB3D_COLORPITCH__COLORFORMAT__ARGB4444 (0xf << 21)
#define RB3D_CONSTANT_COLOR__BLUE(n) (((n) & 0xff) << 0)
#define RB3D_CONSTANT_COLOR__GREEN(n) (((n) & 0xff) << 8)
#define RB3D_CONSTANT_COLOR__RED(n) (((n) & 0xff) << 16)
#define RB3D_CONSTANT_COLOR__ALPHA(n) (((n) & 0xff) << 24)
#define RB3D_CONSTANT_COLOR_AR__RED(n) (((n) & 0xffff) << 0)
#define RB3D_CONSTANT_COLOR_AR__ALPHA(n) (((n) & 0xffff) << 16)
#define RB3D_CONSTANT_COLOR_GB__BLUE(n) (((n) & 0xffff) << 0)
#define RB3D_CONSTANT_COLOR_GB__GREEN(n) (((n) & 0xffff) << 16)
#define RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD__BLUE(n) (((n) & 0xff) << 0)
#define RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD__GREEN(n) (((n) & 0xff) << 8)
#define RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD__RED(n) (((n) & 0xff) << 16)
#define RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD__ALPHA(n) (((n) & 0xff) << 24)
#define RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD__BLUE(n) (((n) & 0xff) << 0)
#define RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD__GREEN(n) (((n) & 0xff) << 8)
#define RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD__RED(n) (((n) & 0xff) << 16)
#define RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD__ALPHA(n) (((n) & 0xff) << 24)
#define RB3D_DITHER_CTL__DITHER_MODE(n) (((n) & 0x3) << 0)
#define RB3D_DITHER_CTL__DITHER_MODE__TRUNCATE (0x0 << 0)
#define RB3D_DITHER_CTL__DITHER_MODE__ROUND (0x1 << 0)
#define RB3D_DITHER_CTL__DITHER_MODE__(RESERVED) (0x3 << 0)
#define RB3D_DITHER_CTL__ALPHA_DITHER_MODE(n) (((n) & 0x3) << 2)
#define RB3D_DITHER_CTL__ALPHA_DITHER_MODE__TRUNCATE (0x0 << 2)
#define RB3D_DITHER_CTL__ALPHA_DITHER_MODE__ROUND (0x1 << 2)
#define RB3D_DITHER_CTL__ALPHA_DITHER_MODE__(RESERVED) (0x3 << 2)
#define RB3D_DSTCACHE_CTLSTAT__DC_FLUSH(n) (((n) & 0x3) << 0)
#define RB3D_DSTCACHE_CTLSTAT__DC_FREE(n) (((n) & 0x3) << 2)
#define RB3D_DSTCACHE_CTLSTAT__DC_FINISH(n) (((n) & 0x1) << 4)
#define RB3D_FIFO_SIZE__OP_FIFO_SIZE(n) (((n) & 0x3) << 0)
#define RB3D_ROPCNTL__ROP_ENABLE(n) (((n) & 0x1) << 2)
#define RB3D_ROPCNTL__ROP_ENABLE__ENABLED (0x1 << 2)
#define RB3D_ROPCNTL__ROP(n) (((n) & 0xf) << 8)
#define RS_COUNT__IT_COUNT(n) (((n) & 0x7f) << 0)
#define RS_COUNT__IC_COUNT(n) (((n) & 0xf) << 7)
#define RS_COUNT__W_ADDR(n) (((n) & 0x3f) << 12)
#define RS_COUNT__HIRES_EN(n) (((n) & 0x1) << 18)
#define RS_INST__TEX_ID(n) (((n) & 0xf) << 0)
#define RS_INST__TEX_CN(n) (((n) & 0x1) << 4)
#define RS_INST__TEX_ADDR(n) (((n) & 0x7f) << 5)
#define RS_INST__COL_ID(n) (((n) & 0xf) << 12)
#define RS_INST__COL_CN(n) (((n) & 0x3) << 16)
#define RS_INST__COL_ADDR(n) (((n) & 0x7f) << 18)
#define RS_INST__TEX_ADJ(n) (((n) & 0x1) << 25)
#define RS_INST__W_CN(n) (((n) & 0x1) << 26)
#define RS_INST_COUNT__INST_COUNT(n) (((n) & 0xf) << 0)
#define RS_INST_COUNT__TX_OFFSET(n) (((n) & 0x7) << 5)
#define RS_IP__TEX_PTR_S(n) (((n) & 0x3f) << 0)
#define RS_IP__TEX_PTR_T(n) (((n) & 0x3f) << 6)
#define RS_IP__TEX_PTR_R(n) (((n) & 0x3f) << 12)
#define RS_IP__TEX_PTR_Q(n) (((n) & 0x3f) << 18)
#define RS_IP__COL_PTR(n) (((n) & 0x7) << 24)
#define RS_IP__COL_FMT(n) (((n) & 0xf) << 27)
#define RS_IP__OFFSET_EN(n) (((n) & 0x1) << 31)
#define SC_CLIP_0_A__XS0(n) (((n) & 0x1fff) << 0)
#define SC_CLIP_0_A__YS0(n) (((n) & 0x1fff) << 13)
#define SC_CLIP_0_B__XS1(n) (((n) & 0x1fff) << 0)
#define SC_CLIP_0_B__YS1(n) (((n) & 0x1fff) << 13)
#define SC_CLIP_1_A__XS0(n) (((n) & 0x1fff) << 0)
#define SC_CLIP_1_A__YS0(n) (((n) & 0x1fff) << 13)
#define SC_CLIP_1_B__XS1(n) (((n) & 0x1fff) << 0)
#define SC_CLIP_1_B__YS1(n) (((n) & 0x1fff) << 13)
#define SC_CLIP_2_A__XS0(n) (((n) & 0x1fff) << 0)
#define SC_CLIP_2_A__YS0(n) (((n) & 0x1fff) << 13)
#define SC_CLIP_2_B__XS1(n) (((n) & 0x1fff) << 0)
#define SC_CLIP_2_B__YS1(n) (((n) & 0x1fff) << 13)
#define SC_CLIP_3_A__XS0(n) (((n) & 0x1fff) << 0)
#define SC_CLIP_3_A__YS0(n) (((n) & 0x1fff) << 13)
#define SC_CLIP_3_B__XS1(n) (((n) & 0x1fff) << 0)
#define SC_CLIP_3_B__YS1(n) (((n) & 0x1fff) << 13)
#define SC_CLIP_RULE__CLIP_RULE(n) (((n) & 0xffff) << 0)
#define SC_EDGERULE__ER_TRI(n) (((n) & 0x1f) << 0)
#define SC_EDGERULE__ER_TRI__L_IN_R_IN_HT_IN_HB_IN (0x0 << 0)
#define SC_EDGERULE__ER_TRI__L_IN_R_IN_HT_IN_HB_OUT (0x1 << 0)
#define SC_EDGERULE__ER_TRI__L_IN_R_IN_HT_OUT_HB_IN (0x2 << 0)
#define SC_EDGERULE__ER_TRI__L_IN_R_IN_HT_OUT_HB_OUT (0x3 << 0)
#define SC_EDGERULE__ER_TRI__L_IN_R_OUT_HT_IN_HB_IN (0x4 << 0)
#define SC_EDGERULE__ER_TRI__L_IN_R_OUT_HT_IN_HB_OUT (0x5 << 0)
#define SC_EDGERULE__ER_TRI__L_IN_R_OUT_HT_OUT_HB_IN (0x6 << 0)
#define SC_EDGERULE__ER_TRI__L_IN_R_OUT_HT_OUT_HB_OUT (0x7 << 0)
#define SC_EDGERULE__ER_TRI__L_OUT_R_IN_HT_IN_HB_IN (0x8 << 0)
#define SC_EDGERULE__ER_TRI__L_OUT_R_IN_HT_IN_HB_OUT (0x9 << 0)
#define SC_EDGERULE__ER_TRI__L_OUT_R_IN_HT_OUT_HB_IN (0xa << 0)
#define SC_EDGERULE__ER_TRI__L_OUT_R_IN_HT_OUT_HB_OUT (0xb << 0)
#define SC_EDGERULE__ER_TRI__L_OUT_R_OUT_HT_IN_HB_IN (0xc << 0)
#define SC_EDGERULE__ER_TRI__L_OUT_R_OUT_HT_IN_HB_OUT (0xd << 0)
#define SC_EDGERULE__ER_TRI__L_OUT_R_OUT_HT_OUT_HB_IN (0xe << 0)
#define SC_EDGERULE__ER_TRI__L_OUT_R_OUT_HT_OUT_HB_OUT (0xf << 0)
#define SC_EDGERULE__ER_TRI__T_IN_B_IN_VL_IN_VR_IN (0x10 << 0)
#define SC_EDGERULE__ER_TRI__T_IN_B_IN_VL_IN_VR_OUT (0x11 << 0)
#define SC_EDGERULE__ER_TRI__T_IN_B_IN_VL_VR_IN (0x12 << 0)
#define SC_EDGERULE__ER_TRI__T_IN_B_IN_VL_OUT_VR_OUT (0x13 << 0)
#define SC_EDGERULE__ER_TRI__T_OUT_B_IN_VL_IN_VR_IN (0x14 << 0)
#define SC_EDGERULE__ER_TRI__T_OUT_B_IN_VL_IN_VR_OUT (0x15 << 0)
#define SC_EDGERULE__ER_TRI__T_OUT_B_IN_VL_OUT_VR_IN (0x16 << 0)
#define SC_EDGERULE__ER_TRI__T_OUT_B_IN_VL_OUT_VR_OUT (0x17 << 0)
#define SC_EDGERULE__ER_TRI__T_IN_B_OUT_VL_IN_VR_IN (0x18 << 0)
#define SC_EDGERULE__ER_TRI__T_IN_B_OUT_VL_IN_VR_OUT (0x19 << 0)
#define SC_EDGERULE__ER_TRI__T_IN_B_OUT_VL_OUT_VR_IN (0x1a << 0)
#define SC_EDGERULE__ER_TRI__T_IN_B_OUT_VL_OUT_VR_OUT (0x1b << 0)
#define SC_EDGERULE__ER_TRI__T_OUT_B_OUT_VL_IN_VR_IN (0x1c << 0)
#define SC_EDGERULE__ER_TRI__T_OUT_B_OUT_VL_IN_VR_OUT (0x1d << 0)
#define SC_EDGERULE__ER_TRI__T_OUT_B_OUT_VL_OUT_VR_IN (0x1e << 0)
#define SC_EDGERULE__ER_TRI__T_OUT_B_OUT_VL_OUT_VR_OUT (0x1f << 0)
#define SC_EDGERULE__ER_POINT(n) (((n) & 0x1f) << 5)
#define SC_EDGERULE__ER_POINT__L_IN_R_IN_HT_IN_HB_IN (0x0 << 5)
#define SC_EDGERULE__ER_POINT__L_IN_R_IN_HT_IN_HB_OUT (0x1 << 5)
#define SC_EDGERULE__ER_POINT__L_IN_R_IN_HT_OUT_HB_IN (0x2 << 5)
#define SC_EDGERULE__ER_POINT__L_IN_R_IN_HT_OUT_HB_OUT (0x3 << 5)
#define SC_EDGERULE__ER_POINT__L_IN_R_OUT_HT_IN_HB_IN (0x4 << 5)
#define SC_EDGERULE__ER_POINT__L_IN_R_OUT_HT_IN_HB_OUT (0x5 << 5)
#define SC_EDGERULE__ER_POINT__L_IN_R_OUT_HT_OUT_HB_IN (0x6 << 5)
#define SC_EDGERULE__ER_POINT__L_IN_R_OUT_HT_OUT_HB_OUT (0x7 << 5)
#define SC_EDGERULE__ER_POINT__L_OUT_R_IN_HT_IN_HB_IN (0x8 << 5)
#define SC_EDGERULE__ER_POINT__L_OUT_R_IN_HT_IN_HB_OUT (0x9 << 5)
#define SC_EDGERULE__ER_POINT__L_OUT_R_IN_HT_OUT_HB_IN (0xa << 5)
#define SC_EDGERULE__ER_POINT__L_OUT_R_IN_HT_OUT_HB_OUT (0xb << 5)
#define SC_EDGERULE__ER_POINT__L_OUT_R_OUT_HT_IN_HB_IN (0xc << 5)
#define SC_EDGERULE__ER_POINT__L_OUT_R_OUT_HT_IN_HB_OUT (0xd << 5)
#define SC_EDGERULE__ER_POINT__L_OUT_R_OUT_HT_OUT_HB_IN (0xe << 5)
#define SC_EDGERULE__ER_POINT__L_OUT_R_OUT_HT_OUT_HB_OUT (0xf << 5)
#define SC_EDGERULE__ER_POINT__T_IN_B_IN_VL_IN_VR_IN (0x10 << 5)
#define SC_EDGERULE__ER_POINT__T_IN_B_IN_VL_IN_VR_OUT (0x11 << 5)
#define SC_EDGERULE__ER_POINT__T_IN_B_IN_VL_VR_IN (0x12 << 5)
#define SC_EDGERULE__ER_POINT__T_IN_B_IN_VL_OUT_VR_OUT (0x13 << 5)
#define SC_EDGERULE__ER_POINT__T_OUT_B_IN_VL_IN_VR_IN (0x14 << 5)
#define SC_EDGERULE__ER_POINT__T_OUT_B_IN_VL_IN_VR_OUT (0x15 << 5)
#define SC_EDGERULE__ER_POINT__T_OUT_B_IN_VL_OUT_VR_IN (0x16 << 5)
#define SC_EDGERULE__ER_POINT__T_OUT_B_IN_VL_OUT_VR_OUT (0x17 << 5)
#define SC_EDGERULE__ER_POINT__T_IN_B_OUT_VL_IN_VR_IN (0x18 << 5)
#define SC_EDGERULE__ER_POINT__T_IN_B_OUT_VL_IN_VR_OUT (0x19 << 5)
#define SC_EDGERULE__ER_POINT__T_IN_B_OUT_VL_OUT_VR_IN (0x1a << 5)
#define SC_EDGERULE__ER_POINT__T_IN_B_OUT_VL_OUT_VR_OUT (0x1b << 5)
#define SC_EDGERULE__ER_POINT__T_OUT_B_OUT_VL_IN_VR_IN (0x1c << 5)
#define SC_EDGERULE__ER_POINT__T_OUT_B_OUT_VL_IN_VR_OUT (0x1d << 5)
#define SC_EDGERULE__ER_POINT__T_OUT_B_OUT_VL_OUT_VR_IN (0x1e << 5)
#define SC_EDGERULE__ER_POINT__T_OUT_B_OUT_VL_OUT_VR_OUT (0x1f << 5)
#define SC_EDGERULE__ER_LINE_LR(n) (((n) & 0x1f) << 10)
#define SC_EDGERULE__ER_LINE_LR__L_IN_R_IN_HT_IN_HB_IN (0x0 << 10)
#define SC_EDGERULE__ER_LINE_LR__L_IN_R_IN_HT_IN_HB_OUT (0x1 << 10)
#define SC_EDGERULE__ER_LINE_LR__L_IN_R_IN_HT_OUT_HB_IN (0x2 << 10)
#define SC_EDGERULE__ER_LINE_LR__L_IN_R_IN_HT_OUT_HB_OUT (0x3 << 10)
#define SC_EDGERULE__ER_LINE_LR__L_IN_R_OUT_HT_IN_HB_IN (0x4 << 10)
#define SC_EDGERULE__ER_LINE_LR__L_IN_R_OUT_HT_IN_HB_OUT (0x5 << 10)
#define SC_EDGERULE__ER_LINE_LR__L_IN_R_OUT_HT_OUT_HB_IN (0x6 << 10)
#define SC_EDGERULE__ER_LINE_LR__L_IN_R_OUT_HT_OUT_HB_OUT (0x7 << 10)
#define SC_EDGERULE__ER_LINE_LR__L_OUT_R_IN_HT_IN_HB_IN (0x8 << 10)
#define SC_EDGERULE__ER_LINE_LR__L_OUT_R_IN_HT_IN_HB_OUT (0x9 << 10)
#define SC_EDGERULE__ER_LINE_LR__L_OUT_R_IN_HT_OUT_HB_IN (0xa << 10)
#define SC_EDGERULE__ER_LINE_LR__L_OUT_R_IN_HT_OUT_HB_OUT (0xb << 10)
#define SC_EDGERULE__ER_LINE_LR__L_OUT_R_OUT_HT_IN_HB_IN (0xc << 10)
#define SC_EDGERULE__ER_LINE_LR__L_OUT_R_OUT_HT_IN_HB_OUT (0xd << 10)
#define SC_EDGERULE__ER_LINE_LR__L_OUT_R_OUT_HT_OUT_HB_IN (0xe << 10)
#define SC_EDGERULE__ER_LINE_LR__L_OUT_R_OUT_HT_OUT_HB_OUT (0xf << 10)
#define SC_EDGERULE__ER_LINE_LR__T_IN_B_IN_VL_IN_VR_IN (0x10 << 10)
#define SC_EDGERULE__ER_LINE_LR__T_IN_B_IN_VL_IN_VR_OUT (0x11 << 10)
#define SC_EDGERULE__ER_LINE_LR__T_IN_B_IN_VL_VR_IN (0x12 << 10)
#define SC_EDGERULE__ER_LINE_LR__T_IN_B_IN_VL_OUT_VR_OUT (0x13 << 10)
#define SC_EDGERULE__ER_LINE_LR__T_OUT_B_IN_VL_IN_VR_IN (0x14 << 10)
#define SC_EDGERULE__ER_LINE_LR__T_OUT_B_IN_VL_IN_VR_OUT (0x15 << 10)
#define SC_EDGERULE__ER_LINE_LR__T_OUT_B_IN_VL_OUT_VR_IN (0x16 << 10)
#define SC_EDGERULE__ER_LINE_LR__T_OUT_B_IN_VL_OUT_VR_OUT (0x17 << 10)
#define SC_EDGERULE__ER_LINE_LR__T_IN_B_OUT_VL_IN_VR_IN (0x18 << 10)
#define SC_EDGERULE__ER_LINE_LR__T_IN_B_OUT_VL_IN_VR_OUT (0x19 << 10)
#define SC_EDGERULE__ER_LINE_LR__T_IN_B_OUT_VL_OUT_VR_IN (0x1a << 10)
#define SC_EDGERULE__ER_LINE_LR__T_IN_B_OUT_VL_OUT_VR_OUT (0x1b << 10)
#define SC_EDGERULE__ER_LINE_LR__T_OUT_B_OUT_VL_IN_VR_IN (0x1c << 10)
#define SC_EDGERULE__ER_LINE_LR__T_OUT_B_OUT_VL_IN_VR_OUT (0x1d << 10)
#define SC_EDGERULE__ER_LINE_LR__T_OUT_B_OUT_VL_OUT_VR_IN (0x1e << 10)
#define SC_EDGERULE__ER_LINE_LR__T_OUT_B_OUT_VL_OUT_VR_OUT (0x1f << 10)
#define SC_EDGERULE__ER_LINE_RL(n) (((n) & 0x1f) << 15)
#define SC_EDGERULE__ER_LINE_RL__L_IN_R_IN_HT_IN_HB_IN (0x0 << 15)
#define SC_EDGERULE__ER_LINE_RL__L_IN_R_IN_HT_IN_HB_OUT (0x1 << 15)
#define SC_EDGERULE__ER_LINE_RL__L_IN_R_IN_HT_OUT_HB_IN (0x2 << 15)
#define SC_EDGERULE__ER_LINE_RL__L_IN_R_IN_HT_OUT_HB_OUT (0x3 << 15)
#define SC_EDGERULE__ER_LINE_RL__L_IN_R_OUT_HT_IN_HB_IN (0x4 << 15)
#define SC_EDGERULE__ER_LINE_RL__L_IN_R_OUT_HT_IN_HB_OUT (0x5 << 15)
#define SC_EDGERULE__ER_LINE_RL__L_IN_R_OUT_HT_OUT_HB_IN (0x6 << 15)
#define SC_EDGERULE__ER_LINE_RL__L_IN_R_OUT_HT_OUT_HB_OUT (0x7 << 15)
#define SC_EDGERULE__ER_LINE_RL__L_OUT_R_IN_HT_IN_HB_IN (0x8 << 15)
#define SC_EDGERULE__ER_LINE_RL__L_OUT_R_IN_HT_IN_HB_OUT (0x9 << 15)
#define SC_EDGERULE__ER_LINE_RL__L_OUT_R_IN_HT_OUT_HB_IN (0xa << 15)
#define SC_EDGERULE__ER_LINE_RL__L_OUT_R_IN_HT_OUT_HB_OUT (0xb << 15)
#define SC_EDGERULE__ER_LINE_RL__L_OUT_R_OUT_HT_IN_HB_IN (0xc << 15)
#define SC_EDGERULE__ER_LINE_RL__L_OUT_R_OUT_HT_IN_HB_OUT (0xd << 15)
#define SC_EDGERULE__ER_LINE_RL__L_OUT_R_OUT_HT_OUT_HB_IN (0xe << 15)
#define SC_EDGERULE__ER_LINE_RL__L_OUT_R_OUT_HT_OUT_HB_OUT (0xf << 15)
#define SC_EDGERULE__ER_LINE_RL__T_IN_B_IN_VL_IN_VR_IN (0x10 << 15)
#define SC_EDGERULE__ER_LINE_RL__T_IN_B_IN_VL_IN_VR_OUT (0x11 << 15)
#define SC_EDGERULE__ER_LINE_RL__T_IN_B_IN_VL_VR_IN (0x12 << 15)
#define SC_EDGERULE__ER_LINE_RL__T_IN_B_IN_VL_OUT_VR_OUT (0x13 << 15)
#define SC_EDGERULE__ER_LINE_RL__T_OUT_B_IN_VL_IN_VR_IN (0x14 << 15)
#define SC_EDGERULE__ER_LINE_RL__T_OUT_B_IN_VL_IN_VR_OUT (0x15 << 15)
#define SC_EDGERULE__ER_LINE_RL__T_OUT_B_IN_VL_OUT_VR_IN (0x16 << 15)
#define SC_EDGERULE__ER_LINE_RL__T_OUT_B_IN_VL_OUT_VR_OUT (0x17 << 15)
#define SC_EDGERULE__ER_LINE_RL__T_IN_B_OUT_VL_IN_VR_IN (0x18 << 15)
#define SC_EDGERULE__ER_LINE_RL__T_IN_B_OUT_VL_IN_VR_OUT (0x19 << 15)
#define SC_EDGERULE__ER_LINE_RL__T_IN_B_OUT_VL_OUT_VR_IN (0x1a << 15)
#define SC_EDGERULE__ER_LINE_RL__T_IN_B_OUT_VL_OUT_VR_OUT (0x1b << 15)
#define SC_EDGERULE__ER_LINE_RL__T_OUT_B_OUT_VL_IN_VR_IN (0x1c << 15)
#define SC_EDGERULE__ER_LINE_RL__T_OUT_B_OUT_VL_IN_VR_OUT (0x1d << 15)
#define SC_EDGERULE__ER_LINE_RL__T_OUT_B_OUT_VL_OUT_VR_IN (0x1e << 15)
#define SC_EDGERULE__ER_LINE_RL__T_OUT_B_OUT_VL_OUT_VR_OUT (0x1f << 15)
#define SC_EDGERULE__ER_LINE_TB(n) (((n) & 0x1f) << 20)
#define SC_EDGERULE__ER_LINE_TB__L_IN_R_IN_HT_IN_HB_IN (0x0 << 20)
#define SC_EDGERULE__ER_LINE_TB__L_IN_R_IN_HT_IN_HB_OUT (0x1 << 20)
#define SC_EDGERULE__ER_LINE_TB__L_IN_R_IN_HT_OUT_HB_IN (0x2 << 20)
#define SC_EDGERULE__ER_LINE_TB__L_IN_R_IN_HT_OUT_HB_OUT (0x3 << 20)
#define SC_EDGERULE__ER_LINE_TB__L_IN_R_OUT_HT_IN_HB_IN (0x4 << 20)
#define SC_EDGERULE__ER_LINE_TB__L_IN_R_OUT_HT_IN_HB_OUT (0x5 << 20)
#define SC_EDGERULE__ER_LINE_TB__L_IN_R_OUT_HT_OUT_HB_IN (0x6 << 20)
#define SC_EDGERULE__ER_LINE_TB__L_IN_R_OUT_HT_OUT_HB_OUT (0x7 << 20)
#define SC_EDGERULE__ER_LINE_TB__L_OUT_R_IN_HT_IN_HB_IN (0x8 << 20)
#define SC_EDGERULE__ER_LINE_TB__L_OUT_R_IN_HT_IN_HB_OUT (0x9 << 20)
#define SC_EDGERULE__ER_LINE_TB__L_OUT_R_IN_HT_OUT_HB_IN (0xa << 20)
#define SC_EDGERULE__ER_LINE_TB__L_OUT_R_IN_HT_OUT_HB_OUT (0xb << 20)
#define SC_EDGERULE__ER_LINE_TB__L_OUT_R_OUT_HT_IN_HB_IN (0xc << 20)
#define SC_EDGERULE__ER_LINE_TB__L_OUT_R_OUT_HT_IN_HB_OUT (0xd << 20)
#define SC_EDGERULE__ER_LINE_TB__L_OUT_R_OUT_HT_OUT_HB_IN (0xe << 20)
#define SC_EDGERULE__ER_LINE_TB__L_OUT_R_OUT_HT_OUT_HB_OUT (0xf << 20)
#define SC_EDGERULE__ER_LINE_TB__T_IN_B_IN_VL_IN_VR_IN (0x10 << 20)
#define SC_EDGERULE__ER_LINE_TB__T_IN_B_IN_VL_IN_VR_OUT (0x11 << 20)
#define SC_EDGERULE__ER_LINE_TB__T_IN_B_IN_VL_VR_IN (0x12 << 20)
#define SC_EDGERULE__ER_LINE_TB__T_IN_B_IN_VL_OUT_VR_OUT (0x13 << 20)
#define SC_EDGERULE__ER_LINE_TB__T_OUT_B_IN_VL_IN_VR_IN (0x14 << 20)
#define SC_EDGERULE__ER_LINE_TB__T_OUT_B_IN_VL_IN_VR_OUT (0x15 << 20)
#define SC_EDGERULE__ER_LINE_TB__T_OUT_B_IN_VL_OUT_VR_IN (0x16 << 20)
#define SC_EDGERULE__ER_LINE_TB__T_OUT_B_IN_VL_OUT_VR_OUT (0x17 << 20)
#define SC_EDGERULE__ER_LINE_TB__T_IN_B_OUT_VL_IN_VR_IN (0x18 << 20)
#define SC_EDGERULE__ER_LINE_TB__T_IN_B_OUT_VL_IN_VR_OUT (0x19 << 20)
#define SC_EDGERULE__ER_LINE_TB__T_IN_B_OUT_VL_OUT_VR_IN (0x1a << 20)
#define SC_EDGERULE__ER_LINE_TB__T_IN_B_OUT_VL_OUT_VR_OUT (0x1b << 20)
#define SC_EDGERULE__ER_LINE_TB__T_OUT_B_OUT_VL_IN_VR_IN (0x1c << 20)
#define SC_EDGERULE__ER_LINE_TB__T_OUT_B_OUT_VL_IN_VR_OUT (0x1d << 20)
#define SC_EDGERULE__ER_LINE_TB__T_OUT_B_OUT_VL_OUT_VR_IN (0x1e << 20)
#define SC_EDGERULE__ER_LINE_TB__T_OUT_B_OUT_VL_OUT_VR_OUT (0x1f << 20)
#define SC_EDGERULE__ER_LINE_BT(n) (((n) & 0x1f) << 25)
#define SC_EDGERULE__ER_LINE_BT__L_IN_R_IN_HT_IN_HB_IN (0x0 << 25)
#define SC_EDGERULE__ER_LINE_BT__L_IN_R_IN_HT_IN_HB_OUT (0x1 << 25)
#define SC_EDGERULE__ER_LINE_BT__L_IN_R_IN_HT_OUT_HB_IN (0x2 << 25)
#define SC_EDGERULE__ER_LINE_BT__L_IN_R_IN_HT_OUT_HB_OUT (0x3 << 25)
#define SC_EDGERULE__ER_LINE_BT__L_IN_R_OUT_HT_IN_HB_IN (0x4 << 25)
#define SC_EDGERULE__ER_LINE_BT__L_IN_R_OUT_HT_IN_HB_OUT (0x5 << 25)
#define SC_EDGERULE__ER_LINE_BT__L_IN_R_OUT_HT_OUT_HB_IN (0x6 << 25)
#define SC_EDGERULE__ER_LINE_BT__L_IN_R_OUT_HT_OUT_HB_OUT (0x7 << 25)
#define SC_EDGERULE__ER_LINE_BT__L_OUT_R_IN_HT_IN_HB_IN (0x8 << 25)
#define SC_EDGERULE__ER_LINE_BT__L_OUT_R_IN_HT_IN_HB_OUT (0x9 << 25)
#define SC_EDGERULE__ER_LINE_BT__L_OUT_R_IN_HT_OUT_HB_IN (0xa << 25)
#define SC_EDGERULE__ER_LINE_BT__L_OUT_R_IN_HT_OUT_HB_OUT (0xb << 25)
#define SC_EDGERULE__ER_LINE_BT__L_OUT_R_OUT_HT_IN_HB_IN (0xc << 25)
#define SC_EDGERULE__ER_LINE_BT__L_OUT_R_OUT_HT_IN_HB_OUT (0xd << 25)
#define SC_EDGERULE__ER_LINE_BT__L_OUT_R_OUT_HT_OUT_HB_IN (0xe << 25)
#define SC_EDGERULE__ER_LINE_BT__L_OUT_R_OUT_HT_OUT_HB_OUT (0xf << 25)
#define SC_EDGERULE__ER_LINE_BT__T_IN_B_IN_VL_IN_VR_IN (0x10 << 25)
#define SC_EDGERULE__ER_LINE_BT__T_IN_B_IN_VL_IN_VR_OUT (0x11 << 25)
#define SC_EDGERULE__ER_LINE_BT__T_IN_B_IN_VL_VR_IN (0x12 << 25)
#define SC_EDGERULE__ER_LINE_BT__T_IN_B_IN_VL_OUT_VR_OUT (0x13 << 25)
#define SC_EDGERULE__ER_LINE_BT__T_OUT_B_IN_VL_IN_VR_IN (0x14 << 25)
#define SC_EDGERULE__ER_LINE_BT__T_OUT_B_IN_VL_IN_VR_OUT (0x15 << 25)
#define SC_EDGERULE__ER_LINE_BT__T_OUT_B_IN_VL_OUT_VR_IN (0x16 << 25)
#define SC_EDGERULE__ER_LINE_BT__T_OUT_B_IN_VL_OUT_VR_OUT (0x17 << 25)
#define SC_EDGERULE__ER_LINE_BT__T_IN_B_OUT_VL_IN_VR_IN (0x18 << 25)
#define SC_EDGERULE__ER_LINE_BT__T_IN_B_OUT_VL_IN_VR_OUT (0x19 << 25)
#define SC_EDGERULE__ER_LINE_BT__T_IN_B_OUT_VL_OUT_VR_IN (0x1a << 25)
#define SC_EDGERULE__ER_LINE_BT__T_IN_B_OUT_VL_OUT_VR_OUT (0x1b << 25)
#define SC_EDGERULE__ER_LINE_BT__T_OUT_B_OUT_VL_IN_VR_IN (0x1c << 25)
#define SC_EDGERULE__ER_LINE_BT__T_OUT_B_OUT_VL_IN_VR_OUT (0x1d << 25)
#define SC_EDGERULE__ER_LINE_BT__T_OUT_B_OUT_VL_OUT_VR_IN (0x1e << 25)
#define SC_EDGERULE__ER_LINE_BT__T_OUT_B_OUT_VL_OUT_VR_OUT (0x1f << 25)
#define SC_HYPERZ_EN__HZ_EN(n) (((n) & 0x1) << 0)
#define SC_HYPERZ_EN__HZ_MAX(n) (((n) & 0x1) << 1)
#define SC_HYPERZ_EN__HZ_ADJ(n) (((n) & 0x7) << 2)
#define SC_HYPERZ_EN__HZ_Z0MIN(n) (((n) & 0x1) << 5)
#define SC_HYPERZ_EN__HZ_Z0MAX(n) (((n) & 0x1) << 6)
#define SC_SCISSOR0__XS0(n) (((n) & 0x1fff) << 0)
#define SC_SCISSOR0__YS0(n) (((n) & 0x1fff) << 13)
#define SC_SCISSOR1__XS1(n) (((n) & 0x1fff) << 0)
#define SC_SCISSOR1__YS1(n) (((n) & 0x1fff) << 13)
#define SC_SCREENDOOR__SCREENDOOR(n) (((n) & 0xffffff) << 0)
#define SU_CULL_MODE__CULL_FRONT(n) (((n) & 0x1) << 0)
#define SU_CULL_MODE__CULL_BACK(n) (((n) & 0x1) << 1)
#define SU_CULL_MODE__FACE(n) (((n) & 0x1) << 2)
#define SU_DEPTH_OFFSET__OFFSET(n) (((n) & 0xffffffff) << 0)
#define SU_DEPTH_SCALE__SCALE(n) (((n) & 0xffffffff) << 0)
#define SU_POLY_OFFSET_BACK_OFFSET__OFFSET(n) (((n) & 0xffffffff) << 0)
#define SU_POLY_OFFSET_BACK_SCALE__SCALE(n) (((n) & 0xffffffff) << 0)
#define SU_POLY_OFFSET_ENABLE__FRONT_ENABLE(n) (((n) & 0x1) << 0)
#define SU_POLY_OFFSET_ENABLE__BACK_ENABLE(n) (((n) & 0x1) << 1)
#define SU_POLY_OFFSET_ENABLE__PARA_ENABLE(n) (((n) & 0x1) << 2)
#define SU_POLY_OFFSET_FRONT_OFFSET__OFFSET(n) (((n) & 0xffffffff) << 0)
#define SU_POLY_OFFSET_FRONT_SCALE__SCALE(n) (((n) & 0xffffffff) << 0)
#define SU_REG_DEST__SELECT(n) (((n) & 0xf) << 0)
#define SU_TEX_WRAP__T0C0(n) (((n) & 0x1) << 0)
#define SU_TEX_WRAP__T0C1(n) (((n) & 0x1) << 1)
#define SU_TEX_WRAP__T0C2(n) (((n) & 0x1) << 2)
#define SU_TEX_WRAP__T0C3(n) (((n) & 0x1) << 3)
#define SU_TEX_WRAP__T1C0(n) (((n) & 0x1) << 4)
#define SU_TEX_WRAP__T1C1(n) (((n) & 0x1) << 5)
#define SU_TEX_WRAP__T1C2(n) (((n) & 0x1) << 6)
#define SU_TEX_WRAP__T1C3(n) (((n) & 0x1) << 7)
#define SU_TEX_WRAP__T2C0(n) (((n) & 0x1) << 8)
#define SU_TEX_WRAP__T2C1(n) (((n) & 0x1) << 9)
#define SU_TEX_WRAP__T2C2(n) (((n) & 0x1) << 10)
#define SU_TEX_WRAP__T2C3(n) (((n) & 0x1) << 11)
#define SU_TEX_WRAP__T3C0(n) (((n) & 0x1) << 12)
#define SU_TEX_WRAP__T3C1(n) (((n) & 0x1) << 13)
#define SU_TEX_WRAP__T3C2(n) (((n) & 0x1) << 14)
#define SU_TEX_WRAP__T3C3(n) (((n) & 0x1) << 15)
#define SU_TEX_WRAP__T4C0(n) (((n) & 0x1) << 16)
#define SU_TEX_WRAP__T4C1(n) (((n) & 0x1) << 17)
#define SU_TEX_WRAP__T4C2(n) (((n) & 0x1) << 18)
#define SU_TEX_WRAP__T4C3(n) (((n) & 0x1) << 19)
#define SU_TEX_WRAP__T5C0(n) (((n) & 0x1) << 20)
#define SU_TEX_WRAP__T5C1(n) (((n) & 0x1) << 21)
#define SU_TEX_WRAP__T5C2(n) (((n) & 0x1) << 22)
#define SU_TEX_WRAP__T5C3(n) (((n) & 0x1) << 23)
#define SU_TEX_WRAP__T6C0(n) (((n) & 0x1) << 24)
#define SU_TEX_WRAP__T6C1(n) (((n) & 0x1) << 25)
#define SU_TEX_WRAP__T6C2(n) (((n) & 0x1) << 26)
#define SU_TEX_WRAP__T6C3(n) (((n) & 0x1) << 27)
#define SU_TEX_WRAP__T7C0(n) (((n) & 0x1) << 28)
#define SU_TEX_WRAP__T7C1(n) (((n) & 0x1) << 29)
#define SU_TEX_WRAP__T7C2(n) (((n) & 0x1) << 30)
#define SU_TEX_WRAP__T7C3(n) (((n) & 0x1) << 31)
#define SU_TEX_WRAP_PS3__T9C0(n) (((n) & 0x1) << 0)
#define SU_TEX_WRAP_PS3__T9C1(n) (((n) & 0x1) << 1)
#define SU_TEX_WRAP_PS3__T9C2(n) (((n) & 0x1) << 2)
#define SU_TEX_WRAP_PS3__T9C3(n) (((n) & 0x1) << 3)
#define SU_TEX_WRAP_PS3__T8C0(n) (((n) & 0x1) << 4)
#define SU_TEX_WRAP_PS3__T8C1(n) (((n) & 0x1) << 5)
#define SU_TEX_WRAP_PS3__T8C2(n) (((n) & 0x1) << 6)
#define SU_TEX_WRAP_PS3__T8C3(n) (((n) & 0x1) << 7)
#define TX_BORDER_COLOR__BORDER_COLOR(n) (((n) & 0xffffffff) << 0)
#define TX_CHROMA_KEY__CHROMA_KEY(n) (((n) & 0xffffffff) << 0)
#define TX_ENABLE__TEX_0_ENABLE(n) (((n) & 0x1) << 0)
#define TX_ENABLE__TEX_0_ENABLE__ENABLE (0x1 << 0)
#define TX_ENABLE__TEX_1_ENABLE(n) (((n) & 0x1) << 1)
#define TX_ENABLE__TEX_1_ENABLE__ENABLE (0x1 << 1)
#define TX_ENABLE__TEX_2_ENABLE(n) (((n) & 0x1) << 2)
#define TX_ENABLE__TEX_2_ENABLE__ENABLE (0x1 << 2)
#define TX_ENABLE__TEX_3_ENABLE(n) (((n) & 0x1) << 3)
#define TX_ENABLE__TEX_3_ENABLE__ENABLE (0x1 << 3)
#define TX_ENABLE__TEX_4_ENABLE(n) (((n) & 0x1) << 4)
#define TX_ENABLE__TEX_4_ENABLE__ENABLE (0x1 << 4)
#define TX_ENABLE__TEX_5_ENABLE(n) (((n) & 0x1) << 5)
#define TX_ENABLE__TEX_5_ENABLE__ENABLE (0x1 << 5)
#define TX_ENABLE__TEX_6_ENABLE(n) (((n) & 0x1) << 6)
#define TX_ENABLE__TEX_6_ENABLE__ENABLE (0x1 << 6)
#define TX_ENABLE__TEX_7_ENABLE(n) (((n) & 0x1) << 7)
#define TX_ENABLE__TEX_7_ENABLE__ENABLE (0x1 << 7)
#define TX_ENABLE__TEX_8_ENABLE(n) (((n) & 0x1) << 8)
#define TX_ENABLE__TEX_8_ENABLE__ENABLE (0x1 << 8)
#define TX_ENABLE__TEX_9_ENABLE(n) (((n) & 0x1) << 9)
#define TX_ENABLE__TEX_9_ENABLE__ENABLE (0x1 << 9)
#define TX_ENABLE__TEX_10_ENABLE(n) (((n) & 0x1) << 10)
#define TX_ENABLE__TEX_10_ENABLE__ENABLE (0x1 << 10)
#define TX_ENABLE__TEX_11_ENABLE(n) (((n) & 0x1) << 11)
#define TX_ENABLE__TEX_11_ENABLE__ENABLE (0x1 << 11)
#define TX_ENABLE__TEX_12_ENABLE(n) (((n) & 0x1) << 12)
#define TX_ENABLE__TEX_12_ENABLE__ENABLE (0x1 << 12)
#define TX_ENABLE__TEX_13_ENABLE(n) (((n) & 0x1) << 13)
#define TX_ENABLE__TEX_13_ENABLE__ENABLE (0x1 << 13)
#define TX_ENABLE__TEX_14_ENABLE(n) (((n) & 0x1) << 14)
#define TX_ENABLE__TEX_14_ENABLE__ENABLE (0x1 << 14)
#define TX_ENABLE__TEX_15_ENABLE(n) (((n) & 0x1) << 15)
#define TX_ENABLE__TEX_15_ENABLE__ENABLE (0x1 << 15)
#define TX_FILTER0__CLAMP_S(n) (((n) & 0x7) << 0)
#define TX_FILTER0__CLAMP_S__MIRROR (0x1 << 0)
#define TX_FILTER0__CLAMP_T(n) (((n) & 0x7) << 3)
#define TX_FILTER0__CLAMP_T__MIRROR (0x1 << 3)
#define TX_FILTER0__CLAMP_R(n) (((n) & 0x7) << 6)
#define TX_FILTER0__CLAMP_R__MIRROR (0x1 << 6)
#define TX_FILTER0__MAG_FILTER(n) (((n) & 0x3) << 9)
#define TX_FILTER0__MAG_FILTER__FILTER4 (0x0 << 9)
#define TX_FILTER0__MAG_FILTER__POINT (0x1 << 9)
#define TX_FILTER0__MAG_FILTER__LINEAR (0x2 << 9)
#define TX_FILTER0__MIN_FILTER(n) (((n) & 0x3) << 11)
#define TX_FILTER0__MIN_FILTER__FILTER4 (0x0 << 11)
#define TX_FILTER0__MIN_FILTER__POINT (0x1 << 11)
#define TX_FILTER0__MIN_FILTER__LINEAR (0x2 << 11)
#define TX_FILTER0__MIP_FILTER(n) (((n) & 0x3) << 13)
#define TX_FILTER0__MIP_FILTER__NONE (0x0 << 13)
#define TX_FILTER0__MIP_FILTER__POINT (0x1 << 13)
#define TX_FILTER0__MIP_FILTER__LINEAR (0x2 << 13)
#define TX_FILTER0__VOL_FILTER(n) (((n) & 0x3) << 15)
#define TX_FILTER0__VOL_FILTER__POINT (0x1 << 15)
#define TX_FILTER0__VOL_FILTER__LINEAR (0x2 << 15)
#define TX_FILTER0__MAX_MIP_LEVEL(n) (((n) & 0xf) << 17)
#define TX_FILTER0__ID(n) (((n) & 0xf) << 28)
#define TX_FILTER1__CHROMA_KEY_MODE(n) (((n) & 0x3) << 0)
#define TX_FILTER1__CHROMA_KEY_MODE__DISABLE (0x0 << 0)
#define TX_FILTER1__MC_ROUND(n) (((n) & 0x1) << 2)
#define TX_FILTER1__LOD_BIAS(n) (((n) & 0x3ff) << 3)
#define TX_FILTER1__MC_COORD_TRUNCATE(n) (((n) & 0x1) << 14)
#define TX_FILTER1__TRI_PERF(n) (((n) & 0x3) << 15)
#define TX_FILTER1__MACRO_SWITCH(n) (((n) & 0x1) << 22)
#define TX_FILTER1__BORDER_FIX(n) (((n) & 0x1) << 31)
#define TX_FILTER4__WEIGHT_1(n) (((n) & 0x7ff) << 0)
#define TX_FILTER4__WEIGHT_0(n) (((n) & 0x7ff) << 11)
#define TX_FILTER4__WEIGHT_PAIR(n) (((n) & 0x1) << 22)
#define TX_FILTER4__PHASE(n) (((n) & 0xf) << 23)
#define TX_FILTER4__DIRECTION(n) (((n) & 0x1) << 27)
#define TX_FILTER4__DIRECTION__HORIZONTAL (0x0 << 27)
#define TX_FILTER4__DIRECTION__VERTICAL (0x1 << 27)
#define TX_FORMAT0__TXWIDTH(n) (((n) & 0x7ff) << 0)
#define TX_FORMAT0__TXHEIGHT(n) (((n) & 0x7ff) << 11)
#define TX_FORMAT0__TXDEPTH(n) (((n) & 0xf) << 22)
#define TX_FORMAT0__NUM_LEVELS(n) (((n) & 0xf) << 26)
#define TX_FORMAT0__PROJECTED(n) (((n) & 0x1) << 30)
#define TX_FORMAT0__PROJECTED__NON_PROJECTED (0x0 << 30)
#define TX_FORMAT0__PROJECTED__PROJECTED (0x1 << 30)
#define TX_FORMAT0__TXPITCH_EN(n) (((n) & 0x1) << 31)
#define TX_FORMAT1__TXFORMAT(n) (((n) & 0x1f) << 0)
#define TX_FORMAT1__TXFORMAT__TX_FMT_6_5_5 (0x7 << 0)
#define TX_FORMAT1__TXFORMAT__TX_FMT_11_11_10 (0x8 << 0)
#define TX_FORMAT1__TXFORMAT__TX_FMT_10_11_11 (0x9 << 0)
#define TX_FORMAT1__TXFORMAT__TX_FMT_4_4_4_4 (0xa << 0)
#define TX_FORMAT1__TXFORMAT__TX_FMT_1_5_5_5 (0xb << 0)
#define TX_FORMAT1__TXFORMAT__TX_FMT_8_8_8_8 (0xc << 0)
#define TX_FORMAT1__TXFORMAT__TX_FMT_2_10_10_10 (0xd << 0)
#define TX_FORMAT1__TXFORMAT__TX_FMT_16_16_16_16 (0xe << 0)
#define TX_FORMAT1__TXFORMAT__TX_FMT_Y8 (0x12 << 0)
#define TX_FORMAT1__TXFORMAT__TX_FMT_AVYU444 (0x13 << 0)
#define TX_FORMAT1__TXFORMAT__TX_FMT_VYUY422 (0x14 << 0)
#define TX_FORMAT1__TXFORMAT__TX_FMT_YVYU422 (0x15 << 0)
#define TX_FORMAT1__TXFORMAT__TX_FMT_16_MPEG (0x16 << 0)
#define TX_FORMAT1__TXFORMAT__TX_FMT_16_16_MPEG (0x17 << 0)
#define TX_FORMAT1__TXFORMAT__TX_FMT_16F (0x18 << 0)
#define TX_FORMAT1__TXFORMAT__TX_FMT_16F_16F (0x19 << 0)
#define TX_FORMAT1__TXFORMAT__TX_FMT_16F_16F_16F_16F (0x1a << 0)
#define TX_FORMAT1__TXFORMAT__TX_FMT_32F (0x1b << 0)
#define TX_FORMAT1__TXFORMAT__TX_FMT_32F_32F (0x1c << 0)
#define TX_FORMAT1__TXFORMAT__TX_FMT_32F_32F_32F_32F (0x1d << 0)
#define TX_FORMAT1__TXFORMAT__TX_FMT_W24_FP (0x1e << 0)
#define TX_FORMAT1__TXFORMAT__TX_FMT_ATI2N (0x1f << 0)
#define TX_FORMAT1__SIGNED_COMP0(n) (((n) & 0x1) << 5)
#define TX_FORMAT1__SIGNED_COMP1(n) (((n) & 0x1) << 6)
#define TX_FORMAT1__SIGNED_COMP2(n) (((n) & 0x1) << 7)
#define TX_FORMAT1__SIGNED_COMP3(n) (((n) & 0x1) << 8)
#define TX_FORMAT1__SEL_ALPHA(n) (((n) & 0x7) << 9)
#define TX_FORMAT1__SEL_RED(n) (((n) & 0x7) << 12)
#define TX_FORMAT1__SEL_GREEN(n) (((n) & 0x7) << 15)
#define TX_FORMAT1__SEL_BLUE(n) (((n) & 0x7) << 18)
#define TX_FORMAT1__GAMMA(n) (((n) & 0x1) << 21)
#define TX_FORMAT1__YUV_TO_RGB(n) (((n) & 0x3) << 22)
#define TX_FORMAT1__SWAP_YUV(n) (((n) & 0x1) << 24)
#define TX_FORMAT1__TEX_COORD_TYPE(n) (((n) & 0x3) << 25)
#define TX_FORMAT1__TEX_COORD_TYPE__2D (0x0 << 25)
#define TX_FORMAT1__TEX_COORD_TYPE__3D (0x1 << 25)
#define TX_FORMAT1__TEX_COORD_TYPE__CUBE (0x2 << 25)
#define TX_FORMAT1__CACHE(n) (((n) & 0x1f) << 27)
#define TX_FORMAT1__CACHE__WHOLE (0x0 << 27)
#define TX_FORMAT1__CACHE__HALF_REGION_0 (0x2 << 27)
#define TX_FORMAT1__CACHE__HALF_REGION_1 (0x3 << 27)
#define TX_FORMAT1__CACHE__FOURTH_REGION_0 (0x4 << 27)
#define TX_FORMAT1__CACHE__FOURTH_REGION_1 (0x5 << 27)
#define TX_FORMAT1__CACHE__FOURTH_REGION_2 (0x6 << 27)
#define TX_FORMAT1__CACHE__FOURTH_REGION_3 (0x7 << 27)
#define TX_FORMAT1__CACHE__EIGHTH_REGION_0 (0x8 << 27)
#define TX_FORMAT1__CACHE__EIGHTH_REGION_1 (0x9 << 27)
#define TX_FORMAT1__CACHE__EIGHTH_REGION_2 (0xa << 27)
#define TX_FORMAT1__CACHE__EIGHTH_REGION_3 (0xb << 27)
#define TX_FORMAT1__CACHE__EIGHTH_REGION_4 (0xc << 27)
#define TX_FORMAT1__CACHE__EIGHTH_REGION_5 (0xd << 27)
#define TX_FORMAT1__CACHE__EIGHTH_REGION_6 (0xe << 27)
#define TX_FORMAT1__CACHE__EIGHTH_REGION_7 (0xf << 27)
#define TX_FORMAT1__CACHE__SIXTEENTH_REGION_0 (0x10 << 27)
#define TX_FORMAT1__CACHE__SIXTEENTH_REGION_1 (0x11 << 27)
#define TX_FORMAT1__CACHE__SIXTEENTH_REGION_2 (0x12 << 27)
#define TX_FORMAT1__CACHE__SIXTEENTH_REGION_3 (0x13 << 27)
#define TX_FORMAT1__CACHE__SIXTEENTH_REGION_4 (0x14 << 27)
#define TX_FORMAT1__CACHE__SIXTEENTH_REGION_5 (0x15 << 27)
#define TX_FORMAT1__CACHE__SIXTEENTH_REGION_6 (0x16 << 27)
#define TX_FORMAT1__CACHE__SIXTEENTH_REGION_7 (0x17 << 27)
#define TX_FORMAT1__CACHE__SIXTEENTH_REGION_8 (0x18 << 27)
#define TX_FORMAT1__CACHE__SIXTEENTH_REGION_9 (0x19 << 27)
#define TX_FORMAT1__CACHE__SIXTEENTH_REGION_A (0x1a << 27)
#define TX_FORMAT1__CACHE__SIXTEENTH_REGION_B (0x1b << 27)
#define TX_FORMAT1__CACHE__SIXTEENTH_REGION_C (0x1c << 27)
#define TX_FORMAT1__CACHE__SIXTEENTH_REGION_D (0x1d << 27)
#define TX_FORMAT1__CACHE__SIXTEENTH_REGION_E (0x1e << 27)
#define TX_FORMAT1__CACHE__SIXTEENTH_REGION_F (0x1f << 27)
#define TX_FORMAT2__TXPITCH(n) (((n) & 0x3fff) << 0)
#define TX_FORMAT2__TXFORMAT_MSB(n) (((n) & 0x1) << 14)
#define TX_FORMAT2__TXWIDTH_11(n) (((n) & 0x1) << 15)
#define TX_FORMAT2__TXHEIGHT_11(n) (((n) & 0x1) << 16)
#define TX_FORMAT2__POW2FIX2FLT(n) (((n) & 0x1) << 17)
#define TX_FORMAT2__SEL_FILTER4(n) (((n) & 0x3) << 18)
#define TX_INVALTAGS__RESERVED(n) (((n) & 0xffffffff) << 0)
#define TX_OFFSET__ENDIAN_SWAP(n) (((n) & 0x3) << 0)
#define TX_OFFSET__MACRO_TILE(n) (((n) & 0x1) << 2)
#define TX_OFFSET__MICRO_TILE(n) (((n) & 0x3) << 3)
#define TX_OFFSET__TXOFFSET(n) (((n) & 0x7ffffff) << 5)
#define US_ALU_ALPHA_ADDR__ADDR0(n) (((n) & 0xff) << 0)
#define US_ALU_ALPHA_ADDR__ADDR0_CONST(n) (((n) & 0x1) << 8)
#define US_ALU_ALPHA_ADDR__ADDR0_CONST__TEMPORARY (0x0 << 8)
#define US_ALU_ALPHA_ADDR__ADDR0_CONST__CONSTANT (0x1 << 8)
#define US_ALU_ALPHA_ADDR__ADDR0_REL(n) (((n) & 0x1) << 9)
#define US_ALU_ALPHA_ADDR__ADDR0_REL__NONE (0x0 << 9)
#define US_ALU_ALPHA_ADDR__ADDR0_REL__RELATIVE (0x1 << 9)
#define US_ALU_ALPHA_ADDR__ADDR1(n) (((n) & 0xff) << 10)
#define US_ALU_ALPHA_ADDR__ADDR1_CONST(n) (((n) & 0x1) << 18)
#define US_ALU_ALPHA_ADDR__ADDR1_CONST__TEMPORARY (0x0 << 18)
#define US_ALU_ALPHA_ADDR__ADDR1_CONST__CONSTANT (0x1 << 18)
#define US_ALU_ALPHA_ADDR__ADDR1_REL(n) (((n) & 0x1) << 19)
#define US_ALU_ALPHA_ADDR__ADDR1_REL__NONE (0x0 << 19)
#define US_ALU_ALPHA_ADDR__ADDR1_REL__RELATIVE (0x1 << 19)
#define US_ALU_ALPHA_ADDR__ADDR2(n) (((n) & 0xff) << 20)
#define US_ALU_ALPHA_ADDR__ADDR2_CONST(n) (((n) & 0x1) << 28)
#define US_ALU_ALPHA_ADDR__ADDR2_CONST__TEMPORARY (0x0 << 28)
#define US_ALU_ALPHA_ADDR__ADDR2_CONST__CONSTANT (0x1 << 28)
#define US_ALU_ALPHA_ADDR__ADDR2_REL(n) (((n) & 0x1) << 29)
#define US_ALU_ALPHA_ADDR__ADDR2_REL__NONE (0x0 << 29)
#define US_ALU_ALPHA_ADDR__ADDR2_REL__RELATIVE (0x1 << 29)
#define US_ALU_ALPHA_ADDR__SRCP_OP(n) (((n) & 0x3) << 30)
#define US_ALU_ALPHA_ADDR__SRCP_OP__1_0_2_0xA0 (0x0 << 30)
#define US_ALU_ALPHA_ADDR__SRCP_OP__A1_A0 (0x1 << 30)
#define US_ALU_ALPHA_ADDR__SRCP_OP__A1pA0 (0x2 << 30)
#define US_ALU_ALPHA_ADDR__SRCP_OP__1_0_A0 (0x3 << 30)
#define US_ALU_ALPHA_INST__ALPHA_OP(n) (((n) & 0xf) << 0)
#define US_ALU_ALPHA_INST__ALPHA_OP__OP_MAD (0x0 << 0)
#define US_ALU_ALPHA_INST__ALPHA_OP__OP_DP (0x1 << 0)
#define US_ALU_ALPHA_INST__ALPHA_OP__OP_MIN (0x2 << 0)
#define US_ALU_ALPHA_INST__ALPHA_OP__OP_MAX (0x3 << 0)
#define US_ALU_ALPHA_INST__ALPHA_OP__OP_CND (0x5 << 0)
#define US_ALU_ALPHA_INST__ALPHA_OP__OP_CMP (0x6 << 0)
#define US_ALU_ALPHA_INST__ALPHA_OP__OP_FRC (0x7 << 0)
#define US_ALU_ALPHA_INST__ALPHA_OP__OP_EX2 (0x8 << 0)
#define US_ALU_ALPHA_INST__ALPHA_OP__OP_LN2 (0x9 << 0)
#define US_ALU_ALPHA_INST__ALPHA_OP__OP_RCP (0xa << 0)
#define US_ALU_ALPHA_INST__ALPHA_OP__OP_RSQ (0xb << 0)
#define US_ALU_ALPHA_INST__ALPHA_OP__OP_SIN (0xc << 0)
#define US_ALU_ALPHA_INST__ALPHA_OP__OP_COS (0xd << 0)
#define US_ALU_ALPHA_INST__ALPHA_OP__OP_MDH (0xe << 0)
#define US_ALU_ALPHA_INST__ALPHA_OP__OP_MDV (0xf << 0)
#define US_ALU_ALPHA_INST__ALPHA_ADDRD(n) (((n) & 0x7f) << 4)
#define US_ALU_ALPHA_INST__ALPHA_ADDRD_REL(n) (((n) & 0x1) << 11)
#define US_ALU_ALPHA_INST__ALPHA_ADDRD_REL__NONE (0x0 << 11)
#define US_ALU_ALPHA_INST__ALPHA_ADDRD_REL__RELATIVE (0x1 << 11)
#define US_ALU_ALPHA_INST__ALPHA_SEL_A(n) (((n) & 0x3) << 12)
#define US_ALU_ALPHA_INST__ALPHA_SEL_A__SRC0 (0x0 << 12)
#define US_ALU_ALPHA_INST__ALPHA_SEL_A__SRC1 (0x1 << 12)
#define US_ALU_ALPHA_INST__ALPHA_SEL_A__SRC2 (0x2 << 12)
#define US_ALU_ALPHA_INST__ALPHA_SEL_A__SRCP (0x3 << 12)
#define US_ALU_ALPHA_INST__ALPHA_SWIZ_A(n) (((n) & 0x7) << 14)
#define US_ALU_ALPHA_INST__ALPHA_SWIZ_A__RED (0x0 << 14)
#define US_ALU_ALPHA_INST__ALPHA_SWIZ_A__GREEN (0x1 << 14)
#define US_ALU_ALPHA_INST__ALPHA_SWIZ_A__BLUE (0x2 << 14)
#define US_ALU_ALPHA_INST__ALPHA_SWIZ_A__ALPHA (0x3 << 14)
#define US_ALU_ALPHA_INST__ALPHA_SWIZ_A__ZERO (0x4 << 14)
#define US_ALU_ALPHA_INST__ALPHA_SWIZ_A__HALF (0x5 << 14)
#define US_ALU_ALPHA_INST__ALPHA_SWIZ_A__ONE (0x6 << 14)
#define US_ALU_ALPHA_INST__ALPHA_SWIZ_A__UNUSED (0x7 << 14)
#define US_ALU_ALPHA_INST__ALPHA_MOD_A(n) (((n) & 0x3) << 17)
#define US_ALU_ALPHA_INST__ALPHA_MOD_A__NOP (0x0 << 17)
#define US_ALU_ALPHA_INST__ALPHA_MOD_A__NEG (0x1 << 17)
#define US_ALU_ALPHA_INST__ALPHA_MOD_A__ABS (0x2 << 17)
#define US_ALU_ALPHA_INST__ALPHA_MOD_A__NAB (0x3 << 17)
#define US_ALU_ALPHA_INST__ALPHA_SEL_B(n) (((n) & 0x3) << 19)
#define US_ALU_ALPHA_INST__ALPHA_SEL_B__SRC0 (0x0 << 19)
#define US_ALU_ALPHA_INST__ALPHA_SEL_B__SRC1 (0x1 << 19)
#define US_ALU_ALPHA_INST__ALPHA_SEL_B__SRC2 (0x2 << 19)
#define US_ALU_ALPHA_INST__ALPHA_SEL_B__SRCP (0x3 << 19)
#define US_ALU_ALPHA_INST__ALPHA_SWIZ_B(n) (((n) & 0x7) << 21)
#define US_ALU_ALPHA_INST__ALPHA_SWIZ_B__RED (0x0 << 21)
#define US_ALU_ALPHA_INST__ALPHA_SWIZ_B__GREEN (0x1 << 21)
#define US_ALU_ALPHA_INST__ALPHA_SWIZ_B__BLUE (0x2 << 21)
#define US_ALU_ALPHA_INST__ALPHA_SWIZ_B__ALPHA (0x3 << 21)
#define US_ALU_ALPHA_INST__ALPHA_SWIZ_B__ZERO (0x4 << 21)
#define US_ALU_ALPHA_INST__ALPHA_SWIZ_B__HALF (0x5 << 21)
#define US_ALU_ALPHA_INST__ALPHA_SWIZ_B__ONE (0x6 << 21)
#define US_ALU_ALPHA_INST__ALPHA_SWIZ_B__UNUSED (0x7 << 21)
#define US_ALU_ALPHA_INST__ALPHA_MOD_B(n) (((n) & 0x3) << 24)
#define US_ALU_ALPHA_INST__ALPHA_MOD_B__NOP (0x0 << 24)
#define US_ALU_ALPHA_INST__ALPHA_MOD_B__NEG (0x1 << 24)
#define US_ALU_ALPHA_INST__ALPHA_MOD_B__ABS (0x2 << 24)
#define US_ALU_ALPHA_INST__ALPHA_MOD_B__NAB (0x3 << 24)
#define US_ALU_ALPHA_INST__OMOD(n) (((n) & 0x7) << 26)
#define US_ALU_ALPHA_INST__TARGET(n) (((n) & 0x3) << 29)
#define US_ALU_ALPHA_INST__TARGET__A (0x0 << 29)
#define US_ALU_ALPHA_INST__TARGET__B (0x1 << 29)
#define US_ALU_ALPHA_INST__TARGET__C (0x2 << 29)
#define US_ALU_ALPHA_INST__TARGET__D (0x3 << 29)
#define US_ALU_ALPHA_INST__W_OMASK(n) (((n) & 0x1) << 31)
#define US_ALU_ALPHA_INST__W_OMASK__NONE (0x0 << 31)
#define US_ALU_ALPHA_INST__W_OMASK__A (0x1 << 31)
#define US_ALU_RGB_ADDR__ADDR0(n) (((n) & 0xff) << 0)
#define US_ALU_RGB_ADDR__ADDR0_CONST(n) (((n) & 0x1) << 8)
#define US_ALU_RGB_ADDR__ADDR0_CONST__TEMPORARY (0x0 << 8)
#define US_ALU_RGB_ADDR__ADDR0_CONST__CONSTANT (0x1 << 8)
#define US_ALU_RGB_ADDR__ADDR0_REL(n) (((n) & 0x1) << 9)
#define US_ALU_RGB_ADDR__ADDR0_REL__NONE (0x0 << 9)
#define US_ALU_RGB_ADDR__ADDR0_REL__RELATIVE (0x1 << 9)
#define US_ALU_RGB_ADDR__ADDR1(n) (((n) & 0xff) << 10)
#define US_ALU_RGB_ADDR__ADDR1_CONST(n) (((n) & 0x1) << 18)
#define US_ALU_RGB_ADDR__ADDR1_CONST__TEMPORARY (0x0 << 18)
#define US_ALU_RGB_ADDR__ADDR1_CONST__CONSTANT (0x1 << 18)
#define US_ALU_RGB_ADDR__ADDR1_REL(n) (((n) & 0x1) << 19)
#define US_ALU_RGB_ADDR__ADDR1_REL__NONE (0x0 << 19)
#define US_ALU_RGB_ADDR__ADDR1_REL__RELATIVE (0x1 << 19)
#define US_ALU_RGB_ADDR__ADDR2(n) (((n) & 0xff) << 20)
#define US_ALU_RGB_ADDR__ADDR2_CONST(n) (((n) & 0x1) << 28)
#define US_ALU_RGB_ADDR__ADDR2_CONST__TEMPORARY (0x0 << 28)
#define US_ALU_RGB_ADDR__ADDR2_CONST__CONSTANT (0x1 << 28)
#define US_ALU_RGB_ADDR__ADDR2_REL(n) (((n) & 0x1) << 29)
#define US_ALU_RGB_ADDR__ADDR2_REL__NONE (0x0 << 29)
#define US_ALU_RGB_ADDR__ADDR2_REL__RELATIVE (0x1 << 29)
#define US_ALU_RGB_ADDR__SRCP_OP(n) (((n) & 0x3) << 30)
#define US_ALU_RGB_ADDR__SRCP_OP__1_0_2_0xRGB0 (0x0 << 30)
#define US_ALU_RGB_ADDR__SRCP_OP__RGB1_RGB0 (0x1 << 30)
#define US_ALU_RGB_ADDR__SRCP_OP__RGB1pRGB0 (0x2 << 30)
#define US_ALU_RGB_ADDR__SRCP_OP__1_0_RGB0 (0x3 << 30)
#define US_ALU_RGB_INST__RGB_SEL_A(n) (((n) & 0x3) << 0)
#define US_ALU_RGB_INST__RGB_SEL_A__SRC0 (0x0 << 0)
#define US_ALU_RGB_INST__RGB_SEL_A__SRC1 (0x1 << 0)
#define US_ALU_RGB_INST__RGB_SEL_A__SRC2 (0x2 << 0)
#define US_ALU_RGB_INST__RGB_SEL_A__SRCP (0x3 << 0)
#define US_ALU_RGB_INST__RED_SWIZ_A(n) (((n) & 0x7) << 2)
#define US_ALU_RGB_INST__RED_SWIZ_A__RED (0x0 << 2)
#define US_ALU_RGB_INST__RED_SWIZ_A__GREEN (0x1 << 2)
#define US_ALU_RGB_INST__RED_SWIZ_A__BLUE (0x2 << 2)
#define US_ALU_RGB_INST__RED_SWIZ_A__ALPHA (0x3 << 2)
#define US_ALU_RGB_INST__RED_SWIZ_A__ZERO (0x4 << 2)
#define US_ALU_RGB_INST__RED_SWIZ_A__HALF (0x5 << 2)
#define US_ALU_RGB_INST__RED_SWIZ_A__ONE (0x6 << 2)
#define US_ALU_RGB_INST__RED_SWIZ_A__UNUSED (0x7 << 2)
#define US_ALU_RGB_INST__GREEN_SWIZ_A(n) (((n) & 0x7) << 5)
#define US_ALU_RGB_INST__GREEN_SWIZ_A__RED (0x0 << 5)
#define US_ALU_RGB_INST__GREEN_SWIZ_A__GREEN (0x1 << 5)
#define US_ALU_RGB_INST__GREEN_SWIZ_A__BLUE (0x2 << 5)
#define US_ALU_RGB_INST__GREEN_SWIZ_A__ALPHA (0x3 << 5)
#define US_ALU_RGB_INST__GREEN_SWIZ_A__ZERO (0x4 << 5)
#define US_ALU_RGB_INST__GREEN_SWIZ_A__HALF (0x5 << 5)
#define US_ALU_RGB_INST__GREEN_SWIZ_A__ONE (0x6 << 5)
#define US_ALU_RGB_INST__GREEN_SWIZ_A__UNUSED (0x7 << 5)
#define US_ALU_RGB_INST__BLUE_SWIZ_A(n) (((n) & 0x7) << 8)
#define US_ALU_RGB_INST__BLUE_SWIZ_A__RED (0x0 << 8)
#define US_ALU_RGB_INST__BLUE_SWIZ_A__GREEN (0x1 << 8)
#define US_ALU_RGB_INST__BLUE_SWIZ_A__BLUE (0x2 << 8)
#define US_ALU_RGB_INST__BLUE_SWIZ_A__ALPHA (0x3 << 8)
#define US_ALU_RGB_INST__BLUE_SWIZ_A__ZERO (0x4 << 8)
#define US_ALU_RGB_INST__BLUE_SWIZ_A__HALF (0x5 << 8)
#define US_ALU_RGB_INST__BLUE_SWIZ_A__ONE (0x6 << 8)
#define US_ALU_RGB_INST__BLUE_SWIZ_A__UNUSED (0x7 << 8)
#define US_ALU_RGB_INST__RGB_MOD_A(n) (((n) & 0x3) << 11)
#define US_ALU_RGB_INST__RGB_MOD_A__NOP (0x0 << 11)
#define US_ALU_RGB_INST__RGB_MOD_A__NEG (0x1 << 11)
#define US_ALU_RGB_INST__RGB_MOD_A__ABS (0x2 << 11)
#define US_ALU_RGB_INST__RGB_MOD_A__NAB (0x3 << 11)
#define US_ALU_RGB_INST__RGB_SEL_B(n) (((n) & 0x3) << 13)
#define US_ALU_RGB_INST__RGB_SEL_B__SRC0 (0x0 << 13)
#define US_ALU_RGB_INST__RGB_SEL_B__SRC1 (0x1 << 13)
#define US_ALU_RGB_INST__RGB_SEL_B__SRC2 (0x2 << 13)
#define US_ALU_RGB_INST__RGB_SEL_B__SRCP (0x3 << 13)
#define US_ALU_RGB_INST__RED_SWIZ_B(n) (((n) & 0x7) << 15)
#define US_ALU_RGB_INST__RED_SWIZ_B__RED (0x0 << 15)
#define US_ALU_RGB_INST__RED_SWIZ_B__GREEN (0x1 << 15)
#define US_ALU_RGB_INST__RED_SWIZ_B__BLUE (0x2 << 15)
#define US_ALU_RGB_INST__RED_SWIZ_B__ALPHA (0x3 << 15)
#define US_ALU_RGB_INST__RED_SWIZ_B__ZERO (0x4 << 15)
#define US_ALU_RGB_INST__RED_SWIZ_B__HALF (0x5 << 15)
#define US_ALU_RGB_INST__RED_SWIZ_B__ONE (0x6 << 15)
#define US_ALU_RGB_INST__RED_SWIZ_B__UNUSED (0x7 << 15)
#define US_ALU_RGB_INST__GREEN_SWIZ_B(n) (((n) & 0x7) << 18)
#define US_ALU_RGB_INST__GREEN_SWIZ_B__RED (0x0 << 18)
#define US_ALU_RGB_INST__GREEN_SWIZ_B__GREEN (0x1 << 18)
#define US_ALU_RGB_INST__GREEN_SWIZ_B__BLUE (0x2 << 18)
#define US_ALU_RGB_INST__GREEN_SWIZ_B__ALPHA (0x3 << 18)
#define US_ALU_RGB_INST__GREEN_SWIZ_B__ZERO (0x4 << 18)
#define US_ALU_RGB_INST__GREEN_SWIZ_B__HALF (0x5 << 18)
#define US_ALU_RGB_INST__GREEN_SWIZ_B__ONE (0x6 << 18)
#define US_ALU_RGB_INST__GREEN_SWIZ_B__UNUSED (0x7 << 18)
#define US_ALU_RGB_INST__BLUE_SWIZ_B(n) (((n) & 0x7) << 21)
#define US_ALU_RGB_INST__BLUE_SWIZ_B__RED (0x0 << 21)
#define US_ALU_RGB_INST__BLUE_SWIZ_B__GREEN (0x1 << 21)
#define US_ALU_RGB_INST__BLUE_SWIZ_B__BLUE (0x2 << 21)
#define US_ALU_RGB_INST__BLUE_SWIZ_B__ALPHA (0x3 << 21)
#define US_ALU_RGB_INST__BLUE_SWIZ_B__ZERO (0x4 << 21)
#define US_ALU_RGB_INST__BLUE_SWIZ_B__HALF (0x5 << 21)
#define US_ALU_RGB_INST__BLUE_SWIZ_B__ONE (0x6 << 21)
#define US_ALU_RGB_INST__BLUE_SWIZ_B__UNUSED (0x7 << 21)
#define US_ALU_RGB_INST__RGB_MOD_B(n) (((n) & 0x3) << 24)
#define US_ALU_RGB_INST__RGB_MOD_B__NOP (0x0 << 24)
#define US_ALU_RGB_INST__RGB_MOD_B__NEG (0x1 << 24)
#define US_ALU_RGB_INST__RGB_MOD_B__ABS (0x2 << 24)
#define US_ALU_RGB_INST__RGB_MOD_B__NAB (0x3 << 24)
#define US_ALU_RGB_INST__OMOD(n) (((n) & 0x7) << 26)
#define US_ALU_RGB_INST__TARGET(n) (((n) & 0x3) << 29)
#define US_ALU_RGB_INST__TARGET__A (0x0 << 29)
#define US_ALU_RGB_INST__TARGET__B (0x1 << 29)
#define US_ALU_RGB_INST__TARGET__C (0x2 << 29)
#define US_ALU_RGB_INST__TARGET__D (0x3 << 29)
#define US_ALU_RGB_INST__ALU_WMASK(n) (((n) & 0x1) << 31)
#define US_ALU_RGBA_INST__RGB_OP(n) (((n) & 0xf) << 0)
#define US_ALU_RGBA_INST__RGB_OP__OP_MAD (0x0 << 0)
#define US_ALU_RGBA_INST__RGB_OP__OP_DP3 (0x1 << 0)
#define US_ALU_RGBA_INST__RGB_OP__OP_DP4 (0x2 << 0)
#define US_ALU_RGBA_INST__RGB_OP__OP_D2A (0x3 << 0)
#define US_ALU_RGBA_INST__RGB_OP__OP_MIN (0x4 << 0)
#define US_ALU_RGBA_INST__RGB_OP__OP_MAX (0x5 << 0)
#define US_ALU_RGBA_INST__RGB_OP__OP_CND (0x7 << 0)
#define US_ALU_RGBA_INST__RGB_OP__OP_CMP (0x8 << 0)
#define US_ALU_RGBA_INST__RGB_OP__OP_FRC (0x9 << 0)
#define US_ALU_RGBA_INST__RGB_OP__OP_SOP (0xa << 0)
#define US_ALU_RGBA_INST__RGB_OP__OP_MDH (0xb << 0)
#define US_ALU_RGBA_INST__RGB_OP__OP_MDV (0xc << 0)
#define US_ALU_RGBA_INST__RGB_ADDRD(n) (((n) & 0x7f) << 4)
#define US_ALU_RGBA_INST__RGB_ADDRD_REL(n) (((n) & 0x1) << 11)
#define US_ALU_RGBA_INST__RGB_ADDRD_REL__NONE (0x0 << 11)
#define US_ALU_RGBA_INST__RGB_ADDRD_REL__RELATIVE (0x1 << 11)
#define US_ALU_RGBA_INST__RGB_SEL_C(n) (((n) & 0x3) << 12)
#define US_ALU_RGBA_INST__RGB_SEL_C__SRC0 (0x0 << 12)
#define US_ALU_RGBA_INST__RGB_SEL_C__SRC1 (0x1 << 12)
#define US_ALU_RGBA_INST__RGB_SEL_C__SRC2 (0x2 << 12)
#define US_ALU_RGBA_INST__RGB_SEL_C__SRCP (0x3 << 12)
#define US_ALU_RGBA_INST__RED_SWIZ_C(n) (((n) & 0x7) << 14)
#define US_ALU_RGBA_INST__RED_SWIZ_C__RED (0x0 << 14)
#define US_ALU_RGBA_INST__RED_SWIZ_C__GREEN (0x1 << 14)
#define US_ALU_RGBA_INST__RED_SWIZ_C__BLUE (0x2 << 14)
#define US_ALU_RGBA_INST__RED_SWIZ_C__ALPHA (0x3 << 14)
#define US_ALU_RGBA_INST__RED_SWIZ_C__ZERO (0x4 << 14)
#define US_ALU_RGBA_INST__RED_SWIZ_C__HALF (0x5 << 14)
#define US_ALU_RGBA_INST__RED_SWIZ_C__ONE (0x6 << 14)
#define US_ALU_RGBA_INST__RED_SWIZ_C__UNUSED (0x7 << 14)
#define US_ALU_RGBA_INST__GREEN_SWIZ_C(n) (((n) & 0x7) << 17)
#define US_ALU_RGBA_INST__GREEN_SWIZ_C__RED (0x0 << 17)
#define US_ALU_RGBA_INST__GREEN_SWIZ_C__GREEN (0x1 << 17)
#define US_ALU_RGBA_INST__GREEN_SWIZ_C__BLUE (0x2 << 17)
#define US_ALU_RGBA_INST__GREEN_SWIZ_C__ALPHA (0x3 << 17)
#define US_ALU_RGBA_INST__GREEN_SWIZ_C__ZERO (0x4 << 17)
#define US_ALU_RGBA_INST__GREEN_SWIZ_C__HALF (0x5 << 17)
#define US_ALU_RGBA_INST__GREEN_SWIZ_C__ONE (0x6 << 17)
#define US_ALU_RGBA_INST__GREEN_SWIZ_C__UNUSED (0x7 << 17)
#define US_ALU_RGBA_INST__BLUE_SWIZ_C(n) (((n) & 0x7) << 20)
#define US_ALU_RGBA_INST__BLUE_SWIZ_C__RED (0x0 << 20)
#define US_ALU_RGBA_INST__BLUE_SWIZ_C__GREEN (0x1 << 20)
#define US_ALU_RGBA_INST__BLUE_SWIZ_C__BLUE (0x2 << 20)
#define US_ALU_RGBA_INST__BLUE_SWIZ_C__ALPHA (0x3 << 20)
#define US_ALU_RGBA_INST__BLUE_SWIZ_C__ZERO (0x4 << 20)
#define US_ALU_RGBA_INST__BLUE_SWIZ_C__HALF (0x5 << 20)
#define US_ALU_RGBA_INST__BLUE_SWIZ_C__ONE (0x6 << 20)
#define US_ALU_RGBA_INST__BLUE_SWIZ_C__UNUSED (0x7 << 20)
#define US_ALU_RGBA_INST__RGB_MOD_C(n) (((n) & 0x3) << 23)
#define US_ALU_RGBA_INST__RGB_MOD_C__NOP (0x0 << 23)
#define US_ALU_RGBA_INST__RGB_MOD_C__NEG (0x1 << 23)
#define US_ALU_RGBA_INST__RGB_MOD_C__ABS (0x2 << 23)
#define US_ALU_RGBA_INST__RGB_MOD_C__NAB (0x3 << 23)
#define US_ALU_RGBA_INST__ALPHA_SEL_C(n) (((n) & 0x3) << 25)
#define US_ALU_RGBA_INST__ALPHA_SEL_C__SRC0 (0x0 << 25)
#define US_ALU_RGBA_INST__ALPHA_SEL_C__SRC1 (0x1 << 25)
#define US_ALU_RGBA_INST__ALPHA_SEL_C__SRC2 (0x2 << 25)
#define US_ALU_RGBA_INST__ALPHA_SEL_C__SRCP (0x3 << 25)
#define US_ALU_RGBA_INST__ALPHA_SWIZ_C(n) (((n) & 0x7) << 27)
#define US_ALU_RGBA_INST__ALPHA_SWIZ_C__RED (0x0 << 27)
#define US_ALU_RGBA_INST__ALPHA_SWIZ_C__GREEN (0x1 << 27)
#define US_ALU_RGBA_INST__ALPHA_SWIZ_C__BLUE (0x2 << 27)
#define US_ALU_RGBA_INST__ALPHA_SWIZ_C__ALPHA (0x3 << 27)
#define US_ALU_RGBA_INST__ALPHA_SWIZ_C__ZERO (0x4 << 27)
#define US_ALU_RGBA_INST__ALPHA_SWIZ_C__HALF (0x5 << 27)
#define US_ALU_RGBA_INST__ALPHA_SWIZ_C__ONE (0x6 << 27)
#define US_ALU_RGBA_INST__ALPHA_SWIZ_C__UNUSED (0x7 << 27)
#define US_ALU_RGBA_INST__ALPHA_MOD_C(n) (((n) & 0x3) << 30)
#define US_ALU_RGBA_INST__ALPHA_MOD_C__NOP (0x0 << 30)
#define US_ALU_RGBA_INST__ALPHA_MOD_C__NEG (0x1 << 30)
#define US_ALU_RGBA_INST__ALPHA_MOD_C__ABS (0x2 << 30)
#define US_ALU_RGBA_INST__ALPHA_MOD_C__NAB (0x3 << 30)
#define US_CMN_INST__TYPE(n) (((n) & 0x3) << 0)
#define US_CMN_INST__TYPE__US_INST_TYPE_ALU (0x0 << 0)
#define US_CMN_INST__TYPE__US_INST_TYPE_OUT (0x1 << 0)
#define US_CMN_INST__TYPE__US_INST_TYPE_FC (0x2 << 0)
#define US_CMN_INST__TYPE__US_INST_TYPE_TEX (0x3 << 0)
#define US_CMN_INST__TEX_SEM_WAIT(n) (((n) & 0x1) << 2)
#define US_CMN_INST__RGB_PRED_SEL(n) (((n) & 0x7) << 3)
#define US_CMN_INST__RGB_PRED_SEL__US_PRED_SEL_NONE (0x0 << 3)
#define US_CMN_INST__RGB_PRED_SEL__US_PRED_SEL_RGBA (0x1 << 3)
#define US_CMN_INST__RGB_PRED_SEL__US_PRED_SEL_RRRR (0x2 << 3)
#define US_CMN_INST__RGB_PRED_SEL__US_PRED_SEL_GGGG (0x3 << 3)
#define US_CMN_INST__RGB_PRED_SEL__US_PRED_SEL_BBBB (0x4 << 3)
#define US_CMN_INST__RGB_PRED_SEL__US_PRED_SEL_AAAA (0x5 << 3)
#define US_CMN_INST__RGB_PRED_INV(n) (((n) & 0x1) << 6)
#define US_CMN_INST__WRITE_INACTIVE(n) (((n) & 0x1) << 7)
#define US_CMN_INST__LAST(n) (((n) & 0x1) << 8)
#define US_CMN_INST__NOP(n) (((n) & 0x1) << 9)
#define US_CMN_INST__ALU_WAIT(n) (((n) & 0x1) << 10)
#define US_CMN_INST__RGB_WMASK(n) (((n) & 0x7) << 11)
#define US_CMN_INST__RGB_WMASK__NONE (0x0 << 11)
#define US_CMN_INST__RGB_WMASK__R (0x1 << 11)
#define US_CMN_INST__RGB_WMASK__G (0x2 << 11)
#define US_CMN_INST__RGB_WMASK__RG (0x3 << 11)
#define US_CMN_INST__RGB_WMASK__B (0x4 << 11)
#define US_CMN_INST__RGB_WMASK__RB (0x5 << 11)
#define US_CMN_INST__RGB_WMASK__GB (0x6 << 11)
#define US_CMN_INST__RGB_WMASK__RGB (0x7 << 11)
#define US_CMN_INST__ALPHA_WMASK(n) (((n) & 0x1) << 14)
#define US_CMN_INST__ALPHA_WMASK__NONE (0x0 << 14)
#define US_CMN_INST__ALPHA_WMASK__A (0x1 << 14)
#define US_CMN_INST__RGB_OMASK(n) (((n) & 0x7) << 15)
#define US_CMN_INST__RGB_OMASK__NONE (0x0 << 15)
#define US_CMN_INST__RGB_OMASK__R (0x1 << 15)
#define US_CMN_INST__RGB_OMASK__G (0x2 << 15)
#define US_CMN_INST__RGB_OMASK__RG (0x3 << 15)
#define US_CMN_INST__RGB_OMASK__B (0x4 << 15)
#define US_CMN_INST__RGB_OMASK__RB (0x5 << 15)
#define US_CMN_INST__RGB_OMASK__GB (0x6 << 15)
#define US_CMN_INST__RGB_OMASK__RGB (0x7 << 15)
#define US_CMN_INST__ALPHA_OMASK(n) (((n) & 0x1) << 18)
#define US_CMN_INST__ALPHA_OMASK__NONE (0x0 << 18)
#define US_CMN_INST__ALPHA_OMASK__A (0x1 << 18)
#define US_CMN_INST__RGB_CLAMP(n) (((n) & 0x1) << 19)
#define US_CMN_INST__ALPHA_CLAMP(n) (((n) & 0x1) << 20)
#define US_CMN_INST__ALU_RESULT_SEL(n) (((n) & 0x1) << 21)
#define US_CMN_INST__ALU_RESULT_SEL__RED (0x0 << 21)
#define US_CMN_INST__ALU_RESULT_SEL__ALPHA (0x1 << 21)
#define US_CMN_INST__ALPHA_PRED_INV(n) (((n) & 0x1) << 22)
#define US_CMN_INST__ALU_RESULT_OP(n) (((n) & 0x3) << 23)
#define US_CMN_INST__ALPHA_PRED_SEL(n) (((n) & 0x7) << 25)
#define US_CMN_INST__ALPHA_PRED_SEL__US_PRED_SEL_NONE (0x0 << 25)
#define US_CMN_INST__ALPHA_PRED_SEL__US_PRED_SEL_RGBA (0x1 << 25)
#define US_CMN_INST__ALPHA_PRED_SEL__US_PRED_SEL_RRRR (0x2 << 25)
#define US_CMN_INST__ALPHA_PRED_SEL__US_PRED_SEL_GGGG (0x3 << 25)
#define US_CMN_INST__ALPHA_PRED_SEL__US_PRED_SEL_BBBB (0x4 << 25)
#define US_CMN_INST__ALPHA_PRED_SEL__US_PRED_SEL_AAAA (0x5 << 25)
#define US_CMN_INST__STAT_WE(n) (((n) & 0xf) << 28)
#define US_CODE_ADDR__START_ADDR(n) (((n) & 0x1ff) << 0)
#define US_CODE_ADDR__END_ADDR(n) (((n) & 0x1ff) << 16)
#define US_CODE_OFFSET__OFFSET_ADDR(n) (((n) & 0x1ff) << 0)
#define US_CODE_RANGE__CODE_ADDR(n) (((n) & 0x1ff) << 0)
#define US_CODE_RANGE__CODE_SIZE(n) (((n) & 0x1ff) << 16)
#define US_CONFIG__ZERO_TIMES_ANYTHING_EQUALS_ZERO(n) (((n) & 0x1) << 1)
#define US_FC_ADDR__BOOL_ADDR(n) (((n) & 0x1f) << 0)
#define US_FC_ADDR__INT_ADDR(n) (((n) & 0x1f) << 8)
#define US_FC_ADDR__JUMP_ADDR(n) (((n) & 0x1ff) << 16)
#define US_FC_ADDR__JUMP_GLOBAL(n) (((n) & 0x1) << 31)
#define US_FC_BOOL_CONST__KBOOL(n) (((n) & 0xffffffff) << 0)
#define US_FC_CTRL__TEST_EN(n) (((n) & 0x1) << 30)
#define US_FC_CTRL__FULL_FC_EN(n) (((n) & 0x1) << 31)
#define US_FC_INST__OP(n) (((n) & 0x7) << 0)
#define US_FC_INST__OP__US_FC_OP_JUMP (0x0 << 0)
#define US_FC_INST__OP__US_FC_OP_LOOP (0x1 << 0)
#define US_FC_INST__OP__US_FC_OP_ENDLOOP (0x2 << 0)
#define US_FC_INST__OP__US_FC_OP_REP (0x3 << 0)
#define US_FC_INST__OP__US_FC_OP_ENDREP (0x4 << 0)
#define US_FC_INST__OP__US_FC_OP_BREAKLOOP (0x5 << 0)
#define US_FC_INST__OP__US_FC_OP_BREAKREP (0x6 << 0)
#define US_FC_INST__OP__US_FC_OP_CONTINUE (0x7 << 0)
#define US_FC_INST__B_ELSE(n) (((n) & 0x1) << 4)
#define US_FC_INST__JUMP_ANY(n) (((n) & 0x1) << 5)
#define US_FC_INST__A_OP(n) (((n) & 0x3) << 6)
#define US_FC_INST__A_OP__US_FC_A_OP_NONE (0x0 << 6)
#define US_FC_INST__A_OP__US_FC_A_OP_POP (0x1 << 6)
#define US_FC_INST__A_OP__US_FC_A_OP_PUSH (0x2 << 6)
#define US_FC_INST__JUMP_FUNC(n) (((n) & 0xff) << 8)
#define US_FC_INST__B_POP_CNT(n) (((n) & 0x1f) << 16)
#define US_FC_INST__B_OP0(n) (((n) & 0x3) << 24)
#define US_FC_INST__B_OP0__US_FC_B_OP_NONE (0x0 << 24)
#define US_FC_INST__B_OP0__US_FC_B_OP_DECR (0x1 << 24)
#define US_FC_INST__B_OP0__US_FC_B_OP_INCR (0x2 << 24)
#define US_FC_INST__B_OP1(n) (((n) & 0x3) << 26)
#define US_FC_INST__B_OP1__US_FC_B_OP_NONE (0x0 << 26)
#define US_FC_INST__B_OP1__US_FC_B_OP_DECR (0x1 << 26)
#define US_FC_INST__B_OP1__US_FC_B_OP_INCR (0x2 << 26)
#define US_FC_INST__IGNORE_UNCOVERED(n) (((n) & 0x1) << 28)
#define US_FC_INT_CONST__KR(n) (((n) & 0xff) << 0)
#define US_FC_INT_CONST__KG(n) (((n) & 0xff) << 8)
#define US_FC_INT_CONST__KB(n) (((n) & 0xff) << 16)
#define US_FORMAT__TXWIDTH(n) (((n) & 0x7ff) << 0)
#define US_FORMAT__TXHEIGHT(n) (((n) & 0x7ff) << 11)
#define US_OUT_FMT__OUT_FMT(n) (((n) & 0x1f) << 0)
#define US_OUT_FMT__C0_SEL(n) (((n) & 0x3) << 8)
#define US_OUT_FMT__C0_SEL__ALPHA (0x0 << 8)
#define US_OUT_FMT__C0_SEL__RED (0x1 << 8)
#define US_OUT_FMT__C0_SEL__GREEN (0x2 << 8)
#define US_OUT_FMT__C0_SEL__BLUE (0x3 << 8)
#define US_OUT_FMT__C1_SEL(n) (((n) & 0x3) << 10)
#define US_OUT_FMT__C1_SEL__ALPHA (0x0 << 10)
#define US_OUT_FMT__C1_SEL__RED (0x1 << 10)
#define US_OUT_FMT__C1_SEL__GREEN (0x2 << 10)
#define US_OUT_FMT__C1_SEL__BLUE (0x3 << 10)
#define US_OUT_FMT__C2_SEL(n) (((n) & 0x3) << 12)
#define US_OUT_FMT__C2_SEL__ALPHA (0x0 << 12)
#define US_OUT_FMT__C2_SEL__RED (0x1 << 12)
#define US_OUT_FMT__C2_SEL__GREEN (0x2 << 12)
#define US_OUT_FMT__C2_SEL__BLUE (0x3 << 12)
#define US_OUT_FMT__C3_SEL(n) (((n) & 0x3) << 14)
#define US_OUT_FMT__C3_SEL__ALPHA (0x0 << 14)
#define US_OUT_FMT__C3_SEL__RED (0x1 << 14)
#define US_OUT_FMT__C3_SEL__GREEN (0x2 << 14)
#define US_OUT_FMT__C3_SEL__BLUE (0x3 << 14)
#define US_OUT_FMT__OUT_SIGN(n) (((n) & 0xf) << 16)
#define US_PIXSIZE__PIX_SIZE(n) (((n) & 0x7f) << 0)
#define US_TEX_ADDR__SRC_ADDR(n) (((n) & 0x7f) << 0)
#define US_TEX_ADDR__SRC_ADDR_REL(n) (((n) & 0x1) << 7)
#define US_TEX_ADDR__SRC_ADDR_REL__NONE (0x0 << 7)
#define US_TEX_ADDR__SRC_ADDR_REL__RELATIVE (0x1 << 7)
#define US_TEX_ADDR__SRC_S_SWIZ(n) (((n) & 0x3) << 8)
#define US_TEX_ADDR__SRC_T_SWIZ(n) (((n) & 0x3) << 10)
#define US_TEX_ADDR__SRC_R_SWIZ(n) (((n) & 0x3) << 12)
#define US_TEX_ADDR__SRC_Q_SWIZ(n) (((n) & 0x3) << 14)
#define US_TEX_ADDR__DST_ADDR(n) (((n) & 0x7f) << 16)
#define US_TEX_ADDR__DST_ADDR_REL(n) (((n) & 0x1) << 23)
#define US_TEX_ADDR__DST_ADDR_REL__NONE (0x0 << 23)
#define US_TEX_ADDR__DST_ADDR_REL__RELATIVE (0x1 << 23)
#define US_TEX_ADDR__DST_R_SWIZ(n) (((n) & 0x3) << 24)
#define US_TEX_ADDR__DST_G_SWIZ(n) (((n) & 0x3) << 26)
#define US_TEX_ADDR__DST_B_SWIZ(n) (((n) & 0x3) << 28)
#define US_TEX_ADDR__DST_A_SWIZ(n) (((n) & 0x3) << 30)
#define US_TEX_ADDR_DXDY__DX_ADDR(n) (((n) & 0x7f) << 0)
#define US_TEX_ADDR_DXDY__DX_ADDR_REL(n) (((n) & 0x1) << 7)
#define US_TEX_ADDR_DXDY__DX_ADDR_REL__NONE (0x0 << 7)
#define US_TEX_ADDR_DXDY__DX_ADDR_REL__RELATIVE (0x1 << 7)
#define US_TEX_ADDR_DXDY__DX_S_SWIZ(n) (((n) & 0x3) << 8)
#define US_TEX_ADDR_DXDY__DX_T_SWIZ(n) (((n) & 0x3) << 10)
#define US_TEX_ADDR_DXDY__DX_R_SWIZ(n) (((n) & 0x3) << 12)
#define US_TEX_ADDR_DXDY__DX_Q_SWIZ(n) (((n) & 0x3) << 14)
#define US_TEX_ADDR_DXDY__DY_ADDR(n) (((n) & 0x7f) << 16)
#define US_TEX_ADDR_DXDY__DY_ADDR_REL(n) (((n) & 0x1) << 23)
#define US_TEX_ADDR_DXDY__DY_ADDR_REL__NONE (0x0 << 23)
#define US_TEX_ADDR_DXDY__DY_ADDR_REL__RELATIVE (0x1 << 23)
#define US_TEX_ADDR_DXDY__DY_S_SWIZ(n) (((n) & 0x3) << 24)
#define US_TEX_ADDR_DXDY__DY_T_SWIZ(n) (((n) & 0x3) << 26)
#define US_TEX_ADDR_DXDY__DY_R_SWIZ(n) (((n) & 0x3) << 28)
#define US_TEX_ADDR_DXDY__DY_Q_SWIZ(n) (((n) & 0x3) << 30)
#define US_TEX_INST__TEX_ID(n) (((n) & 0xf) << 16)
#define US_TEX_INST__INST(n) (((n) & 0x7) << 22)
#define US_TEX_INST__INST__NOP (0x0 << 22)
#define US_TEX_INST__INST__LD (0x1 << 22)
#define US_TEX_INST__INST__TEXKILL (0x2 << 22)
#define US_TEX_INST__INST__PROJ (0x3 << 22)
#define US_TEX_INST__INST__LODBIAS (0x4 << 22)
#define US_TEX_INST__INST__LOD (0x5 << 22)
#define US_TEX_INST__INST__DXDY (0x6 << 22)
#define US_TEX_INST__TEX_SEM_ACQUIRE(n) (((n) & 0x1) << 25)
#define US_TEX_INST__IGNORE_UNCOVERED(n) (((n) & 0x1) << 26)
#define US_TEX_INST__UNSCALED(n) (((n) & 0x1) << 27)
#define US_W_FMT__W_FMT(n) (((n) & 0x3) << 0)
#define US_W_FMT__W_SRC(n) (((n) & 0x1) << 2)
#define VAP_ALT_NUM_VERTICES__NUM_VERTICES(n) (((n) & 0xffffff) << 0)
#define VAP_CLIP_CNTL__UCP_ENA_0(n) (((n) & 0x1) << 0)
#define VAP_CLIP_CNTL__UCP_ENA_1(n) (((n) & 0x1) << 1)
#define VAP_CLIP_CNTL__UCP_ENA_2(n) (((n) & 0x1) << 2)
#define VAP_CLIP_CNTL__UCP_ENA_3(n) (((n) & 0x1) << 3)
#define VAP_CLIP_CNTL__UCP_ENA_4(n) (((n) & 0x1) << 4)
#define VAP_CLIP_CNTL__UCP_ENA_5(n) (((n) & 0x1) << 5)
#define VAP_CLIP_CNTL__PS_UCP_MODE(n) (((n) & 0x3) << 14)
#define VAP_CLIP_CNTL__CLIP_DISABLE(n) (((n) & 0x1) << 16)
#define VAP_CLIP_CNTL__UCP_CULL_ONLY_ENA(n) (((n) & 0x1) << 17)
#define VAP_CLIP_CNTL__BOUNDARY_EDGE_FLAG_ENA(n) (((n) & 0x1) << 18)
#define VAP_CLIP_CNTL__COLOR2_IS_TEXTURE(n) (((n) & 0x1) << 20)
#define VAP_CLIP_CNTL__COLOR3_IS_TEXTURE(n) (((n) & 0x1) << 21)
#define VAP_CNTL__PVS_NUM_SLOTS(n) (((n) & 0xf) << 0)
#define VAP_CNTL__PVS_NUM_CNTLRS(n) (((n) & 0xf) << 4)
#define VAP_CNTL__PVS_NUM_FPUS(n) (((n) & 0xf) << 8)
#define VAP_CNTL__VAP_NO_RENDER(n) (((n) & 0x1) << 17)
#define VAP_CNTL__VF_MAX_VTX_NUM(n) (((n) & 0xf) << 18)
#define VAP_CNTL__DX_CLIP_SPACE_DEF(n) (((n) & 0x1) << 22)
#define VAP_CNTL__TCL_STATE_OPTIMIZATION(n) (((n) & 0x1) << 23)
#define VAP_CNTL_STATUS__VC_SWAP(n) (((n) & 0x3) << 0)
#define VAP_CNTL_STATUS__PVS_BYPASS(n) (((n) & 0x1) << 8)
#define VAP_CNTL_STATUS__PVS_BUSY(n) (((n) & 0x1) << 11)
#define VAP_CNTL_STATUS__MAX_MPS(n) (((n) & 0xf) << 16)
#define VAP_CNTL_STATUS__VS_BUSY(n) (((n) & 0x1) << 24)
#define VAP_CNTL_STATUS__RCP_BUSY(n) (((n) & 0x1) << 25)
#define VAP_CNTL_STATUS__VTE_BUSY(n) (((n) & 0x1) << 26)
#define VAP_CNTL_STATUS__MIU_BUSY(n) (((n) & 0x1) << 27)
#define VAP_CNTL_STATUS__VC_BUSY(n) (((n) & 0x1) << 28)
#define VAP_CNTL_STATUS__VF_BUSY(n) (((n) & 0x1) << 29)
#define VAP_CNTL_STATUS__REGPIPE_BUSY(n) (((n) & 0x1) << 30)
#define VAP_CNTL_STATUS__VAP_BUSY(n) (((n) & 0x1) << 31)
#define VAP_GB_HORZ_CLIP_ADJ__DATA_REGISTER(n) (((n) & 0xffffffff) << 0)
#define VAP_GB_HORZ_DISC_ADJ__DATA_REGISTER(n) (((n) & 0xffffffff) << 0)
#define VAP_GB_VERT_CLIP_ADJ__DATA_REGISTER(n) (((n) & 0xffffffff) << 0)
#define VAP_GB_VERT_DISC_ADJ__DATA_REGISTER(n) (((n) & 0xffffffff) << 0)
#define VAP_INDEX_OFFSET__INDEX_OFFSET(n) (((n) & 0x1ffffff) << 0)
#define VAP_OUT_VTX_FMT_0__VTX_POS_PRESENT(n) (((n) & 0x1) << 0)
#define VAP_OUT_VTX_FMT_0__VTX_COLOR_0_PRESENT(n) (((n) & 0x1) << 1)
#define VAP_OUT_VTX_FMT_0__VTX_COLOR_1_PRESENT(n) (((n) & 0x1) << 2)
#define VAP_OUT_VTX_FMT_0__VTX_COLOR_2_PRESENT(n) (((n) & 0x1) << 3)
#define VAP_OUT_VTX_FMT_0__VTX_COLOR_3_PRESENT(n) (((n) & 0x1) << 4)
#define VAP_OUT_VTX_FMT_0__VTX_PT_SIZE_PRESENT(n) (((n) & 0x1) << 16)
#define VAP_OUT_VTX_FMT_1__TEX_0_COMP_CNT(n) (((n) & 0x7) << 0)
#define VAP_OUT_VTX_FMT_1__TEX_1_COMP_CNT(n) (((n) & 0x7) << 3)
#define VAP_OUT_VTX_FMT_1__TEX_2_COMP_CNT(n) (((n) & 0x7) << 6)
#define VAP_OUT_VTX_FMT_1__TEX_3_COMP_CNT(n) (((n) & 0x7) << 9)
#define VAP_OUT_VTX_FMT_1__TEX_4_COMP_CNT(n) (((n) & 0x7) << 12)
#define VAP_OUT_VTX_FMT_1__TEX_5_COMP_CNT(n) (((n) & 0x7) << 15)
#define VAP_OUT_VTX_FMT_1__TEX_6_COMP_CNT(n) (((n) & 0x7) << 18)
#define VAP_OUT_VTX_FMT_1__TEX_7_COMP_CNT(n) (((n) & 0x7) << 21)
#define VAP_PORT_DATA__DATAPORT0(n) (((n) & 0xffffffff) << 0)
#define VAP_PORT_DATA_IDX_128__DATA_IDX_PORT_128(n) (((n) & 0xffffffff) << 0)
#define VAP_PORT_IDX__IDXPORT0(n) (((n) & 0xffffffff) << 0)
#define VAP_PROG_STREAM_CNTL__DATA_TYPE_0(n) (((n) & 0xf) << 0)
#define VAP_PROG_STREAM_CNTL__DATA_TYPE_0__FLOAT_1 (0x0 << 0)
#define VAP_PROG_STREAM_CNTL__DATA_TYPE_0__FLOAT_2 (0x1 << 0)
#define VAP_PROG_STREAM_CNTL__DATA_TYPE_0__FLOAT_3 (0x2 << 0)
#define VAP_PROG_STREAM_CNTL__DATA_TYPE_0__FLOAT_4 (0x3 << 0)
#define VAP_PROG_STREAM_CNTL__DATA_TYPE_0__BYTE (0x4 << 0)
#define VAP_PROG_STREAM_CNTL__DATA_TYPE_0__D3DCOLOR (0x5 << 0)
#define VAP_PROG_STREAM_CNTL__DATA_TYPE_0__SHORT_2 (0x6 << 0)
#define VAP_PROG_STREAM_CNTL__DATA_TYPE_0__SHORT_4 (0x7 << 0)
#define VAP_PROG_STREAM_CNTL__DATA_TYPE_0__VECTOR_3_TTT (0x8 << 0)
#define VAP_PROG_STREAM_CNTL__DATA_TYPE_0__VECTOR_3_EET (0x9 << 0)
#define VAP_PROG_STREAM_CNTL__DATA_TYPE_0__FLOAT_8 (0xa << 0)
#define VAP_PROG_STREAM_CNTL__DATA_TYPE_0__FLT16_2 (0xb << 0)
#define VAP_PROG_STREAM_CNTL__SKIP_DWORDS_0(n) (((n) & 0xf) << 4)
#define VAP_PROG_STREAM_CNTL__DST_VEC_LOC_0(n) (((n) & 0x1f) << 8)
#define VAP_PROG_STREAM_CNTL__LAST_VEC_0(n) (((n) & 0x1) << 13)
#define VAP_PROG_STREAM_CNTL__SIGNED_0(n) (((n) & 0x1) << 14)
#define VAP_PROG_STREAM_CNTL__NORMALIZE_0(n) (((n) & 0x1) << 15)
#define VAP_PROG_STREAM_CNTL__DATA_TYPE_1(n) (((n) & 0xf) << 16)
#define VAP_PROG_STREAM_CNTL__DATA_TYPE_1__FLOAT_1 (0x0 << 16)
#define VAP_PROG_STREAM_CNTL__DATA_TYPE_1__FLOAT_2 (0x1 << 16)
#define VAP_PROG_STREAM_CNTL__DATA_TYPE_1__FLOAT_3 (0x2 << 16)
#define VAP_PROG_STREAM_CNTL__DATA_TYPE_1__FLOAT_4 (0x3 << 16)
#define VAP_PROG_STREAM_CNTL__DATA_TYPE_1__BYTE (0x4 << 16)
#define VAP_PROG_STREAM_CNTL__DATA_TYPE_1__D3DCOLOR (0x5 << 16)
#define VAP_PROG_STREAM_CNTL__DATA_TYPE_1__SHORT_2 (0x6 << 16)
#define VAP_PROG_STREAM_CNTL__DATA_TYPE_1__SHORT_4 (0x7 << 16)
#define VAP_PROG_STREAM_CNTL__DATA_TYPE_1__VECTOR_3_TTT (0x8 << 16)
#define VAP_PROG_STREAM_CNTL__DATA_TYPE_1__VECTOR_3_EET (0x9 << 16)
#define VAP_PROG_STREAM_CNTL__DATA_TYPE_1__FLOAT_8 (0xa << 16)
#define VAP_PROG_STREAM_CNTL__DATA_TYPE_1__FLT16_2 (0xb << 16)
#define VAP_PROG_STREAM_CNTL__SKIP_DWORDS_1(n) (((n) & 0xf) << 20)
#define VAP_PROG_STREAM_CNTL__DST_VEC_LOC_1(n) (((n) & 0x1f) << 24)
#define VAP_PROG_STREAM_CNTL__LAST_VEC_1(n) (((n) & 0x1) << 29)
#define VAP_PROG_STREAM_CNTL__SIGNED_1(n) (((n) & 0x1) << 30)
#define VAP_PROG_STREAM_CNTL__NORMALIZE_1(n) (((n) & 0x1) << 31)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_X_0(n) (((n) & 0x7) << 0)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_X_0__SELECT_X (0x0 << 0)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_X_0__SELECT_Y (0x1 << 0)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_X_0__SELECT_Z (0x2 << 0)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_X_0__SELECT_W (0x3 << 0)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_X_0__SELECT_FP_ZERO (0x4 << 0)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_X_0__SELECT_FP_ONE (0x5 << 0)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_Y_0(n) (((n) & 0x7) << 3)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_Y_0__SELECT_X (0x0 << 3)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_Y_0__SELECT_Y (0x1 << 3)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_Y_0__SELECT_Z (0x2 << 3)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_Y_0__SELECT_W (0x3 << 3)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_Y_0__SELECT_FP_ZERO (0x4 << 3)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_Y_0__SELECT_FP_ONE (0x5 << 3)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_Z_0(n) (((n) & 0x7) << 6)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_Z_0__SELECT_X (0x0 << 6)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_Z_0__SELECT_Y (0x1 << 6)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_Z_0__SELECT_Z (0x2 << 6)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_Z_0__SELECT_W (0x3 << 6)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_Z_0__SELECT_FP_ZERO (0x4 << 6)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_Z_0__SELECT_FP_ONE (0x5 << 6)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_W_0(n) (((n) & 0x7) << 9)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_W_0__SELECT_X (0x0 << 9)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_W_0__SELECT_Y (0x1 << 9)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_W_0__SELECT_Z (0x2 << 9)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_W_0__SELECT_W (0x3 << 9)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_W_0__SELECT_FP_ZERO (0x4 << 9)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_W_0__SELECT_FP_ONE (0x5 << 9)
#define VAP_PROG_STREAM_CNTL_EXT__WRITE_ENA_0(n) (((n) & 0xf) << 12)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_X_1(n) (((n) & 0x7) << 16)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_X_1__SELECT_X (0x0 << 16)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_X_1__SELECT_Y (0x1 << 16)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_X_1__SELECT_Z (0x2 << 16)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_X_1__SELECT_W (0x3 << 16)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_X_1__SELECT_FP_ZERO (0x4 << 16)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_X_1__SELECT_FP_ONE (0x5 << 16)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_Y_1(n) (((n) & 0x7) << 19)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_Y_1__SELECT_X (0x0 << 19)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_Y_1__SELECT_Y (0x1 << 19)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_Y_1__SELECT_Z (0x2 << 19)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_Y_1__SELECT_W (0x3 << 19)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_Y_1__SELECT_FP_ZERO (0x4 << 19)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_Y_1__SELECT_FP_ONE (0x5 << 19)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_Z_1(n) (((n) & 0x7) << 22)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_Z_1__SELECT_X (0x0 << 22)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_Z_1__SELECT_Y (0x1 << 22)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_Z_1__SELECT_Z (0x2 << 22)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_Z_1__SELECT_W (0x3 << 22)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_Z_1__SELECT_FP_ZERO (0x4 << 22)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_Z_1__SELECT_FP_ONE (0x5 << 22)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_W_1(n) (((n) & 0x7) << 25)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_W_1__SELECT_X (0x0 << 25)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_W_1__SELECT_Y (0x1 << 25)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_W_1__SELECT_Z (0x2 << 25)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_W_1__SELECT_W (0x3 << 25)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_W_1__SELECT_FP_ZERO (0x4 << 25)
#define VAP_PROG_STREAM_CNTL_EXT__SWIZZLE_SELECT_W_1__SELECT_FP_ONE (0x5 << 25)
#define VAP_PROG_STREAM_CNTL_EXT__WRITE_ENA_1(n) (((n) & 0xf) << 28)
#define VAP_PSC_SGN_NORM_CNTL__SGN_NORM_METHOD_0(n) (((n) & 0x3) << 0)
#define VAP_PSC_SGN_NORM_CNTL__SGN_NORM_METHOD_1(n) (((n) & 0x3) << 2)
#define VAP_PSC_SGN_NORM_CNTL__SGN_NORM_METHOD_2(n) (((n) & 0x3) << 4)
#define VAP_PSC_SGN_NORM_CNTL__SGN_NORM_METHOD_3(n) (((n) & 0x3) << 6)
#define VAP_PSC_SGN_NORM_CNTL__SGN_NORM_METHOD_4(n) (((n) & 0x3) << 8)
#define VAP_PSC_SGN_NORM_CNTL__SGN_NORM_METHOD_5(n) (((n) & 0x3) << 10)
#define VAP_PSC_SGN_NORM_CNTL__SGN_NORM_METHOD_6(n) (((n) & 0x3) << 12)
#define VAP_PSC_SGN_NORM_CNTL__SGN_NORM_METHOD_7(n) (((n) & 0x3) << 14)
#define VAP_PSC_SGN_NORM_CNTL__SGN_NORM_METHOD_8(n) (((n) & 0x3) << 16)
#define VAP_PSC_SGN_NORM_CNTL__SGN_NORM_METHOD_9(n) (((n) & 0x3) << 18)
#define VAP_PSC_SGN_NORM_CNTL__SGN_NORM_METHOD_10(n) (((n) & 0x3) << 20)
#define VAP_PSC_SGN_NORM_CNTL__SGN_NORM_METHOD_11(n) (((n) & 0x3) << 22)
#define VAP_PSC_SGN_NORM_CNTL__SGN_NORM_METHOD_12(n) (((n) & 0x3) << 24)
#define VAP_PSC_SGN_NORM_CNTL__SGN_NORM_METHOD_13(n) (((n) & 0x3) << 26)
#define VAP_PSC_SGN_NORM_CNTL__SGN_NORM_METHOD_14(n) (((n) & 0x3) << 28)
#define VAP_PSC_SGN_NORM_CNTL__SGN_NORM_METHOD_15(n) (((n) & 0x3) << 30)
#define VAP_PVS_CODE_CNTL_0__PVS_FIRST_INST(n) (((n) & 0x3ff) << 0)
#define VAP_PVS_CODE_CNTL_0__PVS_XYZW_VALID_INST(n) (((n) & 0x3ff) << 10)
#define VAP_PVS_CODE_CNTL_0__PVS_LAST_INST(n) (((n) & 0x3ff) << 20)
#define VAP_PVS_CODE_CNTL_1__PVS_LAST_VTX_SRC_INST(n) (((n) & 0x3ff) << 0)
#define VAP_PVS_CONST_CNTL__PVS_CONST_BASE_OFFSET(n) (((n) & 0xff) << 0)
#define VAP_PVS_CONST_CNTL__PVS_MAX_CONST_ADDR(n) (((n) & 0xff) << 16)
#define VAP_PVS_FLOW_CNTL_ADDRS__PVS_FC_ACT_ADRS_0(n) (((n) & 0xff) << 0)
#define VAP_PVS_FLOW_CNTL_ADDRS__PVS_FC_LOOP_CNT_JMP_INST_0(n) (((n) & 0xff) << 8)
#define VAP_PVS_FLOW_CNTL_ADDRS__PVS_FC_LAST_INST_0(n) (((n) & 0xff) << 16)
#define VAP_PVS_FLOW_CNTL_ADDRS__PVS_FC_RTN_INST_0(n) (((n) & 0xff) << 24)
#define VAP_PVS_FLOW_CNTL_ADDRS_LW__PVS_FC_ACT_ADRS_0(n) (((n) & 0xffff) << 0)
#define VAP_PVS_FLOW_CNTL_ADDRS_LW__PVS_FC_LOOP_CNT_JMP_INST_0(n) (((n) & 0xffff) << 16)
#define VAP_PVS_FLOW_CNTL_ADDRS_UW__PVS_FC_LAST_INST_0(n) (((n) & 0xffff) << 0)
#define VAP_PVS_FLOW_CNTL_ADDRS_UW__PVS_FC_RTN_INST_0(n) (((n) & 0xffff) << 16)
#define VAP_PVS_FLOW_CNTL_LOOP_INDEX__PVS_FC_LOOP_INIT_VAL_0(n) (((n) & 0xff) << 0)
#define VAP_PVS_FLOW_CNTL_LOOP_INDEX__PVS_FC_LOOP_STEP_VAL_0(n) (((n) & 0xff) << 8)
#define VAP_PVS_FLOW_CNTL_LOOP_INDEX__PVS_FC_LOOP_REPEAT_NO_FLI_0(n) (((n) & 0x1) << 31)
#define VAP_PVS_FLOW_CNTL_OPC__PVS_FC_OPC_0(n) (((n) & 0x3) << 0)
#define VAP_PVS_FLOW_CNTL_OPC__PVS_FC_OPC_1(n) (((n) & 0x3) << 2)
#define VAP_PVS_FLOW_CNTL_OPC__PVS_FC_OPC_2(n) (((n) & 0x3) << 4)
#define VAP_PVS_FLOW_CNTL_OPC__PVS_FC_OPC_3(n) (((n) & 0x3) << 6)
#define VAP_PVS_FLOW_CNTL_OPC__PVS_FC_OPC_4(n) (((n) & 0x3) << 8)
#define VAP_PVS_FLOW_CNTL_OPC__PVS_FC_OPC_5(n) (((n) & 0x3) << 10)
#define VAP_PVS_FLOW_CNTL_OPC__PVS_FC_OPC_6(n) (((n) & 0x3) << 12)
#define VAP_PVS_FLOW_CNTL_OPC__PVS_FC_OPC_7(n) (((n) & 0x3) << 14)
#define VAP_PVS_FLOW_CNTL_OPC__PVS_FC_OPC_8(n) (((n) & 0x3) << 16)
#define VAP_PVS_FLOW_CNTL_OPC__PVS_FC_OPC_9(n) (((n) & 0x3) << 18)
#define VAP_PVS_FLOW_CNTL_OPC__PVS_FC_OPC_10(n) (((n) & 0x3) << 20)
#define VAP_PVS_FLOW_CNTL_OPC__PVS_FC_OPC_11(n) (((n) & 0x3) << 22)
#define VAP_PVS_FLOW_CNTL_OPC__PVS_FC_OPC_12(n) (((n) & 0x3) << 24)
#define VAP_PVS_FLOW_CNTL_OPC__PVS_FC_OPC_13(n) (((n) & 0x3) << 26)
#define VAP_PVS_FLOW_CNTL_OPC__PVS_FC_OPC_14(n) (((n) & 0x3) << 28)
#define VAP_PVS_FLOW_CNTL_OPC__PVS_FC_OPC_15(n) (((n) & 0x3) << 30)
#define VAP_PVS_STATE_FLUSH_REG__DATA_REGISTER(n) (((n) & 0xffffffff) << 0)
#define VAP_PVS_VECTOR_DATA_REG__DATA_REGISTER(n) (((n) & 0xffffffff) << 0)
#define VAP_PVS_VECTOR_DATA_REG_128__DATA_REGISTER(n) (((n) & 0xffffffff) << 0)
#define VAP_PVS_VECTOR_INDX_REG__OCTWORD_OFFSET(n) (((n) & 0x7ff) << 0)
#define VAP_PVS_VTX_TIMEOUT_REG__CLK_COUNT(n) (((n) & 0xffffffff) << 0)
#define VAP_TEX_TO_COLOR_CNTL__TEX_RGB_SHADE_FUNC_0(n) (((n) & 0x1) << 0)
#define VAP_TEX_TO_COLOR_CNTL__TEX_ALPHA_SHADE_FUNC_0(n) (((n) & 0x1) << 1)
#define VAP_TEX_TO_COLOR_CNTL__TEX_RGBA_CLAMP_0(n) (((n) & 0x1) << 2)
#define VAP_TEX_TO_COLOR_CNTL__TEX_RGB_SHADE_FUNC_1(n) (((n) & 0x1) << 4)
#define VAP_TEX_TO_COLOR_CNTL__TEX_ALPHA_SHADE_FUNC_1(n) (((n) & 0x1) << 5)
#define VAP_TEX_TO_COLOR_CNTL__TEX_RGBA_CLAMP_1(n) (((n) & 0x1) << 6)
#define VAP_TEX_TO_COLOR_CNTL__TEX_RGB_SHADE_FUNC_2(n) (((n) & 0x1) << 8)
#define VAP_TEX_TO_COLOR_CNTL__TEX_ALPHA_SHADE_FUNC_2(n) (((n) & 0x1) << 9)
#define VAP_TEX_TO_COLOR_CNTL__TEX_RGBA_CLAMP_2(n) (((n) & 0x1) << 10)
#define VAP_TEX_TO_COLOR_CNTL__TEX_RGB_SHADE_FUNC_3(n) (((n) & 0x1) << 12)
#define VAP_TEX_TO_COLOR_CNTL__TEX_ALPHA_SHADE_FUNC_3(n) (((n) & 0x1) << 13)
#define VAP_TEX_TO_COLOR_CNTL__TEX_RGBA_CLAMP_3(n) (((n) & 0x1) << 14)
#define VAP_TEX_TO_COLOR_CNTL__TEX_RGB_SHADE_FUNC_4(n) (((n) & 0x1) << 16)
#define VAP_TEX_TO_COLOR_CNTL__TEX_ALPHA_SHADE_FUNC_4(n) (((n) & 0x1) << 17)
#define VAP_TEX_TO_COLOR_CNTL__TEX_RGBA_CLAMP_4(n) (((n) & 0x1) << 18)
#define VAP_TEX_TO_COLOR_CNTL__TEX_RGB_SHADE_FUNC_5(n) (((n) & 0x1) << 20)
#define VAP_TEX_TO_COLOR_CNTL__TEX_ALPHA_SHADE_FUNC_5(n) (((n) & 0x1) << 21)
#define VAP_TEX_TO_COLOR_CNTL__TEX_RGBA_CLAMP_5(n) (((n) & 0x1) << 22)
#define VAP_TEX_TO_COLOR_CNTL__TEX_RGB_SHADE_FUNC_6(n) (((n) & 0x1) << 24)
#define VAP_TEX_TO_COLOR_CNTL__TEX_ALPHA_SHADE_FUNC_6(n) (((n) & 0x1) << 25)
#define VAP_TEX_TO_COLOR_CNTL__TEX_RGBA_CLAMP_6(n) (((n) & 0x1) << 26)
#define VAP_TEX_TO_COLOR_CNTL__TEX_RGB_SHADE_FUNC_7(n) (((n) & 0x1) << 28)
#define VAP_TEX_TO_COLOR_CNTL__TEX_ALPHA_SHADE_FUNC_7(n) (((n) & 0x1) << 29)
#define VAP_TEX_TO_COLOR_CNTL__TEX_RGBA_CLAMP_7(n) (((n) & 0x1) << 30)
#define VAP_VF_CNTL__PRIM_TYPE(n) (((n) & 0xf) << 0)
#define VAP_VF_CNTL__PRIM_TYPE__POLYGON (0xf << 0)
#define VAP_VF_CNTL__PRIM_WALK(n) (((n) & 0x3) << 4)
#define VAP_VF_CNTL__INDEX_SIZE(n) (((n) & 0x1) << 11)
#define VAP_VF_CNTL__VTX_REUSE_DIS(n) (((n) & 0x1) << 12)
#define VAP_VF_CNTL__DUAL_INDEX_MODE(n) (((n) & 0x1) << 13)
#define VAP_VF_CNTL__USE_ALT_NUM_VERTS(n) (((n) & 0x1) << 14)
#define VAP_VF_CNTL__NUM_VERTICES(n) (((n) & 0xffff) << 16)
#define VAP_VF_MAX_VTX_INDX__MAX_INDX(n) (((n) & 0xffffff) << 0)
#define VAP_VF_MIN_VTX_INDX__MIN_INDX(n) (((n) & 0xffffff) << 0)
#define VAP_VPORT_XOFFSET__VPORT_XOFFSET(n) (((n) & 0xffffffff) << 0)
#define VAP_VPORT_XSCALE__VPORT_XSCALE(n) (((n) & 0xffffffff) << 0)
#define VAP_VPORT_YOFFSET__VPORT_YOFFSET(n) (((n) & 0xffffffff) << 0)
#define VAP_VPORT_YSCALE__VPORT_YSCALE(n) (((n) & 0xffffffff) << 0)
#define VAP_VPORT_ZOFFSET__VPORT_ZOFFSET(n) (((n) & 0xffffffff) << 0)
#define VAP_VPORT_ZSCALE__VPORT_ZSCALE(n) (((n) & 0xffffffff) << 0)
#define VAP_VTE_CNTL__VPORT_X_SCALE_ENA(n) (((n) & 0x1) << 0)
#define VAP_VTE_CNTL__VPORT_X_OFFSET_ENA(n) (((n) & 0x1) << 1)
#define VAP_VTE_CNTL__VPORT_Y_SCALE_ENA(n) (((n) & 0x1) << 2)
#define VAP_VTE_CNTL__VPORT_Y_OFFSET_ENA(n) (((n) & 0x1) << 3)
#define VAP_VTE_CNTL__VPORT_Z_SCALE_ENA(n) (((n) & 0x1) << 4)
#define VAP_VTE_CNTL__VPORT_Z_OFFSET_ENA(n) (((n) & 0x1) << 5)
#define VAP_VTE_CNTL__VTX_XY_FMT(n) (((n) & 0x1) << 8)
#define VAP_VTE_CNTL__VTX_Z_FMT(n) (((n) & 0x1) << 9)
#define VAP_VTE_CNTL__VTX_W0_FMT(n) (((n) & 0x1) << 10)
#define VAP_VTE_CNTL__SERIAL_PROC_ENA(n) (((n) & 0x1) << 11)
#define VAP_VTX_AOS_ADDR__VTX_AOS_ADDR0(n) (((n) & 0x3fffffff) << 2)
#define VAP_VTX_AOS_ATTR__VTX_AOS_COUNT0(n) (((n) & 0x7f) << 0)
#define VAP_VTX_AOS_ATTR__VTX_AOS_STRIDE0(n) (((n) & 0x7f) << 8)
#define VAP_VTX_AOS_ATTR__VTX_AOS_COUNT1(n) (((n) & 0x7f) << 16)
#define VAP_VTX_AOS_ATTR__VTX_AOS_STRIDE1(n) (((n) & 0x7f) << 24)
#define VAP_VTX_NUM_ARRAYS__VTX_NUM_ARRAYS(n) (((n) & 0x1f) << 0)
#define VAP_VTX_NUM_ARRAYS__VC_FORCE_PREFETCH(n) (((n) & 0x1) << 5)
#define VAP_VTX_NUM_ARRAYS__VC_DIS_CACHE_INVLD(n) (((n) & 0x1) << 6)
#define VAP_VTX_NUM_ARRAYS__AOS_0_FETCH_SIZE(n) (((n) & 0x1) << 16)
#define VAP_VTX_NUM_ARRAYS__AOS_1_FETCH_SIZE(n) (((n) & 0x1) << 17)
#define VAP_VTX_NUM_ARRAYS__AOS_2_FETCH_SIZE(n) (((n) & 0x1) << 18)
#define VAP_VTX_NUM_ARRAYS__AOS_3_FETCH_SIZE(n) (((n) & 0x1) << 19)
#define VAP_VTX_NUM_ARRAYS__AOS_4_FETCH_SIZE(n) (((n) & 0x1) << 20)
#define VAP_VTX_NUM_ARRAYS__AOS_5_FETCH_SIZE(n) (((n) & 0x1) << 21)
#define VAP_VTX_NUM_ARRAYS__AOS_6_FETCH_SIZE(n) (((n) & 0x1) << 22)
#define VAP_VTX_NUM_ARRAYS__AOS_7_FETCH_SIZE(n) (((n) & 0x1) << 23)
#define VAP_VTX_NUM_ARRAYS__AOS_8_FETCH_SIZE(n) (((n) & 0x1) << 24)
#define VAP_VTX_NUM_ARRAYS__AOS_9_FETCH_SIZE(n) (((n) & 0x1) << 25)
#define VAP_VTX_NUM_ARRAYS__AOS_10_FETCH_SIZE(n) (((n) & 0x1) << 26)
#define VAP_VTX_NUM_ARRAYS__AOS_11_FETCH_SIZE(n) (((n) & 0x1) << 27)
#define VAP_VTX_NUM_ARRAYS__AOS_12_FETCH_SIZE(n) (((n) & 0x1) << 28)
#define VAP_VTX_NUM_ARRAYS__AOS_13_FETCH_SIZE(n) (((n) & 0x1) << 29)
#define VAP_VTX_NUM_ARRAYS__AOS_14_FETCH_SIZE(n) (((n) & 0x1) << 30)
#define VAP_VTX_NUM_ARRAYS__AOS_15_FETCH_SIZE(n) (((n) & 0x1) << 31)
#define VAP_VTX_SIZE__DWORDS_PER_VTX(n) (((n) & 0x7f) << 0)
#define VAP_VTX_ST_BLEND_WT__DATA_REGISTER(n) (((n) & 0xffffffff) << 0)
#define VAP_VTX_STATE_CNTL__COLOR_0_ASSEMBLY_CNTL(n) (((n) & 0x3) << 0)
#define VAP_VTX_STATE_CNTL__COLOR_1_ASSEMBLY_CNTL(n) (((n) & 0x3) << 2)
#define VAP_VTX_STATE_CNTL__COLOR_2_ASSEMBLY_CNTL(n) (((n) & 0x3) << 4)
#define VAP_VTX_STATE_CNTL__COLOR_3_ASSEMBLY_CNTL(n) (((n) & 0x3) << 6)
#define VAP_VTX_STATE_CNTL__COLOR_4_ASSEMBLY_CNTL(n) (((n) & 0x3) << 8)
#define VAP_VTX_STATE_CNTL__COLOR_5_ASSEMBLY_CNTL(n) (((n) & 0x3) << 10)
#define VAP_VTX_STATE_CNTL__COLOR_6_ASSEMBLY_CNTL(n) (((n) & 0x3) << 12)
#define VAP_VTX_STATE_CNTL__COLOR_7_ASSEMBLY_CNTL(n) (((n) & 0x3) << 14)
#define VAP_VTX_STATE_CNTL__UPDATE_USER_COLOR_0_ENA(n) (((n) & 0x1) << 16)
#define ZB_BW_CNTL__HIZ_ENABLE(n) (((n) & 0x1) << 0)
#define ZB_BW_CNTL__HIZ_MIN(n) (((n) & 0x1) << 1)
#define ZB_BW_CNTL__FAST_FILL(n) (((n) & 0x1) << 2)
#define ZB_BW_CNTL__RD_COMP_ENABLE(n) (((n) & 0x1) << 3)
#define ZB_BW_CNTL__WR_COMP_ENABLE(n) (((n) & 0x1) << 4)
#define ZB_BW_CNTL__ZB_CB_CLEAR(n) (((n) & 0x1) << 5)
#define ZB_BW_CNTL__FORCE_COMPRESSED_STENCIL_VALUE(n) (((n) & 0x1) << 6)
#define ZB_BW_CNTL__ZEQUAL_OPTIMIZE_DISABLE(n) (((n) & 0x1) << 7)
#define ZB_BW_CNTL__SEQUAL_OPTIMIZE_DISABLE(n) (((n) & 0x1) << 8)
#define ZB_BW_CNTL__BMASK_DISABLE(n) (((n) & 0x1) << 10)
#define ZB_BW_CNTL__HIZ_EQUAL_REJECT_ENABLE(n) (((n) & 0x1) << 11)
#define ZB_BW_CNTL__HIZ_EQUAL_REJECT_ENABLE__DISABLE (0x0 << 11)
#define ZB_BW_CNTL__HIZ_EQUAL_REJECT_ENABLE__ENABLE (0x1 << 11)
#define ZB_BW_CNTL__HIZ_FP_EXP_BITS(n) (((n) & 0x7) << 12)
#define ZB_BW_CNTL__HIZ_FP_INVERT(n) (((n) & 0x1) << 15)
#define ZB_BW_CNTL__TILE_OVERWRITE_RECOMPRESSION_DISABLE(n) (((n) & 0x1) << 16)
#define ZB_BW_CNTL__CONTIGUOUS_6XAA_SAMPLES_DISABLE(n) (((n) & 0x1) << 17)
#define ZB_BW_CNTL__PEQ_PACKING_ENABLE(n) (((n) & 0x1) << 18)
#define ZB_BW_CNTL__PEQ_PACKING_ENABLE__DISABLE (0x0 << 18)
#define ZB_BW_CNTL__PEQ_PACKING_ENABLE__ENABLE (0x1 << 18)
#define ZB_BW_CNTL__COVERED_PTR_MASKING_ENABLE(n) (((n) & 0x1) << 19)
#define ZB_BW_CNTL__COVERED_PTR_MASKING_ENABLE__DISABLE (0x0 << 19)
#define ZB_BW_CNTL__COVERED_PTR_MASKING_ENABLE__ENABLE (0x1 << 19)
#define ZB_CNTL__STENCIL_ENABLE(n) (((n) & 0x1) << 0)
#define ZB_CNTL__STENCIL_ENABLE__DISABLED (0x0 << 0)
#define ZB_CNTL__STENCIL_ENABLE__ENABLED (0x1 << 0)
#define ZB_CNTL__Z_ENABLE(n) (((n) & 0x1) << 1)
#define ZB_CNTL__Z_ENABLE__DISABLED (0x0 << 1)
#define ZB_CNTL__Z_ENABLE__ENABLED (0x1 << 1)
#define ZB_CNTL__ZWRITEENABLE(n) (((n) & 0x1) << 2)
#define ZB_CNTL__ZWRITEENABLE__DISABLE (0x0 << 2)
#define ZB_CNTL__ZWRITEENABLE__ENABLE (0x1 << 2)
#define ZB_CNTL__ZSIGNED_COMPARE(n) (((n) & 0x1) << 3)
#define ZB_CNTL__ZSIGNED_COMPARE__DISABLE (0x0 << 3)
#define ZB_CNTL__ZSIGNED_COMPARE__ENABLE (0x1 << 3)
#define ZB_CNTL__STENCIL_FRONT_BACK(n) (((n) & 0x1) << 4)
#define ZB_CNTL__STENCIL_FRONT_BACK__DISABLE (0x0 << 4)
#define ZB_CNTL__STENCIL_FRONT_BACK__ENABLE (0x1 << 4)
#define ZB_CNTL__ZSIGNED_MAGNITUDE(n) (((n) & 0x1) << 5)
#define ZB_CNTL__STENCIL_REFMASK_FRONT_BACK(n) (((n) & 0x1) << 6)
#define ZB_CNTL__STENCIL_REFMASK_FRONT_BACK__DISABLE (0x0 << 6)
#define ZB_CNTL__STENCIL_REFMASK_FRONT_BACK__ENABLE (0x1 << 6)
#define ZB_DEPTHCLEARVALUE__DEPTHCLEARVALUE(n) (((n) & 0xffffffff) << 0)
#define ZB_DEPTHOFFSET__DEPTHOFFSET(n) (((n) & 0x7ffffff) << 5)
#define ZB_DEPTHPITCH__DEPTHPITCH(n) (((n) & 0xfff) << 2)
#define ZB_DEPTHPITCH__DEPTHMACROTILE(n) (((n) & 0x1) << 16)
#define ZB_DEPTHPITCH__DEPTHMICROTILE(n) (((n) & 0x3) << 17)
#define ZB_DEPTHPITCH__DEPTHENDIAN(n) (((n) & 0x3) << 19)
#define ZB_DEPTHXY_OFFSET__DEPTHX_OFFSET(n) (((n) & 0x7ff) << 1)
#define ZB_DEPTHXY_OFFSET__DEPTHY_OFFSET(n) (((n) & 0x7ff) << 17)
#define ZB_FIFO_SIZE__OP_FIFO_SIZE(n) (((n) & 0x3) << 0)
#define ZB_FORMAT__DEPTHFORMAT(n) (((n) & 0xf) << 0)
#define ZB_FORMAT__INVERT(n) (((n) & 0x1) << 4)
#define ZB_FORMAT__PEQ8(n) (((n) & 0x1) << 5)
#define ZB_HIZ_DWORD__HIZ_DWORD(n) (((n) & 0xffffffff) << 0)
#define ZB_HIZ_OFFSET__HIZ_OFFSET(n) (((n) & 0xffff) << 2)
#define ZB_HIZ_PITCH__HIZ_PITCH(n) (((n) & 0x3ff) << 4)
#define ZB_HIZ_RDINDEX__HIZ_RDINDEX(n) (((n) & 0xffff) << 2)
#define ZB_HIZ_WRINDEX__HIZ_WRINDEX(n) (((n) & 0xffff) << 2)
#define ZB_STENCILREFMASK__STENCILREF(n) (((n) & 0xff) << 0)
#define ZB_STENCILREFMASK__STENCILMASK(n) (((n) & 0xff) << 8)
#define ZB_STENCILREFMASK__STENCILWRITEMASK(n) (((n) & 0xff) << 16)
#define ZB_STENCILREFMASK_BF__STENCILREF(n) (((n) & 0xff) << 0)
#define ZB_STENCILREFMASK_BF__STENCILMASK(n) (((n) & 0xff) << 8)
#define ZB_STENCILREFMASK_BF__STENCILWRITEMASK(n) (((n) & 0xff) << 16)
#define ZB_ZCACHE_CTLSTAT__ZC_FLUSH(n) (((n) & 0x1) << 0)
#define ZB_ZCACHE_CTLSTAT__ZC_FREE(n) (((n) & 0x1) << 1)
#define ZB_ZCACHE_CTLSTAT__ZC_BUSY(n) (((n) & 0x1) << 31)
#define ZB_ZCACHE_CTLSTAT__ZC_BUSY__IDLE (0x0 << 31)
#define ZB_ZCACHE_CTLSTAT__ZC_BUSY__BUSY (0x1 << 31)
#define ZB_ZPASS_ADDR__ZPASS_ADDR(n) (((n) & 0x3fffffff) << 2)
#define ZB_ZPASS_DATA__ZPASS_DATA(n) (((n) & 0xffffffff) << 0)
#define ZB_ZSTENCILCNTL__ZFUNC(n) (((n) & 0x7) << 0)
#define ZB_ZSTENCILCNTL__ZFUNC__NEVER (0x0 << 0)
#define ZB_ZSTENCILCNTL__ZFUNC__LESS (0x1 << 0)
#define ZB_ZSTENCILCNTL__ZFUNC__EQUAL (0x3 << 0)
#define ZB_ZSTENCILCNTL__ZFUNC__ALWAYS (0x7 << 0)
#define ZB_ZSTENCILCNTL__STENCILFUNC(n) (((n) & 0x7) << 3)
#define ZB_ZSTENCILCNTL__STENCILFUNC__NEVER (0x0 << 3)
#define ZB_ZSTENCILCNTL__STENCILFUNC__LESS (0x1 << 3)
#define ZB_ZSTENCILCNTL__STENCILFUNC__EQUAL (0x3 << 3)
#define ZB_ZSTENCILCNTL__STENCILFUNC__GREATER (0x5 << 3)
#define ZB_ZSTENCILCNTL__STENCILFUNC__ALWAYS (0x7 << 3)
#define ZB_ZSTENCILCNTL__STENCILFAIL(n) (((n) & 0x7) << 6)
#define ZB_ZSTENCILCNTL__STENCILFAIL__KEEP (0x0 << 6)
#define ZB_ZSTENCILCNTL__STENCILFAIL__ZERO (0x1 << 6)
#define ZB_ZSTENCILCNTL__STENCILFAIL__REPLACE (0x2 << 6)
#define ZB_ZSTENCILCNTL__STENCILFAIL__INCREMENT (0x3 << 6)
#define ZB_ZSTENCILCNTL__STENCILFAIL__DECREMENT (0x4 << 6)
#define ZB_ZSTENCILCNTL__STENCILZPASS(n) (((n) & 0x7) << 9)
#define ZB_ZSTENCILCNTL__STENCILZFAIL(n) (((n) & 0x7) << 12)
#define ZB_ZSTENCILCNTL__STENCILFUNC_BF(n) (((n) & 0x7) << 15)
#define ZB_ZSTENCILCNTL__STENCILFAIL_BF(n) (((n) & 0x7) << 18)
#define ZB_ZSTENCILCNTL__STENCILZPASS_BF(n) (((n) & 0x7) << 21)
#define ZB_ZSTENCILCNTL__STENCILZFAIL_BF(n) (((n) & 0x7) << 24)
#define ZB_ZSTENCILCNTL__ZERO_OUTPUT_MASK(n) (((n) & 0x1) << 27)
#define ZB_ZSTENCILCNTL__ZERO_OUTPUT_MASK__DISABLE (0x0 << 27)
#define ZB_ZSTENCILCNTL__ZERO_OUTPUT_MASK__ENABLE (0x1 << 27)
#define ZB_ZTOP__ZTOP(n) (((n) & 0x1) << 0)
