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pokemon/main.cpp

490 lines
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C++
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#include <cstdint>
#include "vdp2.h"
#include "vdp1.h"
#include "scu.h"
#include "smpc.h"
#include "sh2.h"
#include "common/copy.hpp"
#include "common/vdp2_func.hpp"
#include "common/intback.hpp"
#include "input.hpp"
#include "gen/maps.hpp"
#include "gen/sprites.hpp"
#include "map_objects.hpp"
#include "maps.hpp" // hack?
#include "sprites.hpp"
constexpr inline uint16_t rgb15(int32_t r, int32_t g, int32_t b)
{
return ((b & 31) << 10) | ((g & 31) << 5) | ((r & 31) << 0);
}
void palette_data()
{
vdp2.cram.u16[3] = rgb15( 0, 0, 0);
vdp2.cram.u16[2] = rgb15(10, 10, 10);
vdp2.cram.u16[1] = rgb15(21, 21, 21);
vdp2.cram.u16[0] = rgb15(31, 31, 31);
}
static inline void _2bpp_4bpp_vram_copy(uint32_t * vram, const start_size_t& buf)
{
for (uint32_t ix = 0; ix < buf.size / 4; ix += 1) {
const uint32_t pixels = reinterpret_cast<uint32_t const * const>(buf.start)[ix];
const uint32_t px0 = pixels >> 16 & 0xffff;
const uint32_t px1 = pixels >> 0 & 0xffff;
#define lshift(n) ((7 - n) * 2)
#define rshift(n) ((7 - n) * 4)
#define px(p, n) (((p >> lshift(n)) & 0b11) << rshift(n))
#define p0(n) (px(px0, n))
#define p1(n) (px(px1, n))
vram[ix * 2 + 0] = p0(7) | p0(6) | p0(5) | p0(4) | p0(3) | p0(2) | p0(1) | p0(0);
vram[ix * 2 + 1] = p1(7) | p1(6) | p1(5) | p1(4) | p1(3) | p1(2) | p1(1) | p1(0);
#undef p1
#undef p0
#undef px
#undef lshift
#undef rshift
}
}
uint32_t character_pattern_table(const start_size_t& buf, const uint32_t top)
{
// round to nearest multiple of 32
const uint32_t table_size = ((buf.size * 2) + 0x20 - 1) & (-0x20);
const uint32_t base_address = top - table_size;
uint32_t * vram = &vdp1.vram.u32[(base_address / 4)];
_2bpp_4bpp_vram_copy(vram, buf);
return base_address;
}
uint32_t cell_data(const start_size_t& buf, const uint32_t top)
{
// round to nearest multiple of 32
const uint32_t table_size = ((buf.size * 2) + 0x20 - 1) & (-0x20);
const uint32_t base_address = top - table_size; // in bytes
uint32_t * vram = &vdp2.vram.u32[(base_address / 4)];
_2bpp_4bpp_vram_copy(vram, buf);
return base_address;
}
constexpr inline void render_block(const uint32_t base_pattern,
const tileset_t& tileset,
const int32_t map_x,
const int32_t map_y,
const uint8_t block)
{
for (int32_t block_y = 0; block_y < 4; block_y++) {
for (int32_t block_x = 0; block_x < 4; block_x++) {
const int32_t block_ix = 4 * block_y + block_x;
const uint8_t tile_ix = tileset.blockset.start[block * 4 * 4 + block_ix];
const int32_t cell_y = map_y * 4 + block_y;
const int32_t cell_x = map_x * 4 + block_x;
// assumes NBG0 map plane_a is at offset 0
vdp2.vram.u16[64 * (cell_y % 64) + (cell_x % 64)] = (base_pattern & 0xfff) + tile_ix;
//vdp2.vram.u32[64 * cell_y + cell_x] = base_pattern + tile_ix;
}
}
}
constexpr int32_t last_map = map_t::wardens_house;
struct draw_t {
struct {
uint16_t tilesets[tilesets_ix_last]; // div 32
uint16_t spritesheets[spritesheets_ix_last]; // div 128
} base_pattern;
};
struct player_t {
struct {
int16_t x;
int16_t y;
};
};
struct state_t {
int32_t map_ix;
draw_t draw;
player_t player;
};
static state_t state = { 0 };
uint32_t load_tileset(uint32_t top, enum tileset_t::tileset tileset)
{
uint32_t base_address = top = cell_data(tilesets[tileset].tileset, top);
state.draw.base_pattern.tilesets[tileset] = base_address / 32;
return top;
}
uint32_t load_sprite(uint32_t top, enum spritesheet_t::spritesheet spritesheet)
{
const spritesheet_t& s = spritesheets[spritesheet];
uint32_t base_address = top = character_pattern_table(s.spritesheet, top);
state.draw.base_pattern.spritesheets[spritesheet] = base_address / 128;
return top;
}
void load_vram()
{
vdp2.reg.CYCA0 = 0xeeee'eeee;
vdp2.reg.CYCA1 = 0xeeee'eeee;
vdp2.reg.CYCB0 = 0xeeee'eeee;
vdp2.reg.CYCB1 = 0xeeee'eeee;
uint32_t vdp2_top = (sizeof (union vdp2_vram));
for (uint32_t i = 0; i < tilesets_ix_last; i++)
vdp2_top = load_tileset(vdp2_top, tilesets_ix[i]);
vdp2.reg.CYCA0 = 0x0121'ffff;
vdp2.reg.CYCA1 = 0x0121'ffff;
vdp2.reg.CYCB0 = 0x4565'ffff;
vdp2.reg.CYCB1 = 0x4565'ffff;
uint32_t vdp1_top = (sizeof (union vdp1_vram));
for (uint32_t i = 0; i < spritesheets_ix_last; i++)
vdp1_top = load_sprite(vdp1_top, spritesheets_ix[i]);
}
// screen space
constexpr int32_t origin_px_x = ((320 - 160) / 2);
constexpr int32_t origin_px_y = ((240 - 144) / 2);
constexpr int32_t origin_cell_x = origin_px_x / 8;
constexpr int32_t origin_cell_y = origin_px_y / 8;
void render_sprites()
{
uint32_t ix = 2;
constexpr uint32_t color_address = 0;
const uint32_t character_address = (state.draw.base_pattern.spritesheets[spritesheet_t::oak] * 128) / 8;
vdp1.vram.cmd[ix].CTRL = CTRL__JP__JUMP_NEXT | CTRL__COMM__NORMAL_SPRITE;
vdp1.vram.cmd[ix].LINK = 0;
// The "end code" is 0xf, which is being used in the mai sprite palette. If
// both transparency and end codes are enabled, it seems there are only 14
// usable colors in the 4-bit color mode.
vdp1.vram.cmd[ix].PMOD = PMOD__ECD | PMOD__COLOR_MODE__COLOR_BANK_16;
// It appears Kronos does not correctly calculate the color address in the
// VDP1 debugger. Kronos will report FFFC when the actual color table address
// in this example is 7FFE0.
vdp1.vram.cmd[ix].COLR = color_address; // non-palettized (rgb15) color data
vdp1.vram.cmd[ix].SRCA = character_address;
vdp1.vram.cmd[ix].SIZE = SIZE__X(16) | SIZE__Y(16);
vdp1.vram.cmd[ix].XA = origin_px_x + 4 * 16;
vdp1.vram.cmd[ix].YA = origin_px_y + 4 * 16 - 4;
ix++;
constexpr uint16_t top_x = 80 - 1;
constexpr uint16_t top_y = 48 - 1;
constexpr uint16_t bot_x = 239 + 1;
constexpr uint16_t bot_y = 191 + 1;
vdp1.vram.cmd[ix].CTRL = CTRL__JP__JUMP_NEXT | CTRL__COMM__POLYLINE;
vdp1.vram.cmd[ix].LINK = 0;
// "Set [ECD] to '1' for polygons, polylines, and lines"
// "Be sure to set [SPD] to '1' for polygons, polylines, and lines"
//
// The "user clip mode" bit is not set in PMOD here, so setting "user clip
// coordinates" has no effect on this draw command. However, "system clip
// coordinates" and "local coordinates" are always applied, and must be set to
// reasonable values.
vdp1.vram.cmd[ix].PMOD = PMOD__ECD | PMOD__SPD;
vdp1.vram.cmd[ix].COLR = COLR__RGB | rgb15(255, 0, 255);
vdp1.vram.cmd[ix].XA = top_x;
vdp1.vram.cmd[ix].YA = top_y;
vdp1.vram.cmd[ix].XB = bot_x;
vdp1.vram.cmd[ix].YB = top_y;
vdp1.vram.cmd[ix].XC = bot_x;
vdp1.vram.cmd[ix].YC = bot_y;
vdp1.vram.cmd[ix].XD = top_x;
vdp1.vram.cmd[ix].YD = bot_y;
ix++;
vdp1.vram.cmd[ix].CTRL = CTRL__END;
}
static uint16_t scroll = 0;
/*
in block units:
world screen
-----------|---------
player 0,0 | map 4,4
scrolled 16,16
player 1,1 |
world | screen
--------------------------|---------
top left = player x - 5 | (add 4)
top right = player x - 5 | (add 4)
----
screen scroll
0,0 -> screen 0,0
1,1 -> screen 16,16
*/
void render_map()
{
if (++scroll > 64) {
scroll = 0;
state.player.x += 1;
state.player.y += 1;
}
vdp2.reg.SCXIN0 = (state.player.x - 1) * 16 + (scroll / 4);
vdp2.reg.SCYIN0 = (state.player.y - 1) * 16 + (scroll / 4);
/*
vdp2.reg.WPSX0 = 80 << 1;
vdp2.reg.WPSY0 = 48;
vdp2.reg.WPEX0 = 239 << 1;
vdp2.reg.WPEY0 = 191;
vdp2.reg.WCTLA = WCTLA__N0W0E | WCTLA__N0W0A__OUTSIDE;
*/
const map_t& map = maps[maps_ix[state.map_ix]];
const uint8_t border_block = map_objects[maps_ix[state.map_ix]].border_block;
const uint32_t base_pattern = state.draw.base_pattern.tilesets[map.tileset];
vdp2.reg.PNCN0 = PNCN0__N0PNB__1WORD | PNCN0__N0CNSM | PNCN0__N0SCN((base_pattern >> 10) & 0x1f);
int32_t origin_x = state.player.x / 2;
int32_t origin_y = state.player.y / 2;
int32_t offset_x = state.player.x & 1;
int32_t offset_y = state.player.y & 1;
fill<uint32_t>(vdp2.vram.u32, 0, 64 * 64 * 2);
for (int32_t y = origin_y - 3 + offset_x; y <= (origin_y + 2 + offset_x); y++) {
for (int32_t x = origin_x - 3 + offset_y; x <= (origin_x + 3 + offset_y); x++) {
const uint8_t block = ( (x < static_cast<int32_t>(map.width))
&& (y < static_cast<int32_t>(map.height))
&& (x >= 0)
&& (y >= 0))
? map.blocks.start[map.width * y + x]
: border_block;
//const uint8_t block = map.blocks.start[map.width * 0 + 0];
render_block(base_pattern,
tilesets[map.tileset],
x + 4,
y + 3,
block);
}
}
vdp2.reg.BGON = BGON__N0ON | BGON__N0TPON;
}
void render()
{
render_map();
render_sprites();
}
void update()
{
if (event::cursor_right()) {
state.map_ix++;
if (state.map_ix >= map_ix_last)
state.map_ix = 0;
}
if (event::cursor_left()) {
state.map_ix--;
if (state.map_ix < 0) state.map_ix = last_map;
}
}
extern "C"
void v_blank_in_int(void) __attribute__ ((interrupt_handler));
void v_blank_in_int()
{
scu.reg.IST &= ~(IST__V_BLANK_IN);
scu.reg.IMS = ~(IMS__SMPC | IMS__V_BLANK_IN);
sh2.reg.FRC.H = 0;
sh2.reg.FRC.L = 0;
sh2.reg.FTCSR = 0; // clear flags
render();
update();
// wait at least 300us, as specified in the SMPC manual.
// It appears reading FRC.H is mandatory and *must* occur before FRC.L on real
// hardware.
while ((sh2.reg.FTCSR & FTCSR__OVF) == 0 && sh2.reg.FRC.H == 0 && sh2.reg.FRC.L < 63);
// on real hardware, SF contains uninitialized garbage bits other than the
// lsb.
while ((smpc.reg.SF & 1) != 0);
smpc.reg.SF = 0;
smpc.reg.IREG[0].val = INTBACK__IREG0__STATUS_DISABLE;
smpc.reg.IREG[1].val = ( INTBACK__IREG1__PERIPHERAL_DATA_ENABLE
| INTBACK__IREG1__PORT2_15BYTE
| INTBACK__IREG1__PORT1_15BYTE
);
smpc.reg.IREG[2].val = INTBACK__IREG2__MAGIC;
smpc.reg.COMREG = COMREG__INTBACK;
}
extern "C"
void smpc_int(void) __attribute__ ((interrupt_handler));
void smpc_int(void)
{
scu.reg.IST &= ~(IST__SMPC);
scu.reg.IMS = ~(IMS__SMPC | IMS__V_BLANK_IN);
intback::fsm(digital_callback, nullptr);
}
void init_vdp1()
{
/* TVM settings must be performed from the second H-blank IN interrupt after the
V-blank IN interrupt to the H-blank IN interrupt immediately after the V-blank
OUT interrupt. */
// "normal" display resolution, 16 bits per pixel, 512x256 framebuffer
vdp1.reg.TVMR = TVMR__TVM__NORMAL;
// swap framebuffers every 1 cycle; non-interlace
vdp1.reg.FBCR = 0;
// during a framebuffer erase cycle, write the color "black" to each pixel
constexpr uint16_t black = 0x0000;
vdp1.reg.EWDR = black;
// the EWLR/EWRR macros use somewhat nontrivial math for the X coordinates
// erase upper-left coordinate
vdp1.reg.EWLR = EWLR__16BPP_X1(0) | EWLR__Y1(0);
// erase lower-right coordinate
vdp1.reg.EWRR = EWRR__16BPP_X3(319) | EWRR__Y3(239);
vdp1.vram.cmd[0].CTRL = CTRL__JP__JUMP_NEXT | CTRL__COMM__SYSTEM_CLIP_COORDINATES;
vdp1.vram.cmd[0].LINK = 0;
vdp1.vram.cmd[0].XC = 319;
vdp1.vram.cmd[0].YC = 239;
vdp1.vram.cmd[1].CTRL = CTRL__JP__JUMP_NEXT | CTRL__COMM__LOCAL_COORDINATE;
vdp1.vram.cmd[1].LINK = 0;
vdp1.vram.cmd[1].XA = 0;
vdp1.vram.cmd[1].YA = 0;
vdp1.vram.cmd[2].CTRL = CTRL__END;
// start drawing (execute the command list) on every frame
vdp1.reg.PTMR = PTMR__PTM__FRAME_CHANGE;
}
void init_vdp2()
{
vdp2.reg.PRISA = PRISA__S0PRIN(7); // Sprite register 0 PRIority Number
vdp2.reg.PRINA = PRINA__N0PRIN(5)
| PRINA__N1PRIN(6);
// DISP: Please make sure to change this bit from 0 to 1 during V blank.
vdp2.reg.TVMD = ( TVMD__DISP | TVMD__LSMD__NON_INTERLACE
| TVMD__VRESO__240 | TVMD__HRESO__NORMAL_320);
vdp2.reg.EXTEN = 0;
/* set the color mode to 5bits per channel, 1024 colors */
vdp2.reg.RAMCTL = RAMCTL__CRKTE | RAMCTL__CRMD__RGB_5BIT_1024;// | RAMCTL__VRAMD | RAMCTL__VRBMD;
/* disable display of NBG0 */
vdp2.reg.BGON = 0;
/* set character format for NBG0 to palettized 16 color
set enable "cell format" for NBG0
set character size for NBG0 to 1x1 cell */
vdp2.reg.CHCTLA = CHCTLA__N0CHCN__16_COLOR
| CHCTLA__N0BMEN__CELL_FORMAT
| CHCTLA__N0CHSZ__1x1_CELL
| CHCTLA__N1CHCN__16_COLOR
| CHCTLA__N1BMEN__CELL_FORMAT
| CHCTLA__N1CHSZ__1x1_CELL;
/* plane size */
vdp2.reg.PLSZ = PLSZ__N0PLSZ__1x1
| PLSZ__N1PLSZ__1x1;
/* map plane offset
1-word: value of bit 6-0 * 0x2000
2-word: value of bit 5-0 * 0x4000
*/
constexpr int nbg0_plane_a = 0;
constexpr int nbg1_plane_a = 1;
//constexpr int plane_a_offset = plane_a * 0x2000;
//constexpr int page_size = 64 * 64 * 2; // N0PNB__1WORD (16-bit)
//constexpr int plane_size = page_size * 1;
// bits 8~6
vdp2.reg.MPOFN = MPOFN__N0MP(0)
| MPOFN__N1MP(0);
vdp2.reg.MPABN0 = MPABN0__N0MPB(0) | MPABN0__N0MPA(nbg0_plane_a); // bits 5~0
vdp2.reg.MPCDN0 = MPCDN0__N0MPD(0) | MPCDN0__N0MPC(0); // bits 5~0
vdp2.reg.MPABN1 = MPABN1__N1MPB(0) | MPABN1__N1MPA(nbg1_plane_a); // bits 5~0
vdp2.reg.MPCDN1 = MPCDN1__N1MPD(0) | MPCDN1__N1MPC(0); // bits 5~0
auto& base_pattern = state.draw.base_pattern.tilesets[tileset_t::overworld];
vdp2.reg.PNCN0 = PNCN0__N0PNB__1WORD | PNCN0__N0CNSM | PNCN0__N0SCN((base_pattern >> 10) & 0x1f);
vdp2.reg.PNCN1 = PNCN1__N1PNB__1WORD | PNCN1__N1CNSM | PNCN1__N1SCN((base_pattern >> 10) & 0x1f);
vdp2.vram.u16[0x2000 / 2 + 0] = (base_pattern & 0xfff) + 1;
vdp2.vram.u16[0x2000 / 2 + 1] = (base_pattern & 0xfff) + 2;
palette_data();
}
void main()
{
state.map_ix = map_t::pallet_town;
load_vram();
v_blank_in();
init_vdp1();
init_vdp2();
// free-running timer
sh2.reg.TCR = TCR__CKS__INTERNAL_DIV128;
sh2.reg.FTCSR = 0;
// initialize smpc
smpc.reg.DDR1 = 0; // INPUT
smpc.reg.DDR2 = 0; // INPUT
smpc.reg.IOSEL = 0; // SMPC control
smpc.reg.EXLE = 0; //
sh2_vec[SCU_VEC__SMPC] = (u32)(&smpc_int);
sh2_vec[SCU_VEC__V_BLANK_IN] = (u32)(&v_blank_in_int);
scu.reg.IST = 0;
scu.reg.IMS = ~(IMS__SMPC | IMS__V_BLANK_IN);
}
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