arm7: copy to exclusive internal ram
Before this commit, attempting to start the rom on real NDS/DSi hardware would result in the display of a solid white screen, with no apparent evidence of the arm9 program running. After much testing, I found that this issue was directly caused "main mmeory" bus contention. Because arm7 and arm9 are both attempting to read instructions from ewram at the same time, and arm9 bus access stalls completely. I also found that this could not be mitigated with giving arm9 priority in EXMEMCNT. The solution appears to be to relocate arm7 code execution from main/shared memory to an arm7-internal memory. After this commit, the examples now function as intended on real NDS/DSi hardware.
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95baf481d7
commit
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1
Makefile
1
Makefile
@ -15,6 +15,7 @@ registers:
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DEFAULT = header.o arm7/arm7.bin.o
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2d_engine.elf: $(DEFAULT) arm9/2d_engine.bin.o
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triangle.elf: $(DEFAULT) arm9/triangle.bin.o
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triangle_rotating.elf: $(DEFAULT) arm9/triangle_rotating.bin.o
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texture.elf: $(DEFAULT) arm9/texture.bin.o
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@ -2,47 +2,50 @@ OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
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OUTPUT_ARCH(arm)
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MEMORY
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{
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ram : ORIGIN = 0x02000000, LENGTH = 4M
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main_memory : ORIGIN = 0x02390000, LENGTH = 256K
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arm7_exclusive_internal_work_ram : ORIGIN = 0x03800000, LENGTH = 64K
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}
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SECTIONS
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{
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. = ORIGIN(ram) + 0x390000;
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. = ORIGIN(arm7_exclusive_internal_work_ram);
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.text ALIGN(4) :
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{
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KEEP(*(.text.start))
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*(.text)
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*(.text.*)
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*(.glue_7t)
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*(.glue_7)
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*(.vfp11_veneer)
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*(.v4_bx)
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} > ram
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. = ALIGN(32);
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} >arm7_exclusive_internal_work_ram AT>main_memory
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.data ALIGN(4) :
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{
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*(.data)
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*(.data.*)
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} > ram
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} >arm7_exclusive_internal_work_ram AT>main_memory
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.rodata ALIGN(4) :
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{
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*(.rodata)
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*(.rodata.*)
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} > ram
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} >arm7_exclusive_internal_work_ram AT>main_memory
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.ctors ALIGN(4) :
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{
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KEEP(*(.ctors))
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KEEP(*(.ctors.*))
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} > ram
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} >arm7_exclusive_internal_work_ram AT>main_memory
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.bss ALIGN(4) (NOLOAD) :
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{
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*(.bss)
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*(.bss.*)
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*(COMMON)
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} > ram
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} >arm7_exclusive_internal_work_ram
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/DISCARD/ :
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{
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*(.glue_7) *(.glue_7t) *(.vfp11_veneer) *(.v4_bx)
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}
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INCLUDE "../debug.lds"
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}
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24
arm7/start.s
24
arm7/start.s
@ -1,4 +1,26 @@
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.macro COPY_32_BYTE_ALIGNED
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cmp r1, r10
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beq _fill_break.\@
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_fill_loop.\@:
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ldmia r0!, {r2 - r9}
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stmia r1!, {r2 - r9}
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cmp r1, r10
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bne _fill_loop.\@
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_fill_break.\@:
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.endm
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.section .text.start
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.global _start
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_start:
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b _start
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// copy .text to internal ram
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ldr r0, =__text_load_start
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ldr r1, =__text_link_start
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ldr r10, =__text_link_end
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COPY_32_BYTE_ALIGNED
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// jump to internal ram
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ldr r3,=_loop_forever
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bx r3
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_loop_forever:
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b _loop_forever
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@ -49,3 +49,5 @@ SECTIONS
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INCLUDE "../symbols.lds"
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INCLUDE "addresses.lds"
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__stack_end = ORIGIN(ram) + LENGTH(ram) - 4;
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6
dump.py
6
dump.py
@ -58,10 +58,12 @@ for name, offset, size in fields:
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print(f'{b:02x}', end='')
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pad = ' ' * (17 * 2 - size * 2)
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if size == 4:
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if name in {'game title', 'game code'}:
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print(pad, buf[offset:offset+size], end='')
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elif size == 4:
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n, = struct.unpack('<I', buf[offset:offset+size])
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print(pad, f"0x{n:08x}", end='')
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if size == 2:
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elif size == 2:
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n, = struct.unpack('<H', buf[offset:offset+size])
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print(pad, f"0x{n:04x}", end='')
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print()
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2
header.s
2
header.s
@ -1,7 +1,7 @@
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.section .text.header
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.ascii "game title " /* Game Title */
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.ascii "AAAA" /* Game Code */
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.ascii "####" /* Game Code */
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.ascii "00" /* Maker Code */
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.byte 0x0 /* Unit Code */
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.byte 0x0 /* Device type */
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@ -1,5 +1,3 @@
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__stack_end = ORIGIN(ram) + LENGTH(ram) - 4;
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__text_link_start = ADDR(.text);
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__text_link_end = ADDR(.text) + SIZEOF(.text);
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__text_load_start = LOADADDR(.text);
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