parser: DMA memory src/dst arguments update CTn

This means that they are more appropriately named MCn rather than Mn.

README.rst

@@ -32,34 +32,29 @@ not cover 100% of the possible SCU DSP instructions or arguments.
 Differences that affect source code
 ===================================
 
-MC0-MC3 must not appear in in DMA source/destination arguments
---------------------------------------------------------------
+M0-M3 must not appear in in DMA source/destination arguments
+------------------------------------------------------------
 
 For example, the following are not legal:
 
 .. code::
    
-   DMA D0,MC0,#$02
-   DMA MC1,D0,#$02
+   DMA D0,M0,#$02
+   DMA M1,D0,#$02
 
 Instead, they should be written as:
 
 .. code::
    
-   DMA D0,M0,#$02
-   DMA M1,D0,#$02
+   DMA D0,MC0,#$02
+   DMA MC1,D0,#$02
    
 ``dspasm.exe`` generates the same code given either the former or
 latter example as input. scu-dsp-asm, however, rejects the former
 example as invalid: it misleads what the result of the operation is.
 
-This change is consistent with what is written in the SCU manual
-(ST-97-R5-072694), but is inconsistent with SEGA's SCU DSP examples.
-
-.. note::
-
-   It is currently unclear which of the two is correct. A future
-   version of scu-dsp-asm may change this behavior.
+This change is not consistent with what is written in the SCU manual
+(ST-97-R5-072694).
 
 Differences that affect code generation
 =======================================

parser.cpp

@@ -464,10 +464,10 @@ static dma::add_mode_t dma_add(const token_t& token)
 dma::src_t parser_t::dma_src()
 {
   switch (advance().type) {
-  case _m0: return dma::src_t::m0;
-  case _m1: return dma::src_t::m1;
-  case _m2: return dma::src_t::m2;
-  case _m3: return dma::src_t::m3;
+  case _mc0: return dma::src_t::mc0;
+  case _mc1: return dma::src_t::mc1;
+  case _mc2: return dma::src_t::mc2;
+  case _mc3: return dma::src_t::mc3;
   default:
     throw error(previous(), "expected dma source operand");
   }
@@ -476,10 +476,10 @@ dma::src_t parser_t::dma_src()
 dma::dst_t parser_t::dma_dst()
 {
   switch (advance().type) {
-  case _m0:  return dma::dst_t::m0;
-  case _m1:  return dma::dst_t::m1;
-  case _m2:  return dma::dst_t::m2;
-  case _m3:  return dma::dst_t::m3;
+  case _mc0: return dma::dst_t::mc0;
+  case _mc1: return dma::dst_t::mc1;
+  case _mc2: return dma::dst_t::mc2;
+  case _mc3: return dma::dst_t::mc3;
   case _prg: return dma::dst_t::prg;
   default:
     throw error(previous(), "expected dma destination operand");

stmt.hpp

@@ -379,10 +379,10 @@ static uint32_t src_bits(src_t src)
   using enum src_t;
 
   switch (src) {
-  case m0 : return 0b000 << 8;
-  case m1 : return 0b001 << 8;
-  case m2 : return 0b010 << 8;
-  case m3 : return 0b011 << 8;
+  case mc0: return 0b000 << 8;
+  case mc1: return 0b001 << 8;
+  case mc2: return 0b010 << 8;
+  case mc3: return 0b011 << 8;
   default: __builtin_unreachable();
   }
 }
@@ -392,10 +392,10 @@ static uint32_t dst_bits(dst_t dst)
   using enum dst_t;
 
   switch (dst) {
-  case m0 : return 0b000 << 8;
-  case m1 : return 0b001 << 8;
-  case m2 : return 0b010 << 8;
-  case m3 : return 0b011 << 8;
+  case mc0: return 0b000 << 8;
+  case mc1: return 0b001 << 8;
+  case mc2: return 0b010 << 8;
+  case mc3: return 0b011 << 8;
   case prg: return 0b100 << 8;
   default: __builtin_unreachable();
   }

stmt_enum.hpp

@@ -72,11 +72,11 @@ enum struct add_mode_t {
 };
 
 enum struct src_t {
-  m0, m1, m2, m3
+  mc0, mc1, mc2, mc3,
 };
 
 enum struct dst_t {
-  m0, m1, m2, m3,
+  mc0, mc1, mc2, mc3,
   prg,
 };
 

stmt_string.cpp

@@ -113,17 +113,17 @@ const std::string add_mode_string[] = {
 };
 
 const std::string src_string[] = {
-  [i(src_t::m0)] = "m0",
-  [i(src_t::m1)] = "m1",
-  [i(src_t::m2)] = "m2",
-  [i(src_t::m3)] = "m3"
+  [i(src_t::mc0)] = "mc0",
+  [i(src_t::mc1)] = "mc1",
+  [i(src_t::mc2)] = "mc2",
+  [i(src_t::mc3)] = "mc3"
 };
 
 const std::string dst_string[] = {
-  [i(dst_t::m0 )] = "m0",
-  [i(dst_t::m1 )] = "m1",
-  [i(dst_t::m2 )] = "m2",
-  [i(dst_t::m3 )] = "m3",
+  [i(dst_t::mc0)] = "mc0",
+  [i(dst_t::mc1)] = "mc1",
+  [i(dst_t::mc2)] = "mc2",
+  [i(dst_t::mc3)] = "mc3",
   [i(dst_t::prg)] = "prg",
 };