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README: improve DMA add mode explanation

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This commit is contained in:
Zack Buhman 2023-08-24 19:40:11 +00:00
parent 61ca304384
commit 3316a67794
1 changed files with 4 additions and 3 deletions
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README.rst
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@ -123,9 +123,10 @@ emit "add mode 1" via the ``DMA1`` and ``DMAH1`` mnemonics.
DMA "add mode" and bytes DMA "add mode" and bytes
------------------------ ------------------------
All of the documentation you have read is invalid; this is the correct All of the SEGA-authored documentation on this topic is invalid. The
relationship between DMA "add mode" mnemonics. The right columns represent the the correct relationship between DMA "add mode" mnemonics and bus
the increment added an offset of RA0/WA0 after each bus transfer: address offsets is shown below. The right columns represent the
increment added the bus address after each bus transfer:
.. list-table:: .. list-table::
:header-rows: 1 :header-rows: 1