Zack Buhman
bcaa9789cf
The previous texture_memory_alloc.hpp was written based on an incorrect understanding of the "32-bit" and "64-bit" texture memory address mapping. The primary motivation is to rearrange the texture memory address map so that "textures" (64-bit access) do not overlap with 32-bit accesses, such as REGION_BASE or PARAM_BASE.
83 lines
2.3 KiB
C++
83 lines
2.3 KiB
C++
#pragma once
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#include <cstdint>
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#include <cstddef>
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/*
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* A 0x10000-byte region array is sufficient for 9 render passes:
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*
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* ((640 / 32) * (480 / 32) * 6 * 4) * 9 == 0xfd20
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*/
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namespace texture_memory_alloc {
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constexpr uint32_t address_64to32(uint32_t addr)
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{
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uint32_t value = ((addr & 0xfffffff8) >> 1) + (addr & 0x3);
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if ((addr & 0x4) != 0)
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value += 0x400000;
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if (addr >= 0x800000)
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value += 0x400000;
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return value;
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}
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struct start_end {
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uint32_t start;
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uint32_t end;
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};
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// 32-bit transfer
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constexpr start_end isp_tsp_parameters = {
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.start = address_64to32(0x00'0000),
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.end = address_64to32(0x00'0000) + 0x10'0000, // next: 0x20'0000
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};
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constexpr start_end object_list = {
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.start = address_64to32(0x00'0004),
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.end = address_64to32(0x00'0004) + 0x10'0000 - 0x20, // next: 0x20'0004
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};
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constexpr start_end framebuffer[2] = {
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{
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.start = address_64to32(0x20'0000),
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.end = address_64to32(0x20'0000) + 0x9'6000, // next: 0x32'c000
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},
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{
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.start = address_64to32(0x20'0004),
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.end = address_64to32(0x20'0004) + 0x9'6000, // next: 0x32'c004
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}
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};
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constexpr start_end background = {
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.start = address_64to32(0x32'c000),
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.end = address_64to32(0x32'c000) + 0x40, // next: 0x32'c080
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};
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constexpr start_end region_array = {
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.start = address_64to32(0x32'c080),
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.end = address_64to32(0x32'c080) + 0x1'0000, // next: 0x34'c080
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};
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// 64-bit transfer
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constexpr start_end texture = {
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.start = 0x40'0000,
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.end = 0x80'0000,
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};
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}
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/*
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struct texture_memory_alloc {
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union {
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struct {
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uint32_t isp_tsp_parameters[0x0010'0000 / 4]; // TA_ISP_BASE / PARAM_BASE (the actual objects)
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uint32_t object_list[0x0010'0000 / 4]; // TA_OL_BASE (contains object pointer blocks)
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uint32_t _res0[ 0x20 * 2 / 4]; // (the TA may clobber 4 bytes starting at TA_OL_LIMIT)
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uint32_t background[0x00000040 * 2 / 4]; // ISP_BACKGND_T
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uint32_t region_array[0x00004000 * 2 / 4]; // REGION_BASE
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uint32_t framebuffer[2][0x0009'6000 * 2 / 4]; // FB_R_SOF1 / FB_W_SOF1
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};
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uint32_t bank0[0x400000 / 4];
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};
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uint16_t texture[0x200000 / 2]; // texture_control_word::texture_address
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};
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static_assert((sizeof (texture_memory_alloc)) <= 0x800000);
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//static_assert((offsetof (struct texture_memory_alloc, texture)) == 0x400000);
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*/
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