167 lines
9.3 KiB
C
167 lines
9.3 KiB
C
#include <stdint.h>
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#include <stddef.h>
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struct holly_reg {
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uint32_t ID; /* Device ID */
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uint32_t REVISION; /* Revision Number */
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uint32_t SOFTRESET; /* CORE & TA software reset */
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uint8_t _pad0[8];
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uint32_t STARTRENDER; /* Drawing start */
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uint32_t TEST_SELECT; /* Test (writing this register is prohibited) */
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uint8_t _pad1[4];
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uint32_t PARAM_BASE; /* Base address for ISP parameters */
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uint8_t _pad2[8];
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uint32_t REGION_BASE; /* Base address for Region Array */
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uint32_t SPAN_SORT_CFG; /* Span Sorter control */
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uint8_t _pad3[12];
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uint32_t VO_BORDER_COL; /* Border area color */
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uint32_t FB_R_CTRL; /* Frame buffer read control */
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uint32_t FB_W_CTRL; /* Frame buffer write control */
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uint32_t FB_W_LINESTRIDE;/* Frame buffer line stride */
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uint32_t FB_R_SOF1; /* Read start address for field - 1/strip - 1 */
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uint32_t FB_R_SOF2; /* Read start address for field - 2/strip - 2 */
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uint8_t _pad4[4];
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uint32_t FB_R_SIZE; /* Frame buffer XY size */
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uint32_t FB_W_SOF1; /* Write start address for field - 1/strip - 1 */
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uint32_t FB_W_SOF2; /* Write start address for field - 2/strip - 2 */
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uint32_t FB_X_CLIP; /* Pixel clip X coordinate */
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uint32_t FB_Y_CLIP; /* Pixel clip Y coordinate */
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uint8_t _pad5[4];
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uint32_t FPU_SHAD_SCALE; /* Intensity Volume mode */
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uint32_t FPU_CULL_VAL; /* Comparison value for culling */
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uint32_t FPU_PARAM_CFG; /* Parameter read control */
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uint32_t HALF_OFFSET; /* Pixel sampling control */
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uint32_t FPU_PERP_VAL; /* Comparison value for perpendicular polygons */
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uint32_t ISP_BACKGND_D; /* Background surface depth */
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uint32_t ISP_BACKGND_T; /* Background surface tag */
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uint8_t _pad6[8];
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uint32_t ISP_FEED_CFG; /* Translucent polygon sort mode */
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uint8_t _pad7[4];
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uint32_t SDRAM_REFRESH; /* Texture memory refresh counter */
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uint32_t SDRAM_ARB_CFG; /* Texture memory arbiter control */
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uint32_t SDRAM_CFG; /* Texture memory control */
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uint8_t _pad8[4];
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uint32_t FOG_COL_RAM; /* Color for Look Up table Fog */
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uint32_t FOG_COL_VERT; /* Color for vertex Fog */
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uint32_t FOG_DENSITY; /* Fog scale value */
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uint32_t FOG_CLAMP_MAX; /* Color clamping maximum value */
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uint32_t FOG_CLAMP_MIN; /* Color clamping minimum value */
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uint32_t SPG_TRIGGER_POS;/* External trigger signal HV counter value */
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uint32_t SPG_HBLANK_INT; /* H-blank interrupt control */
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uint32_t SPG_VBLANK_INT; /* V-blank interrupt control */
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uint32_t SPG_CONTROL; /* Sync pulse generator control */
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uint32_t SPG_HBLANK; /* H-blank control */
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uint32_t SPG_LOAD; /* HV counter load value */
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uint32_t SPG_VBLANK; /* V-blank control */
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uint32_t SPG_WIDTH; /* Sync width control */
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uint32_t TEXT_CONTROL; /* Texturing control */
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uint32_t VO_CONTROL; /* Video output control */
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uint32_t VO_STARTX; /* Video output start X position */
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uint32_t VO_STARTY; /* Video output start Y position */
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uint32_t SCALER_CTL; /* X & Y scaler control */
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uint8_t _pad9[16];
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uint32_t PAL_RAM_CTRL; /* Palette RAM control */
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uint32_t SPG_STATUS; /* Sync pulse generator status */
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uint32_t FB_BURSTCTRL; /* Frame buffer burst control */
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uint32_t FB_C_SOF; /* Current frame buffer start address */
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uint32_t Y_COEFF; /* Y scaling coefficent */
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uint32_t PT_ALPHA_REF; /* Alpha value for Punch Through polygon comparison */
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uint8_t _pad10[4];
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uint32_t TA_OL_BASE; /* Object List write start address */
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uint32_t TA_ISP_BASE; /* ISP/TSP Parameter write start address */
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uint32_t TA_OL_LIMIT; /* Object List write limit address */
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uint32_t TA_ISP_LIMIT; /* ISP/TSP Parameter limit address */
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uint32_t TA_NEXT_OPB; /* Start address for the Object Pointer Block */
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uint32_t TA_ITP_CURRENT; /* Starting address where the next ISP/TSP Parameters are stored */
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uint32_t TA_GLOB_TILE_CLIP;/* Global Tile Clip control */
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uint32_t TA_ALLOC_CTRL; /* Object list control */
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uint32_t TA_LIST_INIT; /* TA initialization */
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uint32_t TA_YUV_TEX_BASE;/* YUV422 texture write start address */
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uint32_t TA_YUV_TEX_CTRL;/* YUV converter control */
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uint32_t TA_YUV_TEX_CNT; /* YUV converter macro block counter value */
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uint8_t _pad11[12];
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uint32_t TA_LIST_CONT; /* TA continuation processing */
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uint32_t TA_NEXT_OPB_INIT;/* Additional OPB starting address */
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uint8_t _pad12[152];
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uint8_t FOG_TABLE[512]; /* Look-up table fog data */
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uint8_t _pad13[512];
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uint8_t TA_OL_POINTERS[2400];/* TA Object List Pointer data */
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uint8_t _pad14[160];
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uint8_t PALETTE_RAM[4096];/* Palette RAM */
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};
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static_assert((offsetof (struct holly_reg, ID)) == 0x0);
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static_assert((offsetof (struct holly_reg, REVISION)) == 0x4);
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static_assert((offsetof (struct holly_reg, SOFTRESET)) == 0x8);
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static_assert((offsetof (struct holly_reg, STARTRENDER)) == 0x14);
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static_assert((offsetof (struct holly_reg, TEST_SELECT)) == 0x18);
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static_assert((offsetof (struct holly_reg, PARAM_BASE)) == 0x20);
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static_assert((offsetof (struct holly_reg, REGION_BASE)) == 0x2c);
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static_assert((offsetof (struct holly_reg, SPAN_SORT_CFG)) == 0x30);
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static_assert((offsetof (struct holly_reg, VO_BORDER_COL)) == 0x40);
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static_assert((offsetof (struct holly_reg, FB_R_CTRL)) == 0x44);
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static_assert((offsetof (struct holly_reg, FB_W_CTRL)) == 0x48);
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static_assert((offsetof (struct holly_reg, FB_W_LINESTRIDE)) == 0x4c);
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static_assert((offsetof (struct holly_reg, FB_R_SOF1)) == 0x50);
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static_assert((offsetof (struct holly_reg, FB_R_SOF2)) == 0x54);
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static_assert((offsetof (struct holly_reg, FB_R_SIZE)) == 0x5c);
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static_assert((offsetof (struct holly_reg, FB_W_SOF1)) == 0x60);
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static_assert((offsetof (struct holly_reg, FB_W_SOF2)) == 0x64);
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static_assert((offsetof (struct holly_reg, FB_X_CLIP)) == 0x68);
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static_assert((offsetof (struct holly_reg, FB_Y_CLIP)) == 0x6c);
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static_assert((offsetof (struct holly_reg, FPU_SHAD_SCALE)) == 0x74);
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static_assert((offsetof (struct holly_reg, FPU_CULL_VAL)) == 0x78);
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static_assert((offsetof (struct holly_reg, FPU_PARAM_CFG)) == 0x7c);
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static_assert((offsetof (struct holly_reg, HALF_OFFSET)) == 0x80);
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static_assert((offsetof (struct holly_reg, FPU_PERP_VAL)) == 0x84);
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static_assert((offsetof (struct holly_reg, ISP_BACKGND_D)) == 0x88);
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static_assert((offsetof (struct holly_reg, ISP_BACKGND_T)) == 0x8c);
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static_assert((offsetof (struct holly_reg, ISP_FEED_CFG)) == 0x98);
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static_assert((offsetof (struct holly_reg, SDRAM_REFRESH)) == 0xa0);
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static_assert((offsetof (struct holly_reg, SDRAM_ARB_CFG)) == 0xa4);
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static_assert((offsetof (struct holly_reg, SDRAM_CFG)) == 0xa8);
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static_assert((offsetof (struct holly_reg, FOG_COL_RAM)) == 0xb0);
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static_assert((offsetof (struct holly_reg, FOG_COL_VERT)) == 0xb4);
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static_assert((offsetof (struct holly_reg, FOG_DENSITY)) == 0xb8);
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static_assert((offsetof (struct holly_reg, FOG_CLAMP_MAX)) == 0xbc);
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static_assert((offsetof (struct holly_reg, FOG_CLAMP_MIN)) == 0xc0);
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static_assert((offsetof (struct holly_reg, SPG_TRIGGER_POS)) == 0xc4);
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static_assert((offsetof (struct holly_reg, SPG_HBLANK_INT)) == 0xc8);
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static_assert((offsetof (struct holly_reg, SPG_VBLANK_INT)) == 0xcc);
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static_assert((offsetof (struct holly_reg, SPG_CONTROL)) == 0xd0);
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static_assert((offsetof (struct holly_reg, SPG_HBLANK)) == 0xd4);
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static_assert((offsetof (struct holly_reg, SPG_LOAD)) == 0xd8);
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static_assert((offsetof (struct holly_reg, SPG_VBLANK)) == 0xdc);
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static_assert((offsetof (struct holly_reg, SPG_WIDTH)) == 0xe0);
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static_assert((offsetof (struct holly_reg, TEXT_CONTROL)) == 0xe4);
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static_assert((offsetof (struct holly_reg, VO_CONTROL)) == 0xe8);
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static_assert((offsetof (struct holly_reg, VO_STARTX)) == 0xec);
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static_assert((offsetof (struct holly_reg, VO_STARTY)) == 0xf0);
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static_assert((offsetof (struct holly_reg, SCALER_CTL)) == 0xf4);
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static_assert((offsetof (struct holly_reg, PAL_RAM_CTRL)) == 0x108);
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static_assert((offsetof (struct holly_reg, SPG_STATUS)) == 0x10c);
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static_assert((offsetof (struct holly_reg, FB_BURSTCTRL)) == 0x110);
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static_assert((offsetof (struct holly_reg, FB_C_SOF)) == 0x114);
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static_assert((offsetof (struct holly_reg, Y_COEFF)) == 0x118);
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static_assert((offsetof (struct holly_reg, PT_ALPHA_REF)) == 0x11c);
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static_assert((offsetof (struct holly_reg, TA_OL_BASE)) == 0x124);
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static_assert((offsetof (struct holly_reg, TA_ISP_BASE)) == 0x128);
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static_assert((offsetof (struct holly_reg, TA_OL_LIMIT)) == 0x12c);
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static_assert((offsetof (struct holly_reg, TA_ISP_LIMIT)) == 0x130);
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static_assert((offsetof (struct holly_reg, TA_NEXT_OPB)) == 0x134);
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static_assert((offsetof (struct holly_reg, TA_ITP_CURRENT)) == 0x138);
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static_assert((offsetof (struct holly_reg, TA_GLOB_TILE_CLIP)) == 0x13c);
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static_assert((offsetof (struct holly_reg, TA_ALLOC_CTRL)) == 0x140);
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static_assert((offsetof (struct holly_reg, TA_LIST_INIT)) == 0x144);
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static_assert((offsetof (struct holly_reg, TA_YUV_TEX_BASE)) == 0x148);
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static_assert((offsetof (struct holly_reg, TA_YUV_TEX_CTRL)) == 0x14c);
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static_assert((offsetof (struct holly_reg, TA_YUV_TEX_CNT)) == 0x150);
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static_assert((offsetof (struct holly_reg, TA_LIST_CONT)) == 0x160);
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static_assert((offsetof (struct holly_reg, TA_NEXT_OPB_INIT)) == 0x164);
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static_assert((offsetof (struct holly_reg, FOG_TABLE)) == 0x200);
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static_assert((offsetof (struct holly_reg, TA_OL_POINTERS)) == 0x600);
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static_assert((offsetof (struct holly_reg, PALETTE_RAM)) == 0x1000);
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extern holly_reg HOLLY;
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