Zack Buhman
95a30b5164
I don't like this example very much, but it was an interesting experiment regardless.
123 lines
4.8 KiB
C++
123 lines
4.8 KiB
C++
#include <cstdint>
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#include "core_bits.hpp"
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#include "ta_bits.hpp"
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#include "../holly.hpp"
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#include "../systembus.hpp"
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#include "../systembus_bits.hpp"
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#include "../sh7091.hpp"
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#include "../sh7091_bits.hpp"
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#include "texture_memory_alloc.hpp"
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#include "ta_fifo_polygon_converter.hpp"
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void ta_polygon_converter_init(uint32_t opb_total_size) // for all render passes
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{
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holly.SOFTRESET = softreset::ta_soft_reset;
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holly.SOFTRESET = 0;
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holly.TA_GLOB_TILE_CLIP = ta_glob_tile_clip::tile_y_num((480 / 32) - 1)
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| ta_glob_tile_clip::tile_x_num((640 / 32) - 1);
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holly.TA_ALLOC_CTRL = ta_alloc_ctrl::opb_mode::increasing_addresses
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| ta_alloc_ctrl::pt_opb::no_list
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| ta_alloc_ctrl::tm_opb::no_list
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| ta_alloc_ctrl::t_opb::no_list
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| ta_alloc_ctrl::om_opb::no_list
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| ta_alloc_ctrl::o_opb::_16x4byte;
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holly.TA_ISP_BASE = (offsetof (struct texture_memory_alloc, isp_tsp_parameters));
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holly.TA_ISP_LIMIT = (offsetof (struct texture_memory_alloc, object_list)); // the end of isp_tsp_parameters
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holly.TA_OL_BASE = (offsetof (struct texture_memory_alloc, object_list));
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holly.TA_OL_LIMIT = (offsetof (struct texture_memory_alloc, _res0)); // the end of the object_list
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holly.TA_NEXT_OPB_INIT = (offsetof (struct texture_memory_alloc, object_list))
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+ opb_total_size; // opb_size is the total size of all OPBs for all passes
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holly.TA_LIST_INIT = ta_list_init::list_init;
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uint32_t _dummy_read = holly.TA_LIST_INIT;
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(void)_dummy_read;
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}
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void ta_polygon_converter_cont(uint32_t ol_base_offset)
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{
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holly.TA_ALLOC_CTRL = ta_alloc_ctrl::opb_mode::increasing_addresses
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| ta_alloc_ctrl::pt_opb::no_list
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| ta_alloc_ctrl::tm_opb::no_list
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| ta_alloc_ctrl::t_opb::_16x4byte
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| ta_alloc_ctrl::om_opb::no_list
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| ta_alloc_ctrl::o_opb::no_list;
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holly.TA_OL_BASE = (offsetof (struct texture_memory_alloc, object_list))
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+ ol_base_offset;
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holly.TA_LIST_CONT = ta_list_cont::list_cont;
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uint32_t _dummy_read = holly.TA_LIST_CONT;
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(void)_dummy_read;
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}
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void ta_polygon_converter_transfer(volatile uint32_t * buf, uint32_t size)
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{
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/* wait for previous transfer to complete (if any) */
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//while ((system.C2DST & C2DST__STATUS) != 0); /* 1 == transfer is in progress */
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/* CHCR2__TE can be reset even if there is no in-progress transfer. Despite
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DCDBSysArc990907E's claim, it does not appear to be useful to check TE. */
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//while ((sh7091.DMAC.CHCR2 & CHCR2__TE) == 0); /* 1 == all transfers are completed */
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/* "Write back" the entire buffer to physical memory.
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This is required on real hardware if CCR__CB is enabled, and `buf` is in a
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cacheable area (e.g: system memory access via 0x8c00_0000).*/
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for (uint32_t i = 0; i < size / 32; i++) {
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asm volatile ("ocbwb @%0"
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: // output
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: "r" (&buf[(i * 32) / 4]) // input
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);
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}
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// this dummy read appears to be required on real hardware.
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volatile uint32_t _dummy = sh7091.DMAC.CHCR2;
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(void)_dummy;
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/* start a new CH2-DMA transfer from "system memory" to "TA FIFO polygon converter" */
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sh7091.DMAC.CHCR2 = 0; /* disable DMA channel */
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sh7091.DMAC.SAR2 = reinterpret_cast<uint32_t>(&buf[0]); /* start address, must be aligned to a CHCHR__TS-sized (32-byte) boundary */
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sh7091.DMAC.DMATCR2 = DMATCR2__TRANSFER_COUNT(size / 32); /* transfer count, in CHCHR__TS-sized (32-byte) units */
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sh7091.DMAC.CHCR2 = CHCR2__DM__DESTINATION_ADDRESS_FIXED
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| CHCR2__SM__SOURCE_ADDRESS_INCREMENTED
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| CHCR2__RS(0b0010) /* external request, single address mode;
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external address space → external device */
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| CHCR2__TM__BURST_MODE /* transmit mode */
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| CHCR2__TS__32_BYTE /* transfer size */
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| CHCR2__DE; /* DMAC (channel) enable */
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sh7091.DMAC.DMAOR = DMAOR__DDT /* on-demand data transfer mode */
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| DMAOR__PR__CH2_CH0_CH1_CH3 /* priority mode; CH2 > CH0 > CH1 > CH3 */
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| DMAOR__DME; /* DMAC master enable */
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system.C2DSTAT = C2DSTAT__ADDRESS(0x10000000); /* CH2-DMA destination address */
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system.C2DLEN = CD2LEN__LENGTH(size) ; /* CH2-DMA length (must be a multiple of 32) */
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system.C2DST = 1; /* CH2-DMA start (an 'external' request from SH7091's perspective) */
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// wait for CH2-DMA completion
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while ((system.ISTNRM & ISTNRM__END_OF_DMA_CH2_DMA) == 0);
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// reset CH2-DMA interrupt status
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system.ISTNRM = ISTNRM__END_OF_DMA_CH2_DMA;
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}
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void ta_wait_opaque_list()
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{
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while ((system.ISTNRM & ISTNRM__END_OF_TRANSFERRING_OPAQUE_LIST) == 0);
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system.ISTNRM = ISTNRM__END_OF_TRANSFERRING_OPAQUE_LIST;
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}
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void ta_wait_translucent_list()
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{
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while ((system.ISTNRM & ISTNRM__END_OF_TRANSFERRING_TRANSLUCENT_LIST) == 0);
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system.ISTNRM = ISTNRM__END_OF_TRANSFERRING_TRANSLUCENT_LIST;
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}
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