98 lines
2.9 KiB
C++
98 lines
2.9 KiB
C++
#include "sh7091/sh7091.hpp"
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#include "sh7091/sh7091_bits.hpp"
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#include "sh7091/serial.hpp"
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#include "memorymap.hpp"
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static void dma(uint32_t source, uint32_t destination, uint32_t transfers)
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{
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using namespace dmac;
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sh7091.DMAC.CHCR1 = 0;
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sh7091.DMAC.SAR1 = source;
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sh7091.DMAC.DAR1 = destination;
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sh7091.DMAC.DMATCR1 = transfers & 0x00ff'ffff;
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sh7091.DMAC.CHCR1 = chcr::dm::destination_address_incremented
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| chcr::sm::source_address_incremented
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| chcr::rs::resource_select(0b0101) /* auto request, external address space → on-chip peripheral module */
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| chcr::tm::cycle_burst_mode /* transmit mode */
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//| chcr::tm::cycle_steal_mode /* transmit mode */
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| chcr::ts::_32_bit /* transfer size */
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//| chcr::ie::interrupt_request_generated
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| chcr::de::channel_operation_enabled;
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}
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static void dma_init()
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{
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using namespace dmac;
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sh7091.DMAC.CHCR0 = 0;
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sh7091.DMAC.CHCR1 = 0;
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sh7091.DMAC.CHCR2 = 0;
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sh7091.DMAC.CHCR3 = 0;
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sh7091.DMAC.DMAOR = dmaor::ddt::normal_dma_mode /* on-demand data transfer mode */
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| dmaor::pr::ch2_ch0_ch1_ch3 /* priority mode; CH2 > CH0 > CH1 > CH3 */
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| dmaor::dme::operation_enabled_on_all_channels; /* DMAC master enable */
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}
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void main()
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{
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sh7091.CCN.CCR |= ccn::ccr::ora::_8_kbytes_used_as_cache_8_kbytes_used_as_ram;
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dma_init();
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// from entry 128 to entry 255 and from entry 384 to entry 511 of the OC are to be used as RAM
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uint32_t * oc_a = &sh7091_oc_d[128 * 32 / 4]; // 1024 words
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uint32_t * oc_b = &sh7091_oc_d[384 * 32 / 4]; // 1024 words
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for (int i = 0; i < 256; i++) {
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oc_a[i] = 0;
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texture_memory32[i] = (1 << 31) | i;
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}
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serial::string("tm: ");
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serial::integer<uint32_t>((uint32_t)&texture_memory32[0]);
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serial::string("oc_a: ");
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serial::integer<uint32_t>((uint32_t)&oc_a[0]);
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serial::string("dmaor: ");
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serial::integer<uint32_t>(sh7091.DMAC.DMAOR);
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uint32_t transfers = 64 / 4;
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dma((uint32_t)&texture_memory32[0], (uint32_t)&oc_a[0], transfers);
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serial::string("sar: ");
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serial::integer<uint32_t>(sh7091.DMAC.SAR1);
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serial::string("dar: ");
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serial::integer<uint32_t>(sh7091.DMAC.DAR1);
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uint32_t last_dar = sh7091.DMAC.DAR1;
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uint32_t count = 0;
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while ((sh7091.DMAC.CHCR1 & dmac::chcr::te::transfers_completed) == 0) {
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uint32_t dar = sh7091.DMAC.DAR1;
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if (dar == last_dar)
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count += 1;
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else
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count = 0;
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if (count > 10)
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goto return_main;
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serial::integer<uint32_t>(sh7091.DMAC.DMAOR);
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}
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serial::string("dmaor: ");
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serial::integer<uint32_t>(sh7091.DMAC.DMAOR);
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serial::string("buf:\n");
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for (int i = 0; i < 64; i++) {
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serial::integer<uint32_t>(oc_a[i]);
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}
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return_main:
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serial::string("return\n");
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serial::string("return\n");
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serial::string("return\n");
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serial::string("return\n");
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}
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