715 lines
23 KiB
C++
715 lines
23 KiB
C++
#include "memorymap.hpp"
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#include "holly/core/object_list_bits.hpp"
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#include "holly/core/region_array.hpp"
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#include "holly/core/region_array_bits.hpp"
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#include "holly/core/parameter_bits.hpp"
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#include "holly/core/parameter.hpp"
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#include "holly/ta/global_parameter.hpp"
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#include "holly/ta/vertex_parameter.hpp"
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#include "holly/ta/parameter_bits.hpp"
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#include "holly/holly.hpp"
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#include "holly/holly_bits.hpp"
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#include "sh7091/sh7091.hpp"
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#include "sh7091/sh7091_bits.hpp"
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#include "sh7091/pref.hpp"
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#include "sh7091/store_queue_transfer.hpp"
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#include "systembus/systembus.hpp"
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#include "systembus/systembus_bits.hpp"
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static inline void character(const char c)
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{
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using sh7091::sh7091;
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using namespace sh7091;
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// set the transmit trigger to `1 byte`--this changes the behavior of TDFE
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sh7091.SCIF.SCFCR2 = scif::scfcr2::ttrg::trigger_on_1_bytes;
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// wait for transmit fifo to become partially empty
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while ((sh7091.SCIF.SCFSR2 & scif::scfsr2::tdfe::bit_mask) == 0);
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// unset tdfe bit
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sh7091.SCIF.SCFSR2 = (uint16_t)(~scif::scfsr2::tdfe::bit_mask);
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sh7091.SCIF.SCFTDR2 = c;
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}
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static void string(const char * s)
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{
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while (*s != 0) {
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character(*s++);
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}
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}
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static void print_base16(uint32_t n, int len)
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{
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char buf[len];
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char * bufi = &buf[len - 1];
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while (bufi >= buf) {
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uint32_t nib = n & 0xf;
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n = n >> 4;
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if (nib > 9) {
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nib += (97 - 10);
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} else {
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nib += (48 - 0);
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}
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*bufi = nib;
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bufi -= 1;
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}
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for (int i = 0; i < len; i++) {
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character(buf[i]);
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}
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}
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#include "../../math/float_types.hpp"
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//#include "model/suzanne.h"
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//#include "model/icosphere.h"
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#include "model/cube.h"
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void transfer_background_polygon(uint32_t isp_tsp_parameter_start)
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{
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using namespace holly::core::parameter;
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using parameter = isp_tsp_parameter<3>;
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volatile parameter * polygon = (volatile parameter *)&texture_memory32[isp_tsp_parameter_start];
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polygon->isp_tsp_instruction_word = isp_tsp_instruction_word::depth_compare_mode::always
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| isp_tsp_instruction_word::culling_mode::no_culling;
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polygon->tsp_instruction_word = tsp_instruction_word::src_alpha_instr::one
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| tsp_instruction_word::dst_alpha_instr::zero
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| tsp_instruction_word::fog_control::no_fog;
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polygon->texture_control_word = 0;
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polygon->vertex[0].x = 0.0f;
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polygon->vertex[0].y = 0.0f;
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polygon->vertex[0].z = 0.00001f;
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polygon->vertex[0].base_color = 0x000000;
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polygon->vertex[1].x = 32.0f;
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polygon->vertex[1].y = 0.0f;
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polygon->vertex[1].z = 0.00001f;
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polygon->vertex[1].base_color = 0x000000;
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polygon->vertex[2].x = 32.0f;
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polygon->vertex[2].y = 32.0f;
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polygon->vertex[2].z = 0.00001f;
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polygon->vertex[2].base_color = 0x000000;
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}
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static inline uint32_t transfer_ta_global_end_of_list(uint32_t store_queue_ix)
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{
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using namespace holly::ta;
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using namespace holly::ta::parameter;
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//
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// TA "end of list" global transfer
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//
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volatile global_parameter::end_of_list * end_of_list = (volatile global_parameter::end_of_list *)&store_queue[store_queue_ix];
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store_queue_ix += (sizeof (global_parameter::end_of_list));
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end_of_list->parameter_control_word = parameter_control_word::para_type::end_of_list;
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// start store queue transfer of `end_of_list` to the TA
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pref(end_of_list);
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return store_queue_ix;
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}
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static inline uint32_t transfer_ta_global_polygon(uint32_t store_queue_ix)
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{
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using namespace holly::core::parameter;
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using namespace holly::ta;
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using namespace holly::ta::parameter;
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//
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// TA polygon global transfer
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//
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volatile global_parameter::polygon_type_0 * polygon = (volatile global_parameter::polygon_type_0 *)&store_queue[store_queue_ix];
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store_queue_ix += (sizeof (global_parameter::polygon_type_0));
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polygon->parameter_control_word = parameter_control_word::para_type::polygon_or_modifier_volume
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| parameter_control_word::list_type::opaque
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| parameter_control_word::col_type::floating_color
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| parameter_control_word::gouraud;
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polygon->isp_tsp_instruction_word = isp_tsp_instruction_word::depth_compare_mode::greater
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| isp_tsp_instruction_word::culling_mode::no_culling;
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// Note that it is not possible to use
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// ISP_TSP_INSTRUCTION_WORD::GOURAUD_SHADING in this isp_tsp_instruction_word,
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// because `gouraud` is one of the bits overwritten by the value in
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// parameter_control_word. See DCDBSysArc990907E.pdf page 200.
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polygon->tsp_instruction_word = tsp_instruction_word::src_alpha_instr::one
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| tsp_instruction_word::dst_alpha_instr::zero
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| tsp_instruction_word::fog_control::no_fog;
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polygon->texture_control_word = 0;
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// start store queue transfer of `polygon` to the TA
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pref(polygon);
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return store_queue_ix;
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}
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#define abs(n) __builtin_abs(n)
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#define cos(n) __builtin_cosf(n)
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#define sin(n) __builtin_sinf(n)
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static float theta = 0;
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static inline vec3 vertex_rotate(vec3 v)
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{
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// to make the models's appearance more interesting, rotate the vertex on two
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// axes
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float x0 = v.x;
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float y0 = v.y;
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float z0 = v.z;
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float x1 = x0 * cos(theta) - z0 * sin(theta);
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float y1 = y0;
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float z1 = x0 * sin(theta) + z0 * cos(theta);
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float x2 = x1;
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float y2 = y1 * cos(theta) - z1 * sin(theta);
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float z2 = y1 * sin(theta) + z1 * cos(theta);
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return (vec3){x2, y2, z2};
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}
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static inline vec3 vertex_perspective_divide(vec3 v)
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{
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float w = 1.0f / (v.z + 2.5f);
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return (vec3){v.x * w, v.y * w, w};
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}
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static inline vec3 vertex_screen_space(vec3 v)
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{
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return (vec3){
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v.x * 240.f + 320.f,
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v.y * 240.f + 240.f,
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v.z,
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};
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}
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static inline uint32_t transfer_ta_vertex_triangle(uint32_t store_queue_ix,
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float x, float y, float z,
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float r, float g, float b,
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bool end_of_strip)
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{
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using namespace holly::ta;
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using namespace holly::ta::parameter;
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//
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// TA polygon vertex transfer
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//
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volatile vertex_parameter::polygon_type_1 * vertex = (volatile vertex_parameter::polygon_type_1 *)&store_queue[store_queue_ix];
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store_queue_ix += (sizeof (vertex_parameter::polygon_type_1)) * 1;
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vertex[0].parameter_control_word = parameter_control_word::para_type::vertex_parameter
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| (end_of_strip ? parameter_control_word::end_of_strip : 0);
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vertex[0].x = x;
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vertex[0].y = y;
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vertex[0].z = z;
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//vertex[0].base_color_alpha = a;
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vertex[0].base_color_r = r;
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vertex[0].base_color_g = g;
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vertex[0].base_color_b = b;
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pref(vertex);
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return store_queue_ix;
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}
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static inline float remap(float f)
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{
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return (f + 1.0f) * 0.5f;
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}
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static inline float unremap(int i)
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{
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return -1.0f + (((float)i) * (1.0f / 255.0f)) * 2.0f;
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}
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static inline vec3 remap_normal(vec3 n)
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{
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return {
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remap(n.x),
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remap(n.y),
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remap(n.z)
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};
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}
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float pow(float f)
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{
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return __builtin_powf(f, 32);
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}
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vec3 lighting(vec3& FragPos, vec3& Normal)
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{
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vec3 lightColor = {1, 1, 1};
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vec3 lightPos = {0, 0, -2};
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vec3 viewPos = {0, 0, -5};
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// ambient
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float ambientStrength = 0.1f;
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vec3 ambient = ambientStrength * lightColor;
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// diffuse
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vec3 norm = normalize(Normal);
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vec3 lightDir = normalize(lightPos - FragPos);
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//vec3 lightDir = normalize(vec3(0, 0, 1));
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float diff = max(dot(norm, lightDir), 0.0f);
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vec3 diffuse = (diff * 0.8f) * lightColor;
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// specular
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float specularStrength = 0.5f;
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vec3 viewDir = normalize(viewPos - FragPos);
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vec3 reflectDir = reflect(-lightDir, norm);
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float spec = pow(max(dot(viewDir, reflectDir), 0.0f));
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vec3 specular = specularStrength * spec * lightColor;
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vec3 intensity = ambient + diffuse + specular;
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return intensity;
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}
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static const int strips_length = (sizeof (strips)) / (sizeof (strips[0]));
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template <int render_mode>
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void transfer_ta_strips()
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{
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{
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using namespace sh7091;
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using sh7091::sh7091;
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// set the store queue destination address to the TA Polygon Converter FIFO
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sh7091.CCN.QACR0 = sh7091::ccn::qacr0::address(ta_fifo_polygon_converter);
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sh7091.CCN.QACR1 = sh7091::ccn::qacr1::address(ta_fifo_polygon_converter);
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}
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uint32_t store_queue_ix = 0;
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store_queue_ix = transfer_ta_global_polygon(store_queue_ix);
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int color_ix = 0;
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for (int strip_ix = 0; strip_ix < strips_length; strip_ix++) {
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int vertex_ix = strips[strip_ix];
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vec3 p = vertex_rotate(vertices[abs(vertex_ix)]);
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vec3 vp = vertex_screen_space(
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vertex_perspective_divide(p));
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vec3 n = vertex_rotate(normals[abs(vertex_ix)]);
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bool end_of_strip = vertex_ix < 0;
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vec3 c = lighting(p, n);
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if constexpr (render_mode == 0) {
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store_queue_ix = transfer_ta_vertex_triangle(store_queue_ix,
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vp.x, vp.y, vp.z,
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remap(p.x), remap(p.y), remap(p.z),
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//c.x, c.y, c.z,
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//remap(n.x), remap(n.y), remap(n.z),
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end_of_strip);
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}
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if constexpr (render_mode == 1) {
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store_queue_ix = transfer_ta_vertex_triangle(store_queue_ix,
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vp.x, vp.y, vp.z,
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//remap(p.x), remap(p.y), remap(p.z),
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//c.x, c.y, c.z,
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remap(n.x), remap(n.y), remap(n.z),
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end_of_strip);
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}
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if constexpr (render_mode == 2) {
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store_queue_ix = transfer_ta_vertex_triangle(store_queue_ix,
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vp.x, vp.y, vp.z,
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//remap(p.x), remap(p.y), remap(p.z),
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c.x, c.y, c.z,
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//remap(n.x), remap(n.y), remap(n.z),
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end_of_strip);
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}
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if (end_of_strip) {
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color_ix = (color_ix + 1) % 64;
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}
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}
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store_queue_ix = transfer_ta_global_end_of_list(store_queue_ix);
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}
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static inline void assert(bool t)
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{
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if (!t) {
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string("assertion failed\n");
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}
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}
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void ch1_dma_transfer(uint32_t source, uint32_t destination, uint32_t transfers)
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{
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using namespace sh7091::dmac;
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using sh7091::sh7091;
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volatile uint32_t _dummy = sh7091.DMAC.CHCR1;
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(void)_dummy;
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sh7091.DMAC.CHCR1 = 0;
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assert((((uint32_t)source) & 0b11111) == 0);
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assert((((uint32_t)destination) & 0b11111) == 0);
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sh7091.DMAC.SAR1 = source;
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sh7091.DMAC.DAR1 = destination;
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sh7091.DMAC.DMATCR1 = dmatcr::transfer_count(transfers);
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sh7091.DMAC.CHCR1 = chcr::dm::destination_address_incremented
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| chcr::sm::source_address_incremented
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| chcr::rs::resource_select(0b0100) /* auto request; external address space → external address space */
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| chcr::tm::cycle_burst_mode /* transmit mode */
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//| chcr::tm::cycle_steal_mode /* transmit mode */
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| chcr::ts::_32_byte /* transfer size */
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//| chcr::ie::interrupt_request_generated
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| chcr::de::channel_operation_enabled;
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}
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void ch2_dma_transfer(uint32_t source, uint32_t destination, uint32_t transfers)
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{
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using namespace sh7091::dmac;
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using sh7091::sh7091;
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using namespace systembus;
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using systembus::systembus;
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for (uint32_t i = 0; i < transfers; i++) {
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ocbp(source + (32 * i));
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}
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// this dummy read appears to be required on real hardware.
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volatile uint32_t _dummy = sh7091.DMAC.CHCR2;
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(void)_dummy;
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systembus.ISTNRM = istnrm::end_of_dma_ch2_dma;
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/* start a new CH2-DMA transfer from "system memory" to "TA FIFO polygon converter" */
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sh7091.DMAC.CHCR2 = 0; /* disable DMA channel */
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sh7091.DMAC.SAR2 = reinterpret_cast<uint32_t>(source); /* start address, must be aligned to a CHCHR__TS-sized (32-byte) boundary */
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sh7091.DMAC.DMATCR2 = dmatcr::transfer_count(transfers); /* transfer count, in CHCHR__TS-sized (32-byte) units */
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sh7091.DMAC.CHCR2 = chcr::dm::destination_address_incremented
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| chcr::sm::source_address_incremented
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| chcr::rs::resource_select(0b0010) /* external request, single address mode;
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external address space → external device */
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| chcr::tm::cycle_burst_mode /* transmit mode */
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| chcr::ts::_32_byte /* transfer size */
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| chcr::de::channel_operation_enabled;
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systembus.C2DSTAT = c2dstat::texture_memory_start_address(destination); /* CH2-DMA destination address */
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systembus.C2DLEN = c2dlen::transfer_length(transfers * 32); /* CH2-DMA length (must be a multiple of 32) */
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systembus.C2DST = 1; /* CH2-DMA start (an 'external' request from SH7091's perspective) */
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}
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static inline void wait_ta()
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{
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using namespace systembus;
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using systembus::systembus;
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while ((systembus.ISTNRM & istnrm::end_of_transferring_opaque_list) == 0);
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systembus.ISTNRM = istnrm::end_of_transferring_opaque_list;
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}
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static inline void wait_render()
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{
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using namespace systembus;
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using systembus::systembus;
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while ((systembus.ISTNRM & istnrm::end_of_render_tsp) == 0) {
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if (systembus.ISTERR) {
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string("ISTERR: ");
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print_base16(systembus.ISTERR, 8);
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string("\n ");
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return;
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}
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for (int i = 0; i < 10000; i++) {
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asm volatile ("nop" ::: "memory");
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}
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}
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systembus.ISTNRM = istnrm::end_of_render_tsp
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| istnrm::end_of_render_isp
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| istnrm::end_of_render_video;
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}
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static uint8_t tmp_buf0[640 * 480 * 4] __attribute__((aligned(32)));
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static uint8_t tmp_buf1[640 * 480 * 4] __attribute__((aligned(32)));
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void main()
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{
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{
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using namespace sh7091::dmac;
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using sh7091::sh7091;
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sh7091.DMAC.CHCR0 = 0;
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sh7091.DMAC.CHCR1 = 0;
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sh7091.DMAC.CHCR2 = 0;
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sh7091.DMAC.CHCR3 = 0;
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sh7091.DMAC.DMAOR = dmaor::ddt::on_demand_data_transfer_mode /* on-demand data transfer mode */
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| dmaor::pr::ch2_ch0_ch1_ch3 /* priority mode; CH2 > CH0 > CH1 > CH3 */
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| dmaor::dme::operation_enabled_on_all_channels; /* DMAC master enable */
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}
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/*
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a very simple memory map:
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the ordering within texture memory is not significant, and could be
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anything
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*/
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uint32_t framebuffer_start[3] = {0x000000, 0x12c000, 0x258000};
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uint32_t region_array_start = 0x384000;
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uint32_t isp_tsp_parameter_start = 0x500000;
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uint32_t object_list_start = 0x400000;
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const int tile_y_num = 480 / 32;
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const int tile_x_num = 640 / 32;
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using namespace holly::core;
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region_array::list_block_size list_block_size = {
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.opaque = 32 * 4,
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};
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region_array::transfer(tile_x_num,
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tile_y_num,
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list_block_size,
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region_array_start,
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object_list_start);
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transfer_background_polygon(isp_tsp_parameter_start);
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//////////////////////////////////////////////////////////////////////////////
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// configure the TA
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//////////////////////////////////////////////////////////////////////////////
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using namespace holly;
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using holly::holly;
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// TA_GLOB_TILE_CLIP restricts which "object pointer blocks" are written
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// to.
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//
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// This can also be used to implement "windowing", as long as the desired
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// window size happens to be a multiple of 32 pixels. The "User Tile Clip" TA
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// control parameter can also ~equivalently be used as many times as desired
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// within a single TA initialization to produce an identical effect.
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//
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// See DCDBSysArc990907E.pdf page 183.
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holly.TA_GLOB_TILE_CLIP = ta_glob_tile_clip::tile_y_num(tile_y_num - 1)
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| ta_glob_tile_clip::tile_x_num(tile_x_num - 1);
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// While CORE supports arbitrary-length object lists, the TA uses "object
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// pointer blocks" as a memory allocation strategy. These fixed-length blocks
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// can still have infinite length via "object pointer block links". This
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// mechanism is illustrated in DCDBSysArc990907E.pdf page 188.
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holly.TA_ALLOC_CTRL = ta_alloc_ctrl::opb_mode::increasing_addresses
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| ta_alloc_ctrl::o_opb::_32x4byte;
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// While building object lists, the TA contains an internal index (exposed as
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// the read-only TA_ITP_CURRENT) for the next address that new ISP/TSP will be
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// stored at. The initial value of this index is TA_ISP_BASE.
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// reserve space in ISP/TSP parameters for the background parameter
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using polygon = holly::core::parameter::isp_tsp_parameter<3>;
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uint32_t ta_isp_base_offset = (sizeof (polygon)) * 1;
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holly.TA_ISP_BASE = isp_tsp_parameter_start + ta_isp_base_offset;
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holly.TA_ISP_LIMIT = isp_tsp_parameter_start + 0x100000;
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// Similarly, the TA also contains, for up to 600 tiles, an internal index for
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// the next address that an object list entry will be stored for each
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// tile. These internal indicies are partially exposed via the read-only
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// TA_OL_POINTERS.
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holly.TA_OL_BASE = object_list_start;
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// TA_OL_LIMIT, DCDBSysArc990907E.pdf page 385:
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//
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// > Because the TA may automatically store data in the address that is
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// > specified by this register, it must not be used for other data. For
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// > example, the address specified here must not be the same as the address
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// > in the TA_ISP_BASE register.
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holly.TA_OL_LIMIT = object_list_start + 0x100000 - 32;
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holly.TA_NEXT_OPB_INIT = (object_list_start + 32 * 4 * tile_y_num * tile_x_num);
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//////////////////////////////////////////////////////////////////////////////
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// configure CORE
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//////////////////////////////////////////////////////////////////////////////
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// REGION_BASE is the (texture memory-relative) address of the region array.
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holly.REGION_BASE = region_array_start;
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// PARAM_BASE is the (texture memory-relative) address of ISP/TSP parameters.
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// Anything that references an ISP/TSP parameter does so relative to this
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// address (and not relative to the beginning of texture memory).
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holly.PARAM_BASE = isp_tsp_parameter_start;
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// Set the offset of the background ISP/TSP parameter, relative to PARAM_BASE
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// SKIP is related to the size of each vertex
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uint32_t background_offset = 0;
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holly.ISP_BACKGND_T = isp_backgnd_t::tag_address(background_offset / 4)
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| isp_backgnd_t::tag_offset(0)
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| isp_backgnd_t::skip(1);
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// FB_W_SOF1 is the (texture memory-relative) address of the framebuffer that
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// will be written to when a tile is rendered/flushed.
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//holly.FB_W_SOF1 = framebuffer_start;
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// without waiting for rendering to actually complete, immediately display the
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// framebuffer.
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//holly.FB_R_SOF1 = framebuffer_start[0];
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using systembus::systembus;
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using namespace systembus;
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systembus.ISTNRM = 0xffffffff;
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// draw 500 frames of cube rotation
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for (int frame_ix = 0; frame_ix < 10000; frame_ix++) {
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//////////////////////////////////////////////////////////////////////////////
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// transfer cube to texture memory via the TA polygon converter FIFO
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//////////////////////////////////////////////////////////////////////////////
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// TA_LIST_INIT needs to be written (every frame) prior to the first FIFO
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// write.
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holly.TA_LIST_INIT = ta_list_init::list_init;
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// dummy TA_LIST_INIT read; DCDBSysArc990907E.pdf in multiple places says this
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// step is required.
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(void)holly.TA_LIST_INIT;
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/*
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asm volatile ("" ::: "memory");
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{ // position
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transfer_ta_strips<0>();
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wait_ta();
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holly.FB_W_SOF1 = framebuffer_start[0];
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systembus.ISTERR = 0xffffffff;
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holly.STARTRENDER = 1;
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wait_render();
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}
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asm volatile ("" ::: "memory");
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{
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uint32_t source = (uint32_t)&texture_memory32[framebuffer_start[0]];
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ch1_dma_transfer(source, (uint32_t)tmp_buf0, (640 * 480 * 4) / 32);
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for (int i = 0; i < 640 * 480 * 4 / 32; i++) {
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ocbi(&tmp_buf0[i * 32]);
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}
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}
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asm volatile ("" ::: "memory");
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{ // normals
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transfer_ta_strips<1>();
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wait_ta();
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holly.FB_W_SOF1 = framebuffer_start[1];
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systembus.ISTERR = 0xffffffff;
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holly.STARTRENDER = 1;
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wait_render();
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}
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asm volatile ("" ::: "memory");
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while ((sh7091::sh7091.DMAC.CHCR1 & sh7091::dmac::chcr::te::transfers_completed) == 0) {}
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{
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uint32_t source = (uint32_t)&texture_memory32[framebuffer_start[1]];
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ch1_dma_transfer(source, (uint32_t)tmp_buf1, (640 * 480 * 4) / 32);
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for (int i = 0; i < 640 * 480 * 4 / 32; i++) {
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ocbi(&tmp_buf1[i * 32]);
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}
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}
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while ((sh7091::sh7091.DMAC.CHCR1 & sh7091::dmac::chcr::te::transfers_completed) == 0) {}
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for (int i = 0; i < 640 * 480; i++) {
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if (i % 8 == 0) {
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pref(&tmp_buf0[(i + 1) * 4 / 32]);
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pref(&tmp_buf1[(i + 1) * 4 / 32]);
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}
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uint8_t p_b = tmp_buf0[i * 4 + 0];
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uint8_t p_g = tmp_buf0[i * 4 + 1];
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uint8_t p_r = tmp_buf0[i * 4 + 2];
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if (p_b == 0 && p_g == 0 && p_r == 0)
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continue;
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vec3 p = {unremap(p_r), unremap(p_g), unremap(p_b)};
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uint8_t n_b = tmp_buf1[i * 4 + 0];
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uint8_t n_g = tmp_buf1[i * 4 + 1];
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uint8_t n_r = tmp_buf1[i * 4 + 2];
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if (n_b == 0 && n_g == 0 && n_r == 0)
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continue;
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vec3 n = {unremap(n_r), unremap(n_g), unremap(n_b)};
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vec3 c = lighting(p, n);
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int color = c.z * 255.0f;
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if (color > 255) color = 255;
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if (color < 0) color = 0;
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tmp_buf0[i * 4 + 0] = color;
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tmp_buf0[i * 4 + 1] = color;
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tmp_buf0[i * 4 + 2] = color;
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if (i % 8 == 7) {
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ocbp(&tmp_buf0[(i & (~7)) * 4 / 32]);
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}
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}
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systembus.ISTNRM = istnrm::v_blank_in;
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while ((systembus.ISTNRM & istnrm::v_blank_in) == 0);
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systembus.LMMODE0 = 1;
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systembus.LMMODE1 = 1;
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uint32_t destination = 0x11000000 + framebuffer_start[2];
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ch2_dma_transfer((uint32_t)tmp_buf0, destination, (640 * 480 * 4) / 32);
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while ((systembus.ISTNRM & istnrm::end_of_dma_ch2_dma) == 0);
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systembus.ISTNRM = istnrm::end_of_dma_ch2_dma;
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holly.FB_R_SOF1 = framebuffer_start[2];
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*/
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{ // color
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transfer_ta_strips<2>();
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wait_ta();
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holly.FB_W_SOF1 = framebuffer_start[frame_ix % 3];
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systembus.ISTERR = 0xffffffff;
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holly.STARTRENDER = 1;
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wait_render();
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}
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systembus.ISTNRM = istnrm::v_blank_in;
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while ((systembus.ISTNRM & istnrm::v_blank_in) == 0);
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holly.FB_R_SOF1 = framebuffer_start[frame_ix % 3];
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// increment theta for the cube rotation animation
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// (used by the `vertex_rotate` function)
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theta += 0.01f;
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}
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string("return\n ");
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// return from main; this will effectively jump back to the serial loader
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}
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