140 lines
3.7 KiB
Python
140 lines
3.7 KiB
Python
from collections import defaultdict
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import sys
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from dataclasses import dataclass
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from generate import renderer
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from csv_input import read_input_headerless
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def one_bit(register, bit, value):
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v = int(value, 16)
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if v == 0:
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return None
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elif v == 1:
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return f"{register}::{bit}"
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else:
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assert False, (register, bit, value)
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def enum(enums):
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def do(register, bit, value):
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v = int(value, 16)
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return f"{register}::{bit}::{enums[v]}"
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return do
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special = {
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("spg_control", "pal"): one_bit,
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("spg_control", "ntsc"): one_bit,
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("spg_control", "interlace"): one_bit,
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("spg_control", "sync_direction"): enum({0: "input", 1: "output"}),
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("vo_control", "pixel_double"): one_bit,
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("fb_r_ctrl", "vclk_div"): enum({0: "pclk_vclk_2", 1: "pclk_vclk_1"}),
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}
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def parse_regs(rows):
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last_register = None
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for row in rows:
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register, bit, *values0 = row
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if register == "":
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assert last_register is not None
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register = last_register
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last_register = register
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values = [v for v in values0]
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yield register, bit, values
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@dataclass
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class Bit:
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name: str
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value: int
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@dataclass
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class Register:
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name: str
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bits: list[Bit]
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@dataclass
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class Mode:
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name: str
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registers: list[Register]
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def group_by_register(regs):
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by_register = defaultdict(list)
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register_names = []
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for register, bit, value in regs:
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if register not in register_names:
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register_names.append(register)
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by_register[register].append(Bit(
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name=bit.lower(),
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value=value
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))
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return [
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Register(
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name=register.lower(),
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bits=by_register[register]
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)
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for register in register_names
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]
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def transpose_by_name(format_names, regs):
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by_name = defaultdict(list)
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for register, bit, values in regs:
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assert len(values) == len(format_names)
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for name, value in zip(format_names, values):
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by_name[name].append((register, bit, value))
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return [
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Mode(
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name=name,
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registers=group_by_register(by_name[name])
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)
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for name in format_names
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]
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def render_bit(register, bit, value):
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if (register, bit) in special:
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return special[(register, bit)](register, bit, value)
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else:
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return f"{register}::{bit}(0x{value})"
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def render_mode(mode, max_len):
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for register in mode.registers:
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i_out = 0
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for bit in register.bits:
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lhs = f".{register.name}" if i_out == 0 else ""
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sym = '=' if i_out == 0 else "|"
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_render_bit = render_bit(register.name, bit.name, bit.value)
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if _render_bit is not None:
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i_out += 1
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yield f"{lhs.ljust(max_len)} {sym} {_render_bit}"
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yield f"{''.ljust(max_len)} ,"
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def render_modes(modes, max_len):
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for mode in modes:
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yield f"const struct mode {mode.name.lower()} = {{"
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yield from render_mode(mode, max_len)
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yield "};"
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def render_namespace(modes, max_len):
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yield "namespace video_output {"
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yield from render_modes(modes, max_len)
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yield "}"
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def max_length(regs):
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max_length = 0
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for register, *_ in regs:
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if len(register) > max_length:
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max_length = len(register)
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return max_length + 1
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if __name__ == "__main__":
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rows = read_input_headerless(sys.argv[1])
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formats0, *regs0 = rows
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b0, b1, *format_names = formats0
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assert (b0, b1) == ("", ""), (b0, b1)
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regs = list(parse_regs(regs0))
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modes = transpose_by_name(format_names, regs)
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max_length = max_length(regs)
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render, out = renderer()
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render(render_namespace(modes, max_length))
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sys.stdout.write(out.getvalue())
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