bilbo/dreamcast
1
0
Fork 0
Code Pull Requests Activity

Compare commits

base: bilbo:5eedad7ff33920b77ed7bf6629f1c281de415f7a
Branches Tags
bilbo:main
bilbo:long-samples
...
compare: bilbo:1295eed1bb01e1dfbd70fb764656bfdc66b17c74
Branches Tags
bilbo:main
bilbo:long-samples

3 Commits
5eedad7ff3 ... 1295eed1bb

Author SHA1 Message Date
Zack Buhman
1295eed1bb regs: update isp_tsp / systembus 2024-12-30 17:05:01 -06:00
Zack Buhman
5eb02012dc tools: add symlinks to parent directory 2024-12-30 17:05:01 -06:00
Zack Buhman
8ad3b7a11d serial_protocol remove constexpr 2024-12-30 17:05:01 -06:00
12 changed files with 88 additions and 63 deletions
Show Stats Expand all files Collapse all files

26
regs/isp_tsp.csv
View File

@ -106,21 +106,21 @@
,,,,,, ,,,,,,
"texture_control_word",,30,"vq_compressed",1,, "texture_control_word",,30,"vq_compressed",1,,
,,,,,, ,,,,,,
"tsp_instruction_word","pixel_format","29-27",1555,0,, "texture_control_word","pixel_format","29-27",1555,0,,
"tsp_instruction_word","pixel_format","29-27",565,1,, "texture_control_word","pixel_format","29-27",565,1,,
"tsp_instruction_word","pixel_format","29-27",4444,2,, "texture_control_word","pixel_format","29-27",4444,2,,
"tsp_instruction_word","pixel_format","29-27","yuv422",3,, "texture_control_word","pixel_format","29-27","yuv422",3,,
"tsp_instruction_word","pixel_format","29-27","bump_map",4,, "texture_control_word","pixel_format","29-27","bump_map",4,,
"tsp_instruction_word","pixel_format","29-27","4bpp_palette",5,, "texture_control_word","pixel_format","29-27","4bpp_palette",5,,
"tsp_instruction_word","pixel_format","29-27","8bpp_palette",6,, "texture_control_word","pixel_format","29-27","8bpp_palette",6,,
,,,,,, ,,,,,,
"tsp_instruction_word","scan_order",26,"twiddled",0,, "texture_control_word","scan_order",26,"twiddled",0,,
"tsp_instruction_word","scan_order",26,"non_twiddled",1,, "texture_control_word","scan_order",26,"non_twiddled",1,,
,,,,,, ,,,,,,
"tsp_instruction_word",,"26-21","palette_selector4",,"0x3f", "texture_control_word",,"26-21","palette_selector4",,"0x3f",
,,,,,, ,,,,,,
"tsp_instruction_word",,"26-25","palette_selector8",,"0x3", "texture_control_word",,"26-25","palette_selector8",,"0x3",
,,,,,, ,,,,,,
"tsp_instruction_word",,25,"stride_select",,, "texture_control_word",,25,"stride_select",,,
,,,,,, ,,,,,,
"tsp_instruction_word",,"20-0","texture_address",,"0x1fffff", "texture_control_word",,"20-0","texture_address",,"0x1fffff",

1 register_name enum_name bits bit_name value mask description
106
107 texture_control_word 30 vq_compressed 1
108
109 tsp_instruction_word texture_control_word pixel_format 29-27 1555 0
110 tsp_instruction_word texture_control_word pixel_format 29-27 565 1
111 tsp_instruction_word texture_control_word pixel_format 29-27 4444 2
112 tsp_instruction_word texture_control_word pixel_format 29-27 yuv422 3
113 tsp_instruction_word texture_control_word pixel_format 29-27 bump_map 4
114 tsp_instruction_word texture_control_word pixel_format 29-27 4bpp_palette 5
115 tsp_instruction_word texture_control_word pixel_format 29-27 8bpp_palette 6
116
117 tsp_instruction_word texture_control_word scan_order 26 twiddled 0
118 tsp_instruction_word texture_control_word scan_order 26 non_twiddled 1
119
120 tsp_instruction_word texture_control_word 26-21 palette_selector4 0x3f
121
122 tsp_instruction_word texture_control_word 26-25 palette_selector8 0x3
123
124 tsp_instruction_word texture_control_word 25 stride_select
125
126 tsp_instruction_word texture_control_word 20-0 texture_address 0x1fffff

BIN
regs/isp_tsp.ods
View File

Binary file not shown.

70
regs/systembus.csv
View File

@ -1,49 +1,49 @@
"block","address","size","name","r/w","description" "block","address","size","name","r/w","description"
"SYSTEM","000","4","C2DSTAT","RW","CH2-DMA destination address" "SYSTEMBUS","000","4","C2DSTAT","RW","CH2-DMA destination address"
"SYSTEM","004","4","C2DLEN","RW","CH2-DMA length" "SYSTEMBUS","004","4","C2DLEN","RW","CH2-DMA length"
"SYSTEM","008","4","C2DST","RW","CH2-DMA start" "SYSTEMBUS","008","4","C2DST","RW","CH2-DMA start"
,,,,, ,,,,,
"SYSTEM","010","4","SDSTAW","RW","Sort-DMA start link table address" "SYSTEMBUS","010","4","SDSTAW","RW","Sort-DMA start link table address"
"SYSTEM","014","4","SDBAAW","RW","Sort-DMA link base address" "SYSTEMBUS","014","4","SDBAAW","RW","Sort-DMA link base address"
"SYSTEM","018","4","SDWLT","RW","Sort-DMA link address bit width" "SYSTEMBUS","018","4","SDWLT","RW","Sort-DMA link address bit width"
"SYSTEM","01c","4","SDLAS","RW","Sort-DMA link address shift control" "SYSTEMBUS","01c","4","SDLAS","RW","Sort-DMA link address shift control"
"SYSTEM","020","4","SDST","RW","Sort-DMA start" "SYSTEMBUS","020","4","SDST","RW","Sort-DMA start"
,,,,, ,,,,,
"SYSTEM","040","4","DBREQM","RW","DBREQ# signal mask control" "SYSTEMBUS","040","4","DBREQM","RW","DBREQ# signal mask control"
"SYSTEM","044","4","BAVLWC","RW","BAVL# signal wait count" "SYSTEMBUS","044","4","BAVLWC","RW","BAVL# signal wait count"
"SYSTEM","048","4","C2DPYRC","RW","DMA (TA/Root Bus) priority count" "SYSTEMBUS","048","4","C2DPYRC","RW","DMA (TA/Root Bus) priority count"
"SYSTEM","04c","4","DMAXL","RW","CH2-DMA maximum burst length" "SYSTEMBUS","04c","4","DMAXL","RW","CH2-DMA maximum burst length"
,,,,, ,,,,,
"SYSTEM","080","4","TFREM","R","TA FIFO remaining amount" "SYSTEMBUS","080","4","TFREM","R","TA FIFO remaining amount"
"SYSTEM","084","4","LMMODE0","RW","Via TA texture memory bus select 0" "SYSTEMBUS","084","4","LMMODE0","RW","Via TA texture memory bus select 0"
"SYSTEM","088","4","LMMODE1","RW","Via TA texture memory bus select 1" "SYSTEMBUS","088","4","LMMODE1","RW","Via TA texture memory bus select 1"
"SYSTEM","08c","4","FFST","R","FIFO status" "SYSTEMBUS","08c","4","FFST","R","FIFO status"
"SYSTEM","090","4","SFRES","W","System reset" "SYSTEMBUS","090","4","SFRES","W","System reset"
,,,,, ,,,,,
"SYSTEM","09c","4","SBREV","R","System bus revision number" "SYSTEMBUS","09c","4","SBREV","R","System bus revision number"
"SYSTEM","0a0","4","RBSPLT","RW","SH4 Root Bus split enable" "SYSTEMBUS","0a0","4","RBSPLT","RW","SH4 Root Bus split enable"
,,,,, ,,,,,
"SYSTEM","100","4","ISTNRM","RW","Normal interrupt status" "SYSTEMBUS","100","4","ISTNRM","RW","Normal interrupt status"
"SYSTEM","104","4","ISTEXT","R","External interrupt status" "SYSTEMBUS","104","4","ISTEXT","R","External interrupt status"
"SYSTEM","108","4","ISTERR","RW","Error interrupt status" "SYSTEMBUS","108","4","ISTERR","RW","Error interrupt status"
,,,,, ,,,,,
"SYSTEM","110","4","IML2NRM","RW","Level 2 normal interrupt mask" "SYSTEMBUS","110","4","IML2NRM","RW","Level 2 normal interrupt mask"
"SYSTEM","114","4","IML2EXT","RW","Level 2 external interrupt mask" "SYSTEMBUS","114","4","IML2EXT","RW","Level 2 external interrupt mask"
"SYSTEM","118","4","IML2ERR","RW","Level 2 error interrupt mask" "SYSTEMBUS","118","4","IML2ERR","RW","Level 2 error interrupt mask"
,,,,, ,,,,,
"SYSTEM","120","4","IML4NRM","RW","Level 4 normal interrupt mask" "SYSTEMBUS","120","4","IML4NRM","RW","Level 4 normal interrupt mask"
"SYSTEM","124","4","IML4EXT","RW","Level 4 external interrupt mask" "SYSTEMBUS","124","4","IML4EXT","RW","Level 4 external interrupt mask"
"SYSTEM","128","4","IML4ERR","RW","Level 4 error interrupt mask" "SYSTEMBUS","128","4","IML4ERR","RW","Level 4 error interrupt mask"
,,,,, ,,,,,
"SYSTEM","130","4","IML6NRM","RW","Level 6 normal interrupt mask" "SYSTEMBUS","130","4","IML6NRM","RW","Level 6 normal interrupt mask"
"SYSTEM","134","4","IML6EXT","RW","Level 6 external interrupt mask" "SYSTEMBUS","134","4","IML6EXT","RW","Level 6 external interrupt mask"
"SYSTEM","138","4","IML6ERR","RW","Level 6 error interrupt mask" "SYSTEMBUS","138","4","IML6ERR","RW","Level 6 error interrupt mask"
,,,,, ,,,,,
"SYSTEM","140","4","PDTNRM","RW","Normal interrupt PVR-DMA startup mask" "SYSTEMBUS","140","4","PDTNRM","RW","Normal interrupt PVR-DMA startup mask"
"SYSTEM","144","4","PDTEXT","RW","External interrupt PVR-DMA startup mask" "SYSTEMBUS","144","4","PDTEXT","RW","External interrupt PVR-DMA startup mask"
,,,,, ,,,,,
"SYSTEM","150","4","G2DTNRM","RW","Normal interrupt G2-DMA startup mask" "SYSTEMBUS","150","4","G2DTNRM","RW","Normal interrupt G2-DMA startup mask"
"SYSTEM","154","4","G2DTEXT","RW","External interrupt G2-DMA startup mask" "SYSTEMBUS","154","4","G2DTEXT","RW","External interrupt G2-DMA startup mask"
,,,,, ,,,,,
"MAPLE_IF","04","4","MDSTAR","RW","Maple-DMA command table address" "MAPLE_IF","04","4","MDSTAR","RW","Maple-DMA command table address"
,,,,, ,,,,,

1 block address size name r/w description
2 SYSTEM SYSTEMBUS 000 4 C2DSTAT RW CH2-DMA destination address
3 SYSTEM SYSTEMBUS 004 4 C2DLEN RW CH2-DMA length
4 SYSTEM SYSTEMBUS 008 4 C2DST RW CH2-DMA start
5
6 SYSTEM SYSTEMBUS 010 4 SDSTAW RW Sort-DMA start link table address
7 SYSTEM SYSTEMBUS 014 4 SDBAAW RW Sort-DMA link base address
8 SYSTEM SYSTEMBUS 018 4 SDWLT RW Sort-DMA link address bit width
9 SYSTEM SYSTEMBUS 01c 4 SDLAS RW Sort-DMA link address shift control
10 SYSTEM SYSTEMBUS 020 4 SDST RW Sort-DMA start
11
12 SYSTEM SYSTEMBUS 040 4 DBREQM RW DBREQ# signal mask control
13 SYSTEM SYSTEMBUS 044 4 BAVLWC RW BAVL# signal wait count
14 SYSTEM SYSTEMBUS 048 4 C2DPYRC RW DMA (TA/Root Bus) priority count
15 SYSTEM SYSTEMBUS 04c 4 DMAXL RW CH2-DMA maximum burst length
16
17 SYSTEM SYSTEMBUS 080 4 TFREM R TA FIFO remaining amount
18 SYSTEM SYSTEMBUS 084 4 LMMODE0 RW Via TA texture memory bus select 0
19 SYSTEM SYSTEMBUS 088 4 LMMODE1 RW Via TA texture memory bus select 1
20 SYSTEM SYSTEMBUS 08c 4 FFST R FIFO status
21 SYSTEM SYSTEMBUS 090 4 SFRES W System reset
22
23 SYSTEM SYSTEMBUS 09c 4 SBREV R System bus revision number
24 SYSTEM SYSTEMBUS 0a0 4 RBSPLT RW SH4 Root Bus split enable
25
26 SYSTEM SYSTEMBUS 100 4 ISTNRM RW Normal interrupt status
27 SYSTEM SYSTEMBUS 104 4 ISTEXT R External interrupt status
28 SYSTEM SYSTEMBUS 108 4 ISTERR RW Error interrupt status
29
30 SYSTEM SYSTEMBUS 110 4 IML2NRM RW Level 2 normal interrupt mask
31 SYSTEM SYSTEMBUS 114 4 IML2EXT RW Level 2 external interrupt mask
32 SYSTEM SYSTEMBUS 118 4 IML2ERR RW Level 2 error interrupt mask
33
34 SYSTEM SYSTEMBUS 120 4 IML4NRM RW Level 4 normal interrupt mask
35 SYSTEM SYSTEMBUS 124 4 IML4EXT RW Level 4 external interrupt mask
36 SYSTEM SYSTEMBUS 128 4 IML4ERR RW Level 4 error interrupt mask
37
38 SYSTEM SYSTEMBUS 130 4 IML6NRM RW Level 6 normal interrupt mask
39 SYSTEM SYSTEMBUS 134 4 IML6EXT RW Level 6 external interrupt mask
40 SYSTEM SYSTEMBUS 138 4 IML6ERR RW Level 6 error interrupt mask
41
42 SYSTEM SYSTEMBUS 140 4 PDTNRM RW Normal interrupt PVR-DMA startup mask
43 SYSTEM SYSTEMBUS 144 4 PDTEXT RW External interrupt PVR-DMA startup mask
44
45 SYSTEM SYSTEMBUS 150 4 G2DTNRM RW Normal interrupt G2-DMA startup mask
46 SYSTEM SYSTEMBUS 154 4 G2DTEXT RW External interrupt G2-DMA startup mask
47
48 MAPLE_IF 04 4 MDSTAR RW Maple-DMA command table address
49

BIN
regs/systembus.ods
View File

Binary file not shown.

24
serial_protocol.hpp
View File

@ -41,7 +41,7 @@ static inline uint32_t le_bswap(const uint32_t n)
return __builtin_bswap32(n); return __builtin_bswap32(n);
} }
constexpr union command_reply command_reply(uint32_t cmd, uint32_t arg0, uint32_t arg1) union command_reply command_reply(uint32_t cmd, uint32_t arg0, uint32_t arg1)
{ {
union command_reply command = { union command_reply command = {
.cmd = le_bswap(cmd), .cmd = le_bswap(cmd),
@ -67,27 +67,27 @@ namespace command {
static_assert(_maple_raw == 0xb62422e0); static_assert(_maple_raw == 0xb62422e0);
constexpr union command_reply write(uint32_t dest, uint32_t size) union command_reply write(uint32_t dest, uint32_t size)
{ {
return command_reply(_write, dest, size); return command_reply(_write, dest, size);
} }
constexpr union command_reply read(uint32_t dest, uint32_t size) union command_reply read(uint32_t dest, uint32_t size)
{ {
return command_reply(_read, dest, size); return command_reply(_read, dest, size);
} }
constexpr union command_reply jump(uint32_t dest) union command_reply jump(uint32_t dest)
{ {
return command_reply(_jump, dest, 0); return command_reply(_jump, dest, 0);
} }
constexpr union command_reply speed(uint32_t speed) union command_reply speed(uint32_t speed)
{ {
return command_reply(_speed, speed, 0); return command_reply(_speed, speed, 0);
} }
constexpr union command_reply maple_raw(uint32_t send_size, uint32_t recv_size) union command_reply maple_raw(uint32_t send_size, uint32_t recv_size)
{ {
return command_reply(_maple_raw, send_size, recv_size); return command_reply(_maple_raw, send_size, recv_size);
} }
@ -112,32 +112,32 @@ namespace reply {
static_assert(_crc == 0xcc9aab7c); static_assert(_crc == 0xcc9aab7c);
constexpr union command_reply write(uint32_t dest, uint32_t size) union command_reply write(uint32_t dest, uint32_t size)
{ {
return command_reply(_write, dest, size); return command_reply(_write, dest, size);
} }
constexpr union command_reply read(uint32_t dest, uint32_t size) union command_reply read(uint32_t dest, uint32_t size)
{ {
return command_reply(_read, dest, size); return command_reply(_read, dest, size);
} }
constexpr union command_reply jump(uint32_t dest) union command_reply jump(uint32_t dest)
{ {
return command_reply(_jump, dest, 0); return command_reply(_jump, dest, 0);
} }
constexpr union command_reply speed(uint32_t speed) union command_reply speed(uint32_t speed)
{ {
return command_reply(_speed, speed, 0); return command_reply(_speed, speed, 0);
} }
constexpr union command_reply crc(uint32_t crc) union command_reply crc(uint32_t crc)
{ {
return command_reply(_crc, crc, 0); return command_reply(_crc, crc, 0);
} }
constexpr union command_reply maple_raw(uint32_t send_size, uint32_t recv_size) union command_reply maple_raw(uint32_t send_size, uint32_t recv_size)
{ {
return command_reply(_maple_raw, send_size, recv_size); return command_reply(_maple_raw, send_size, recv_size);
} }

7
tools/Makefile
View File

@ -2,18 +2,19 @@ CFLAGS = -Og -g -gdwarf-4 -Wall -Wextra -Werror -Wfatal-errors -ggdb -fstack-pro
CFLAGS += -Wno-error=unused-parameter CFLAGS += -Wno-error=unused-parameter
CFLAGS += -Wno-error=unused-variable CFLAGS += -Wno-error=unused-variable
CFLAGS += -Wno-error=unused-but-set-variable CFLAGS += -Wno-error=unused-but-set-variable
CFLAGS += -Wno-vla-cxx-extension
CXXFLAGS = -std=c++23 CXXFLAGS = -std=c++23
FREETYPE_CFLAGS = $(shell pkg-config --cflags freetype2) FREETYPE_CFLAGS = $(shell pkg-config --cflags freetype2)
FREETYPE_LDFLAGS = $(shell pkg-config --libs freetype2) FREETYPE_LDFLAGS = $(shell pkg-config --libs freetype2)
FTDI_CFLAGS = $(shell pkg-config --cflags libftdi1) -I.. FTDI_CFLAGS = $(shell pkg-config --cflags libftdi1) -I.
FTDI_LDFLAGS = $(shell pkg-config --libs libftdi1) FTDI_LDFLAGS = $(shell pkg-config --libs libftdi1)
all: ttf_outline all: ttf_outline
crc32.o: ../crc32.c crc32.o: crc32.c
$(CC) -std=gnu2x $(CFLAGS) -I.. -c $< -o $@ $(CC) -std=gnu2x $(CFLAGS) -I. -c $< -o $@
ttf_%.o: ttf_%.cpp ttf_%.o: ttf_%.cpp
$(CXX) $(CFLAGS) $(CXXFLAGS) $(FREETYPE_CFLAGS) -c $< -o $@ $(CXX) $(CFLAGS) $(CXXFLAGS) $(FREETYPE_CFLAGS) -c $< -o $@

1
tools/align.hpp Symbolic link
View File

@ -0,0 +1 @@
../align.hpp

1
tools/crc32.c Symbolic link
View File

@ -0,0 +1 @@
../crc32.c

1
tools/crc32.h Symbolic link
View File

@ -0,0 +1 @@
../crc32.h

1
tools/maple Symbolic link
View File

@ -0,0 +1 @@
../maple

1
tools/serial_protocol.hpp Symbolic link
View File

@ -0,0 +1 @@
../serial_protocol.hpp

19
tools/source_dist.sh Normal file
View File

@ -0,0 +1,19 @@
rm -rf ftdi_transfer_source
mkdir -p ftdi_transfer_source
cp -rL \
align.hpp \
crc32.c \
crc32.h \
ftdi_maple.cpp \
ftdi_maple.hpp \
ftdi_transfer.1 \
ftdi_transfer.cpp \
ftdi_transfer.hpp \
ftdi_transfer.sh \
Makefile \
maple \
serial_protocol.hpp \
ftdi_transfer_source/
#tar cvzf ftdi_transfer_source.tar.gz ftdi_transfer_source