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add isp_tsp spreadsheet

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This commit is contained in:
Zack Buhman 2024-12-27 10:13:16 -06:00
parent daf92a5049
commit 7aa1b3d7f5
6 changed files with 151 additions and 22 deletions
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15
example/macaw.cpp
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@ -2,16 +2,19 @@
#include "align.hpp" #include "align.hpp"
#include "holly/texture_memory_alloc.hpp"
#include "holly/holly.hpp" #include "holly/holly.hpp"
#include "holly/core.hpp"
#include "holly/core_bits.hpp" #include "holly/core_bits.hpp"
#include "holly/ta_fifo_polygon_converter.hpp" #include "holly/isp_tsp.hpp"
#include "holly/ta_parameter.hpp" #include "holly/ta_bits.hpp"
#include "holly/ta_global_parameter.hpp" #include "holly/ta_global_parameter.hpp"
#include "holly/ta_vertex_parameter.hpp" #include "holly/ta_vertex_parameter.hpp"
#include "holly/ta_bits.hpp"
#include "holly/isp_tsp.hpp" #include "holly/ta_fifo_polygon_converter.hpp"
#include "holly/ta_parameter.hpp"
#include "holly/core.hpp"
#include "holly/texture_memory_alloc.hpp"
#include "holly/region_array.hpp" #include "holly/region_array.hpp"
#include "holly/background.hpp" #include "holly/background.hpp"
#include "holly/video_output.hpp" #include "holly/video_output.hpp"

2
holly/isp_tsp.hpp
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@ -17,7 +17,7 @@ namespace isp_tsp_instruction_word {
namespace volume_instruction { namespace volume_instruction {
constexpr uint32_t normal_polygon = 0 << 29; constexpr uint32_t normal_polygon = 0 << 29;
constexpr uint32_t inside_last_polygon = 1 << 29; constexpr uint32_t inside_last_polygon = 1 << 29;
constexpr uint32_t outside_last_polygon = 1 << 29; constexpr uint32_t outside_last_polygon = 2 << 29;
} }
namespace culling_mode { namespace culling_mode {

126
regs/isp_tsp.csv Normal file
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@ -0,0 +1,126 @@
"register_name","enum_name","bits","bit_name","value","mask","description"
"isp_tsp_instruction_word","depth_compare_mode","31-29","never",0,,
"isp_tsp_instruction_word","depth_compare_mode","31-29","less",1,,
"isp_tsp_instruction_word","depth_compare_mode","31-29","equal",2,,
"isp_tsp_instruction_word","depth_compare_mode","31-29","less_or_equal",3,,
"isp_tsp_instruction_word","depth_compare_mode","31-29","greater",4,,
"isp_tsp_instruction_word","depth_compare_mode","31-29","greater_or_equal",5,,
"isp_tsp_instruction_word","depth_compare_mode","31-29","not_equal",6,,
"isp_tsp_instruction_word","depth_compare_mode","31-29","always",7,,
,,,,,,
"isp_tsp_instruction_word","volume_instruction","31-29","normal_polygon",0,,
"isp_tsp_instruction_word","volume_instruction","31-29","inside_last_polygon",1,,
"isp_tsp_instruction_word","volume_instruction","31-29","outside_last_polygon",2,,
,,,,,,
"isp_tsp_instruction_word","culling_mode","28-27","no_culling",0,,
"isp_tsp_instruction_word","culling_mode","28-27","cull_if_small",1,,
"isp_tsp_instruction_word","culling_mode","28-27","cull_if_negative",2,,
"isp_tsp_instruction_word","culling_mode","28-27","cull_if_positive",3,,
,,,,,,
"isp_tsp_instruction_word",,26,"z_write_disable",1,,
"isp_tsp_instruction_word",,25,"texture",1,,
"isp_tsp_instruction_word",,24,"offset",1,,
"isp_tsp_instruction_word",,23,"gouraud_shading",1,,
"isp_tsp_instruction_word",,22,"16bit_uv",1,,
"isp_tsp_instruction_word",,21,"cache_bypass",1,,
"isp_tsp_instruction_word",,20,"dcalc_ctrl",1,,
,,,,,,
"tsp_instruction_word","src_alpha_instr","31-29","zero",0,,
"tsp_instruction_word","src_alpha_instr","31-29","one",1,,
"tsp_instruction_word","src_alpha_instr","31-29","other_color",2,,
"tsp_instruction_word","src_alpha_instr","31-29","inverse_other_color",3,,
"tsp_instruction_word","src_alpha_instr","31-29","src_alpha",4,,
"tsp_instruction_word","src_alpha_instr","31-29","inverse_src_alpha",5,,
"tsp_instruction_word","src_alpha_instr","31-29","dst_alpha",6,,
"tsp_instruction_word","src_alpha_instr","31-29","inverse_dst_alpha",7,,
,,,,,,
"tsp_instruction_word","dst_alpha_instr","28-26","zero",0,,
"tsp_instruction_word","dst_alpha_instr","28-26","one",1,,
"tsp_instruction_word","dst_alpha_instr","28-26","other_color",2,,
"tsp_instruction_word","dst_alpha_instr","28-26","inverse_other_color",3,,
"tsp_instruction_word","dst_alpha_instr","28-26","src_alpha",4,,
"tsp_instruction_word","dst_alpha_instr","28-26","inverse_src_alpha",5,,
"tsp_instruction_word","dst_alpha_instr","28-26","dst_alpha",6,,
"tsp_instruction_word","dst_alpha_instr","28-26","inverse_dst_alpha",7,,
,,,,,,
"tsp_instruction_word","src_select",25,"primary_accumulation_buffer",0,,
"tsp_instruction_word","src_select",25,"secondary_accumulation_buffer",1,,
,,,,,,
"tsp_instruction_word","dst_select",24,"primary_accumulation_buffer",0,,
"tsp_instruction_word","dst_select",24,"secondary_accumulation_buffer",1,,
,,,,,,
"tsp_instruction_word","fog_control","23-22","look_up_table","0b00",,
"tsp_instruction_word","fog_control","23-22","per_vertex","0b01",,
"tsp_instruction_word","fog_control","23-22","no_fog","0b10",,
"tsp_instruction_word","fog_control","23-22","look_up_table_mode_2","0b11",,
,,,,,,
"tsp_instruction_word",,21,"color_clamp",1,,
,,,,,,
"tsp_instruction_word",,20,"use_alpha",1,,
,,,,,,
"tsp_instruction_word",,19,"ignore_texture_alpha",1,,
,,,,,,
"tsp_instruction_word","flip_uv","18-17","none",0,,
"tsp_instruction_word","flip_uv","18-17","v",1,,
"tsp_instruction_word","flip_uv","18-17","u",2,,
"tsp_instruction_word","flip_uv","18-17","uv",3,,
,,,,,,
"tsp_instruction_word","clamp_uv","16-15","none",0,,
"tsp_instruction_word","clamp_uv","16-15","v",1,,
"tsp_instruction_word","clamp_uv","16-15","u",2,,
"tsp_instruction_word","clamp_uv","16-15","uv",3,,
,,,,,,
"tsp_instruction_word","filter_mode","14-13","point_sampled","0b00",,
"tsp_instruction_word","filter_mode","14-13","bilinear_filter","0b01",,
"tsp_instruction_word","filter_mode","14-13","trilinear_pass_a","0b10",,
"tsp_instruction_word","filter_mode","14-13","trilinear_pass_b","0b11",,
,,,,,,
"tsp_instruction_word",,12,"super_sample_texture",1,,
,,,,,,
"tsp_instruction_word",,"11-8","mip_map_d_adjust",,"0b1111",
,,,,,,
"tsp_instruction_word","texture_shading_instruction","7-6","decal",0,,
"tsp_instruction_word","texture_shading_instruction","7-6","modulate",1,,
"tsp_instruction_word","texture_shading_instruction","7-6","decal_alpha",2,,
"tsp_instruction_word","texture_shading_instruction","7-6","modulate_alpha",3,,
,,,,,,
"tsp_instruction_word","texture_u_size","5-3",8,0,,
"tsp_instruction_word","texture_u_size","5-3",16,1,,
"tsp_instruction_word","texture_u_size","5-3",32,2,,
"tsp_instruction_word","texture_u_size","5-3",64,3,,
"tsp_instruction_word","texture_u_size","5-3",128,4,,
"tsp_instruction_word","texture_u_size","5-3",256,5,,
"tsp_instruction_word","texture_u_size","5-3",512,6,,
"tsp_instruction_word","texture_u_size","5-3",1024,7,,
,,,,,,
"tsp_instruction_word","texture_v_size","2-0",8,0,,
"tsp_instruction_word","texture_v_size","2-0",16,1,,
"tsp_instruction_word","texture_v_size","2-0",32,2,,
"tsp_instruction_word","texture_v_size","2-0",64,3,,
"tsp_instruction_word","texture_v_size","2-0",128,4,,
"tsp_instruction_word","texture_v_size","2-0",256,5,,
"tsp_instruction_word","texture_v_size","2-0",512,6,,
"tsp_instruction_word","texture_v_size","2-0",1024,7,,
,,,,,,
"texture_control_word",,31,"mip_mapped",1,,
,,,,,,
"texture_control_word",,30,"vq_compressed",1,,
,,,,,,
"tsp_instruction_word","pixel_format","29-27",1555,0,,
"tsp_instruction_word","pixel_format","29-27",565,1,,
"tsp_instruction_word","pixel_format","29-27",4444,2,,
"tsp_instruction_word","pixel_format","29-27","yuv422",3,,
"tsp_instruction_word","pixel_format","29-27","bump_map",4,,
"tsp_instruction_word","pixel_format","29-27","4bpp_palette",5,,
"tsp_instruction_word","pixel_format","29-27","8bpp_palette",6,,
,,,,,,
"tsp_instruction_word","scan_order",26,"twiddled",0,,
"tsp_instruction_word","scan_order",26,"non_twiddled",1,,
,,,,,,
"tsp_instruction_word",,"26-21","palette_selector4",,"0x3f",
,,,,,,
"tsp_instruction_word",,"26-25","palette_selector8",,"0x3",
,,,,,,
"tsp_instruction_word",,25,"stride_select",,,
,,,,,,
"tsp_instruction_word",,"20-0","texture_address",,"0x1fffff",
1 register_name enum_name bits bit_name value mask description
2 isp_tsp_instruction_word depth_compare_mode 31-29 never 0
3 isp_tsp_instruction_word depth_compare_mode 31-29 less 1
4 isp_tsp_instruction_word depth_compare_mode 31-29 equal 2
5 isp_tsp_instruction_word depth_compare_mode 31-29 less_or_equal 3
6 isp_tsp_instruction_word depth_compare_mode 31-29 greater 4
7 isp_tsp_instruction_word depth_compare_mode 31-29 greater_or_equal 5
8 isp_tsp_instruction_word depth_compare_mode 31-29 not_equal 6
9 isp_tsp_instruction_word depth_compare_mode 31-29 always 7
10
11 isp_tsp_instruction_word volume_instruction 31-29 normal_polygon 0
12 isp_tsp_instruction_word volume_instruction 31-29 inside_last_polygon 1
13 isp_tsp_instruction_word volume_instruction 31-29 outside_last_polygon 2
14
15 isp_tsp_instruction_word culling_mode 28-27 no_culling 0
16 isp_tsp_instruction_word culling_mode 28-27 cull_if_small 1
17 isp_tsp_instruction_word culling_mode 28-27 cull_if_negative 2
18 isp_tsp_instruction_word culling_mode 28-27 cull_if_positive 3
19
20 isp_tsp_instruction_word 26 z_write_disable 1
21 isp_tsp_instruction_word 25 texture 1
22 isp_tsp_instruction_word 24 offset 1
23 isp_tsp_instruction_word 23 gouraud_shading 1
24 isp_tsp_instruction_word 22 16bit_uv 1
25 isp_tsp_instruction_word 21 cache_bypass 1
26 isp_tsp_instruction_word 20 dcalc_ctrl 1
27
28 tsp_instruction_word src_alpha_instr 31-29 zero 0
29 tsp_instruction_word src_alpha_instr 31-29 one 1
30 tsp_instruction_word src_alpha_instr 31-29 other_color 2
31 tsp_instruction_word src_alpha_instr 31-29 inverse_other_color 3
32 tsp_instruction_word src_alpha_instr 31-29 src_alpha 4
33 tsp_instruction_word src_alpha_instr 31-29 inverse_src_alpha 5
34 tsp_instruction_word src_alpha_instr 31-29 dst_alpha 6
35 tsp_instruction_word src_alpha_instr 31-29 inverse_dst_alpha 7
36
37 tsp_instruction_word dst_alpha_instr 28-26 zero 0
38 tsp_instruction_word dst_alpha_instr 28-26 one 1
39 tsp_instruction_word dst_alpha_instr 28-26 other_color 2
40 tsp_instruction_word dst_alpha_instr 28-26 inverse_other_color 3
41 tsp_instruction_word dst_alpha_instr 28-26 src_alpha 4
42 tsp_instruction_word dst_alpha_instr 28-26 inverse_src_alpha 5
43 tsp_instruction_word dst_alpha_instr 28-26 dst_alpha 6
44 tsp_instruction_word dst_alpha_instr 28-26 inverse_dst_alpha 7
45
46 tsp_instruction_word src_select 25 primary_accumulation_buffer 0
47 tsp_instruction_word src_select 25 secondary_accumulation_buffer 1
48
49 tsp_instruction_word dst_select 24 primary_accumulation_buffer 0
50 tsp_instruction_word dst_select 24 secondary_accumulation_buffer 1
51
52 tsp_instruction_word fog_control 23-22 look_up_table 0b00
53 tsp_instruction_word fog_control 23-22 per_vertex 0b01
54 tsp_instruction_word fog_control 23-22 no_fog 0b10
55 tsp_instruction_word fog_control 23-22 look_up_table_mode_2 0b11
56
57 tsp_instruction_word 21 color_clamp 1
58
59 tsp_instruction_word 20 use_alpha 1
60
61 tsp_instruction_word 19 ignore_texture_alpha 1
62
63 tsp_instruction_word flip_uv 18-17 none 0
64 tsp_instruction_word flip_uv 18-17 v 1
65 tsp_instruction_word flip_uv 18-17 u 2
66 tsp_instruction_word flip_uv 18-17 uv 3
67
68 tsp_instruction_word clamp_uv 16-15 none 0
69 tsp_instruction_word clamp_uv 16-15 v 1
70 tsp_instruction_word clamp_uv 16-15 u 2
71 tsp_instruction_word clamp_uv 16-15 uv 3
72
73 tsp_instruction_word filter_mode 14-13 point_sampled 0b00
74 tsp_instruction_word filter_mode 14-13 bilinear_filter 0b01
75 tsp_instruction_word filter_mode 14-13 trilinear_pass_a 0b10
76 tsp_instruction_word filter_mode 14-13 trilinear_pass_b 0b11
77
78 tsp_instruction_word 12 super_sample_texture 1
79
80 tsp_instruction_word 11-8 mip_map_d_adjust 0b1111
81
82 tsp_instruction_word texture_shading_instruction 7-6 decal 0
83 tsp_instruction_word texture_shading_instruction 7-6 modulate 1
84 tsp_instruction_word texture_shading_instruction 7-6 decal_alpha 2
85 tsp_instruction_word texture_shading_instruction 7-6 modulate_alpha 3
86
87 tsp_instruction_word texture_u_size 5-3 8 0
88 tsp_instruction_word texture_u_size 5-3 16 1
89 tsp_instruction_word texture_u_size 5-3 32 2
90 tsp_instruction_word texture_u_size 5-3 64 3
91 tsp_instruction_word texture_u_size 5-3 128 4
92 tsp_instruction_word texture_u_size 5-3 256 5
93 tsp_instruction_word texture_u_size 5-3 512 6
94 tsp_instruction_word texture_u_size 5-3 1024 7
95
96 tsp_instruction_word texture_v_size 2-0 8 0
97 tsp_instruction_word texture_v_size 2-0 16 1
98 tsp_instruction_word texture_v_size 2-0 32 2
99 tsp_instruction_word texture_v_size 2-0 64 3
100 tsp_instruction_word texture_v_size 2-0 128 4
101 tsp_instruction_word texture_v_size 2-0 256 5
102 tsp_instruction_word texture_v_size 2-0 512 6
103 tsp_instruction_word texture_v_size 2-0 1024 7
104
105 texture_control_word 31 mip_mapped 1
106
107 texture_control_word 30 vq_compressed 1
108
109 tsp_instruction_word pixel_format 29-27 1555 0
110 tsp_instruction_word pixel_format 29-27 565 1
111 tsp_instruction_word pixel_format 29-27 4444 2
112 tsp_instruction_word pixel_format 29-27 yuv422 3
113 tsp_instruction_word pixel_format 29-27 bump_map 4
114 tsp_instruction_word pixel_format 29-27 4bpp_palette 5
115 tsp_instruction_word pixel_format 29-27 8bpp_palette 6
116
117 tsp_instruction_word scan_order 26 twiddled 0
118 tsp_instruction_word scan_order 26 non_twiddled 1
119
120 tsp_instruction_word 26-21 palette_selector4 0x3f
121
122 tsp_instruction_word 26-25 palette_selector8 0x3
123
124 tsp_instruction_word 25 stride_select
125
126 tsp_instruction_word 20-0 texture_address 0x1fffff

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regs/isp_tsp.ods Normal file
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30
regs/ta_bits.csv
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@ -17,25 +17,25 @@
"TA_ALLOC_CTRL","opb_mode",20,"increasing_addresses",0,, "TA_ALLOC_CTRL","opb_mode",20,"increasing_addresses",0,,
"TA_ALLOC_CTRL","opb_mode",20,"decreasing_addresses",1,, "TA_ALLOC_CTRL","opb_mode",20,"decreasing_addresses",1,,
"TA_ALLOC_CTRL","pt_opb","17-16","no_list",0,, "TA_ALLOC_CTRL","pt_opb","17-16","no_list",0,,
"TA_ALLOC_CTRL","pt_opb","17-16","_8x4byte",1,, "TA_ALLOC_CTRL","pt_opb","17-16","8x4byte",1,,
"TA_ALLOC_CTRL","pt_opb","17-16","_16x4byte",2,, "TA_ALLOC_CTRL","pt_opb","17-16","16x4byte",2,,
"TA_ALLOC_CTRL","pt_opb","17-16","_32x4byte",3,, "TA_ALLOC_CTRL","pt_opb","17-16","32x4byte",3,,
"TA_ALLOC_CTRL","tm_opb","13-12","no_list",0,, "TA_ALLOC_CTRL","tm_opb","13-12","no_list",0,,
"TA_ALLOC_CTRL","tm_opb","13-12","_8x4byte",1,, "TA_ALLOC_CTRL","tm_opb","13-12","8x4byte",1,,
"TA_ALLOC_CTRL","tm_opb","13-12","_16x4byte",2,, "TA_ALLOC_CTRL","tm_opb","13-12","16x4byte",2,,
"TA_ALLOC_CTRL","tm_opb","13-12","_32x4byte",3,, "TA_ALLOC_CTRL","tm_opb","13-12","32x4byte",3,,
"TA_ALLOC_CTRL","t_opb","9-8","no_list",0,, "TA_ALLOC_CTRL","t_opb","9-8","no_list",0,,
"TA_ALLOC_CTRL","t_opb","9-8","_8x4byte",1,, "TA_ALLOC_CTRL","t_opb","9-8","8x4byte",1,,
"TA_ALLOC_CTRL","t_opb","9-8","_16x4byte",2,, "TA_ALLOC_CTRL","t_opb","9-8","16x4byte",2,,
"TA_ALLOC_CTRL","t_opb","9-8","_32x4byte",3,, "TA_ALLOC_CTRL","t_opb","9-8","32x4byte",3,,
"TA_ALLOC_CTRL","om_opb","5-4","no_list",0,, "TA_ALLOC_CTRL","om_opb","5-4","no_list",0,,
"TA_ALLOC_CTRL","om_opb","5-4","_8x4byte",1,, "TA_ALLOC_CTRL","om_opb","5-4","8x4byte",1,,
"TA_ALLOC_CTRL","om_opb","5-4","_16x4byte",2,, "TA_ALLOC_CTRL","om_opb","5-4","16x4byte",2,,
"TA_ALLOC_CTRL","om_opb","5-4","_32x4byte",3,, "TA_ALLOC_CTRL","om_opb","5-4","32x4byte",3,,
"TA_ALLOC_CTRL","o_opb","1-0","no_list",0,, "TA_ALLOC_CTRL","o_opb","1-0","no_list",0,,
"TA_ALLOC_CTRL","o_opb","1-0","_8x4byte",1,, "TA_ALLOC_CTRL","o_opb","1-0","8x4byte",1,,
"TA_ALLOC_CTRL","o_opb","1-0","_16x4byte",2,, "TA_ALLOC_CTRL","o_opb","1-0","16x4byte",2,,
"TA_ALLOC_CTRL","o_opb","1-0","_32x4byte",3,, "TA_ALLOC_CTRL","o_opb","1-0","32x4byte",3,,
,,,,,, ,,,,,,
"TA_LIST_INIT",,31,"list_init",1,, "TA_LIST_INIT",,31,"list_init",1,,
,,,,,, ,,,,,,

1 register_name enum_name bits bit_name value mask description
17 TA_ALLOC_CTRL opb_mode 20 increasing_addresses 0
18 TA_ALLOC_CTRL opb_mode 20 decreasing_addresses 1
19 TA_ALLOC_CTRL pt_opb 17-16 no_list 0
20 TA_ALLOC_CTRL pt_opb 17-16 _8x4byte 8x4byte 1
21 TA_ALLOC_CTRL pt_opb 17-16 _16x4byte 16x4byte 2
22 TA_ALLOC_CTRL pt_opb 17-16 _32x4byte 32x4byte 3
23 TA_ALLOC_CTRL tm_opb 13-12 no_list 0
24 TA_ALLOC_CTRL tm_opb 13-12 _8x4byte 8x4byte 1
25 TA_ALLOC_CTRL tm_opb 13-12 _16x4byte 16x4byte 2
26 TA_ALLOC_CTRL tm_opb 13-12 _32x4byte 32x4byte 3
27 TA_ALLOC_CTRL t_opb 9-8 no_list 0
28 TA_ALLOC_CTRL t_opb 9-8 _8x4byte 8x4byte 1
29 TA_ALLOC_CTRL t_opb 9-8 _16x4byte 16x4byte 2
30 TA_ALLOC_CTRL t_opb 9-8 _32x4byte 32x4byte 3
31 TA_ALLOC_CTRL om_opb 5-4 no_list 0
32 TA_ALLOC_CTRL om_opb 5-4 _8x4byte 8x4byte 1
33 TA_ALLOC_CTRL om_opb 5-4 _16x4byte 16x4byte 2
34 TA_ALLOC_CTRL om_opb 5-4 _32x4byte 32x4byte 3
35 TA_ALLOC_CTRL o_opb 1-0 no_list 0
36 TA_ALLOC_CTRL o_opb 1-0 _8x4byte 8x4byte 1
37 TA_ALLOC_CTRL o_opb 1-0 _16x4byte 16x4byte 2
38 TA_ALLOC_CTRL o_opb 1-0 _32x4byte 32x4byte 3
39
40 TA_LIST_INIT 31 list_init 1
41

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regs/ta_bits.ods
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