add core_bits.csv

This commit is contained in:
Zack Buhman 2023-12-02 15:20:04 +08:00
parent bc0b94b437
commit 0d8bda28fe

265
regs/core_bits.csv Normal file
View File

@ -0,0 +1,265 @@
"register_name","enum_name","bits","bit_name","value","mask","description"
"ID",,"31-16","device_id",,,
"ID",,"15-0","vendor_id",,,
,,,,,,
"REVISION",,"15-0","chip_revision",,,
,,,,,,
"SOFTRESET",,2,"sdram_if_soft_reset",1,,
"SOFTRESET",,1,"pipeline_soft_reset",1,,
"SOFTRESET",,0,"ta_soft_reset",1,,
,,,,,,
"STARTRENDER",,0,"start_render",1,,
,,,,,,
"TEST_SELECT",,"9-5","diagdb_data",,,
"TEST_SELECT",,"4-0","diagda_data",,,
,,,,,,
"PARAM_BASE",,"23-0","base_address",,"0xf00000",
,,,,,,
"REGION_BASE",,"23-0","base_address",,"0xfffffc",
,,,,,,
"SPAN_SORT_CFG",,16,"cache_bypass",1,,
"SPAN_SORT_CFG",,8,"offset_sort_enable",1,,
"SPAN_SORT_CFG",,0,"span_sort_enable",1,,
,,,,,,
"VO_BORDER_COL",,24,"chroma",,"0b1",
"VO_BORDER_COL",,"23-16","red",,"0xff",
"VO_BORDER_COL",,"15-8","green",,"0xff",
"VO_BORDER_COL",,"7-0","blue",,"0xff",
,,,,,,
"FB_R_CTRL","vclk_div",23,"pclk_vclk_2",0,,
"FB_R_CTRL","vclk_div",23,"pclk_vclk_1",1,,
"FB_R_CTRL",,22,"fb_strip_buf_en",1,,
"FB_R_CTRL",,"21-16","fb_stripsize",,"0b111_110","In units of 16 lines, in multiples of 32 lines. 0x02 is 32 lines, 0x04 is 64 lines, 0x03 is an illegal value"
"FB_R_CTRL",,"15-8","fb_chroma_threshold",,"0xff",
"FB_R_CTRL",,"6-4","fb_concat",,"0b11",
"FB_R_CTRL","fb_depth","3-2","0555_RGB_16BIT",0,,
"FB_R_CTRL","fb_depth","3-2","0565_RGB_16BIT",1,,
"FB_R_CTRL","fb_depth","3-2","888_RGB_24BIT_PACKED",2,,
"FB_R_CTRL","fb_depth","3-2","0888_RGB_32BIT",3,,
"FB_R_CTRL",,1,"fb_line_double",1,,
"FB_R_CTRL",,0,"fb_enable",1,,
,,,,,,
"FB_W_CTRL",,"23-16","fb_alpha_threshold",,"0xff",
"FB_W_CTRL",,"15-8","fb_kval",,"0xff",
"FB_W_CTRL",,3,"fb_dither",1,,
"FB_W_CTRL","fb_packmode","2-0","0555_krgb_16bit",0,,
"FB_W_CTRL","fb_packmode","2-0","565_rgb_16bit",1,,
"FB_W_CTRL","fb_packmode","2-0","4444_argb_16bit",2,,
"FB_W_CTRL","fb_packmode","2-0","1555_argb_16bit",3,,
"FB_W_CTRL","fb_packmode","2-0","888_rgb_24bit_packed",4,,
"FB_W_CTRL","fb_packmode","2-0","0888_krgb_32bit",5,,
"FB_W_CTRL","fb_packmode","2-0","8888_argb_32bit",6,,
,,,,,,
"FB_W_LINESTRIDE",,"8-0","fb_line_stride",,"0xff","In 8-byte units"
,,,,,,
"FB_R_SOF1",,"23-0","frame_buffer_read_address_frame_1",,"0xfffffc",
,,,,,,
"FB_R_SOF2",,"23-0","frame_buffer_read_address_frame_2",,"0xfffffc",
,,,,,,
"FB_R_SIZE",,"29-20","fb_modulus",,"0x3ff","In 4-byte units"
"FB_R_SIZE",,"19-10","fb_y_size",,"0x3ff",
"FB_R_SIZE",,"9-0","fb_x_size",,"0x3ff",
,,,,,,
"FB_W_SOF1",,"24-0","frame_buffer_write_address_frame_1",,"0x1fffffc",
,,,,,,
"FB_W_SOF2",,"24-0","frame_buffer_write_address_frame_2",,"0x1fffffc",
,,,,,,
"FB_X_CLIP",,"26-16","fb_x_clip_max",,"0x7ff",
"FB_X_CLIP",,"10-0","fb_x_clip_min",,"0x7ff",
,,,,,,
"FB_Y_CLIP",,"25-16","fb_y_clip_max",,"0x3ff",
"FB_Y_CLIP",,"9-0","fb_y_clip_min",,"0x3ff",
,,,,,,
"FPU_SHAD_SCALE","simple_shadow_enable",8,"parameter_selection_volume_mode",0,,
"FPU_SHAD_SCALE","simple_shadow_enable",8,"intensity_volume_mode",1,,
"FPU_SHAD_SCALE",,"7-0","scale_factor_for_shadows",,"0xff",
,,,,,,
"FPU_CULL_VAL",,"30-0","culling_comparison_value",,"float_0_8_23",
,,,,,,
"FPU_PARAM_CFG","region_header_type",21,"type_1",0,,
"FPU_PARAM_CFG","region_header_type",21,"type_2",1,,
"FPU_PARAM_CFG",,"19-14","tsp_parameter_burst_threshold",,"0x3f",
"FPU_PARAM_CFG",,"13-8","isp_parameter_burst_threshold",,"0x3f",
"FPU_PARAM_CFG",,"7-4","pointer_burst_size",,"0xf",
"FPU_PARAM_CFG",,"3-0","pointer_first_burst_size",,"0xf",
,,,,,,
"HALF_OFFSET","tsp_texel_sampling_position",2,"top_left",,,
"HALF_OFFSET","tsp_texel_sampling_position",2,"center",,,
"HALF_OFFSET","tsp_pixel_sampling_position",1,"top_left",,,
"HALF_OFFSET","tsp_pixel_sampling_position",1,"center",,,
"HALF_OFFSET","fpu_pixel_sampling_position",0,"top_left",,,
"HALF_OFFSET","fpu_pixel_sampling_position",0,"center",,,
,,,,,,
"FPU_PERP_VAL",,"30-0","perpendicular_triangle_compare",,"float_0_8_23",
,,,,,,
"ISP_BACKGND_D",,"31-4","background_plane_depth",,"float_1_8_19",
,,,,,,
"ISP_BACKGND_T",,28,"cache_bypass",1,,
"ISP_BACKGND_T",,27,"shadow",1,,
"ISP_BACKGND_T",,"26-24","skip",,"0b111",
"ISP_BACKGND_T",,"23-3","tag_address",,"0x1fffff","In 32-bit units"
"ISP_BACKGND_T",,"2-0","tag_offset",,"0b111",
,,,,,,
"ISP_FEED_CFG",,"23-14","cache_size_for_translucency",,"0x3ff","Must be between 0x020 and 0x200"
"ISP_FEED_CFG",,"13-4","punch_through_chunk_size",,"0x3ff","Must be between 0x020 and 0x200, must be larger than cache_size_for_translucency"
"ISP_FEED_CFG",,3,"discard_mode",1,,
"ISP_FEED_CFG",,0,"pre_sort_mode",1,,
,,,,,,
"SDRAM_REFRESH",,"7-0","refresh_counter_value",,"0xff",
,,,,,,
"SDRAM_ARB_CFG","override_value","21-18","priority_only","0x0",,
"SDRAM_ARB_CFG","override_value","21-18","rendered_data","0x1",,
"SDRAM_ARB_CFG","override_value","21-18","texture_vq_index","0x2",,
"SDRAM_ARB_CFG","override_value","21-18","texture_normal_data_and_vq_codebook","0x3",,
"SDRAM_ARB_CFG","override_value","21-18","tile_accelerator_isp_tsp_data","0x4",,
"SDRAM_ARB_CFG","override_value","21-18","tile_accelerator_pointers","0x5",,
"SDRAM_ARB_CFG","override_value","21-18","sh4","0x6",,
"SDRAM_ARB_CFG","override_value","21-18","tsp_parameters","0x7",,
"SDRAM_ARB_CFG","override_value","21-18","tsp_region_data","0x8",,
"SDRAM_ARB_CFG","override_value","21-18","isp_pointer_data","0x9",,
"SDRAM_ARB_CFG","override_value","21-18","isp_parameters","0xa",,
"SDRAM_ARB_CFG","override_value","21-18","crt_controller","0xb",,
"SDRAM_ARB_CFG","arbiter_priority_control","17-16","priority_arbitration_only","0x0",,
"SDRAM_ARB_CFG","arbiter_priority_control","17-16","override_value_field","0x1",,
"SDRAM_ARB_CFG","arbiter_priority_control","17-16","round_robin_counter","0x2",,
"SDRAM_ARB_CFG",,"15-8","arbiter_crt_page_break_latency_count_value",,"0xff",
"SDRAM_ARB_CFG",,"7-0","arbiter_page_break_latency_count_value",,"0xff",
,,,,,,
"SDRAM_CFG",,"28-26","read_command_to_returned_data_delay",,"0b111",
"SDRAM_CFG",,"25-23","cas_latency_value",,"0b111",
"SDRAM_CFG",,"22-21","activate_to_activate_period",,"0b11",
"SDRAM_CFG",,"20-18","read_to_write_period",,"0b111",
"SDRAM_CFG",,"17-14","refresh_to_activate_period",,"0b1111",
"SDRAM_CFG",,"11-10","pre_charge_to_activate_period",,"0b11",
"SDRAM_CFG",,"9-6","activate_to_pre_charge_period",,"0b1111",
"SDRAM_CFG",,"5-4","activate_to_read_write_command_period",,"0b11",
"SDRAM_CFG",,"3-2","write_to_pre_charge_period",,"0b11",
"SDRAM_CFG",,"1-0","read_to_pre_charge_period",,"0b11",
,,,,,,
"FOG_COL_RAM",,"23-16","red",,"0xff",
"FOG_COL_RAM",,"15-8","green",,"0xff",
"FOG_COL_RAM",,"7-0","blue",,"0xff",
,,,,,,
"FOG_COL_VERT",,"23-16","red",,"0xff",
"FOG_COL_VERT",,"15-8","green",,"0xff",
"FOG_COL_VERT",,"7-0","blue",,"0xff",
,,,,,,
"FOG_DENSITY",,"15-8","fog_scale_mantissa",,"0xff",
"FOG_DENSITY",,"7-0","fog_scale_exponent",,"0xff",
,,,,,,
"FOG_CLAMP_MAX",,"31-24","alpha",,"0xff",
"FOG_CLAMP_MAX",,"23-16","red",,"0xff",
"FOG_CLAMP_MAX",,"15-8","green",,"0xff",
"FOG_CLAMP_MAX",,"7-0","blue",,"0xff",
,,,,,,
"FOG_CLAMP_MIN",,"31-24","alpha",,"0xff",
"FOG_CLAMP_MIN",,"23-16","red",,"0xff",
"FOG_CLAMP_MIN",,"15-8","green",,"0xff",
"FOG_CLAMP_MIN",,"7-0","blue",,"0xff",
,,,,,,
"SPG_TRIGGER_POS",,"25-16","trigger_v_count",,,
"SPG_TRIGGER_POS",,"9-0","trigger_h_count",,,
,,,,,,
"SPG_HBLANK_INT",,"25-16","hblank_in_interrupt",,,
"SPG_HBLANK_INT","hblank_int_mode","13-12","output_equal_line_comp_val","0x0",,
"SPG_HBLANK_INT","hblank_int_mode","13-12","output_every_line_comp_val","0x1",,
"SPG_HBLANK_INT","hblank_int_mode","13-12","output_every_line","0x2",,
"SPG_HBLANK_INT",,"9-0","line_comp_val",,"0x3ff",
,,,,,,
"SPG_VBLANK_INT",,"25-16","vblank_out_interrupt_line_number",,"0x3ff",
"SPG_VBLANK_INT",,"9-0","vblank_in_interrupt_line_number",,"0x3ff",
,,,,,,
"SPG_CONTROL","csync_on_h",9,"hsync",0,,
"SPG_CONTROL","cysnc_on_h",9,"csync",1,,
"SPG_CONTROL","sync_direction",8,"input",0,,
"SPG_CONTROL","sync_direction",8,"output",1,,
"SPG_CONTROL",,7,"pal",1,,
"SPG_CONTROL",,6,"ntsc",1,,
"SPG_CONTROL",,5,"force_field2",1,,
"SPG_CONTROL",,4,"interlace",1,,
"SPG_CONTROL",,3,"spg_lock",1,,
"SPG_CONTROL","mcsync_pol",2,"active_low",0,,
"SPG_CONTROL","mcsync_pol",2,"active_high",1,,
"SPG_CONTROL","mvsync_pol",1,"active_low",0,,
"SPG_CONTROL","mvsync_pol",1,"active_high",1,,
"SPG_CONTROL","mhsync_pol",0,"active_low",0,,
"SPG_CONTROL","mhsync_pol",0,"active_high",1,,
,,,,,,
"SPG_HBLANK",,"25-16","hbend",,"0x3ff",
"SPG_HBLANK",,"9-0","hbstart",,"0x3ff",
,,,,,,
"SPG_LOAD",,"25-16","vcount",,"0x3ff",
"SPG_LOAD",,"9-0","hcount",,"0x3ff",
,,,,,,
"SPG_VBLANK",,"25-16","vbend",,"0x3ff",
"SPG_VBLANK",,"9-0","vbstart",,"0x3ff",
,,,,,,
"SPG_WIDTH",,"31-22","eqwidth",,"0x3ff",
"SPG_WIDTH",,"21-12","bpwidth",,"0x3ff",
"SPG_WIDTH",,"11-8","vswidth",,"0b1111",
"SPG_WIDTH",,"6-0","hswidth",,"0x7f",
,,,,,,
"TEXT_CONTROL","code_book_endian",17,"little_endian",0,,
"TEXT_CONTROL","code_book_endian",17,"big_endian",1,,
"TEXT_CONTROL","index_endian",16,"little_endian",0,,
"TEXT_CONTROL","index_endian",16,"big_endian",1,,
"TEXT_CONTROL",,"12-8","bank_bit",,"0x1f",
"TEXT_CONTROL",,"4-0","stride",,"0x1f",
,,,,,,
"VO_CONTROL",,21,"pclk_delay_reset",1,,
"VO_CONTROL",,"20-16","pclk_delay",,"0b1111",
"VO_CONTROL",,8,"pixel_double",1,,
"VO_CONTROL","field_mode","7-4","use_field_flag_from_spg","0x0",,
"VO_CONTROL","field_mode","7-4","use_inverse_of_field_flag_from_spg","0x1",,
"VO_CONTROL","field_mode","7-4","field_1_fixed","0x2",,
"VO_CONTROL","field_mode","7-4","field_2_fixed","0x3",,
"VO_CONTROL","field_mode","7-4","field_1_when_the_active_edges_of_hsync_and_vsync_match","0x4",,
"VO_CONTROL","field_mode","7-4","field_2_when_the_active_edges_of_hsync_and_vsync_match","0x5",,
"VO_CONTROL","field_mode","7-4","field_1_when_hsync_becomes_active_in_the_middle_of_the_vsync_active_edge","0x6",,
"VO_CONTROL","field_mode","7-4","field_2_when_hsync_becomes_active_in_the_middle_of_the_vsync_active_edge","0x7",,
"VO_CONTROL","field_mode","7-4","inverted_at_the_active_edge_of_vsync","0x8",,
"VO_CONTROL","blank_video",3,"display_the_screen",0,,
"VO_CONTROL","blank_video",3,"do_not_display_the_screen",1,,
"VO_CONTROL","blank_pol",2,"active_low",0,,
"VO_CONTROL","blank_pol",2,"active_high",1,,
"VO_CONTROL","vsync_pol",1,"active_low",0,,
"VO_CONTROL","vsync_pol",1,"active_high",1,,
"VO_CONTROL","hsync_pol",0,"active_low",0,,
"VO_CONTROL","hsync_pol",0,"active_high",1,,
,,,,,,
"VO_STARTX",,"9-0","horizontal_start_position",,"0x3ff",
,,,,,,
"VO_STARTY",,"25-16","vertical_start_position_on_field_2",,"0x3ff",
"VO_STARTY",,"9-0","vertical_start_position_on_field_1",,"0x3ff",
,,,,,,
"SCALER_CTL","field_select",18,"field_1",0,,
"SCALER_CTL","field_select",18,"field_2",1,,
"SCALER_CTL",,17,"interlace",1,,
"SCALER_CTL",,16,"horizontal_scaling_enable",1,,
"SCALER_CTL",,"15-0","vertical_scale_factor",,"0xffff",
,,,,,,
"PAL_RAM_CTL","pixel_format","1-0","argb1555",0,,
"PAL_RAM_CTL","pixel_format","1-0","rgb565",1,,
"PAL_RAM_CTL","pixel_format","1-0","argb4444",2,,
"PAL_RAM_CTL","pixel_format","1-0","argb8888",3,,
,,,,,,
"SPG_STATUS",,13,"vsync",,,
"SPG_STATUS",,12,"hsync",,,
"SPG_STATUS",,11,"blank",,,
"SPG_STATUS",,10,"fieldnum",,,
"SPG_STATUS",,"9-0","scanline",,,
,,,,,,
"FB_BURSTCTRL",,"19-16","wr_burst",,"0b1111",
"FB_BURSTCTRL",,"14-8","vid_lat",,"0x7f",
"FB_BURSTCTRL",,"5-0","vid_burst",,"0x3f",
,,,,,,
"FB_C_SOF",,"23-2","frame_buffer_current_read_address",,,
,,,,,,
"Y_COEFF",,"15-8","coefficient_1",,"0xff",
"Y_COEFF",,"7-0","coefficient_0_2",,"0xff",
,,,,,,
"PT_ALPHA_REF",,"7-0","alpha_reference_for_punch_through",,"0xff",
,,,,,,
"FOG_TABLE",,"15-0","fog_table_data",,"0xffff",
,,,,,,
"PALETTE_RAM",,"31-0","palette_data",,"0xffff_ffff",
1 register_name enum_name bits bit_name value mask description
2 ID 31-16 device_id
3 ID 15-0 vendor_id
4
5 REVISION 15-0 chip_revision
6
7 SOFTRESET 2 sdram_if_soft_reset 1
8 SOFTRESET 1 pipeline_soft_reset 1
9 SOFTRESET 0 ta_soft_reset 1
10
11 STARTRENDER 0 start_render 1
12
13 TEST_SELECT 9-5 diagdb_data
14 TEST_SELECT 4-0 diagda_data
15
16 PARAM_BASE 23-0 base_address 0xf00000
17
18 REGION_BASE 23-0 base_address 0xfffffc
19
20 SPAN_SORT_CFG 16 cache_bypass 1
21 SPAN_SORT_CFG 8 offset_sort_enable 1
22 SPAN_SORT_CFG 0 span_sort_enable 1
23
24 VO_BORDER_COL 24 chroma 0b1
25 VO_BORDER_COL 23-16 red 0xff
26 VO_BORDER_COL 15-8 green 0xff
27 VO_BORDER_COL 7-0 blue 0xff
28
29 FB_R_CTRL vclk_div 23 pclk_vclk_2 0
30 FB_R_CTRL vclk_div 23 pclk_vclk_1 1
31 FB_R_CTRL 22 fb_strip_buf_en 1
32 FB_R_CTRL 21-16 fb_stripsize 0b111_110 In units of 16 lines, in multiples of 32 lines. 0x02 is 32 lines, 0x04 is 64 lines, 0x03 is an illegal value
33 FB_R_CTRL 15-8 fb_chroma_threshold 0xff
34 FB_R_CTRL 6-4 fb_concat 0b11
35 FB_R_CTRL fb_depth 3-2 0555_RGB_16BIT 0
36 FB_R_CTRL fb_depth 3-2 0565_RGB_16BIT 1
37 FB_R_CTRL fb_depth 3-2 888_RGB_24BIT_PACKED 2
38 FB_R_CTRL fb_depth 3-2 0888_RGB_32BIT 3
39 FB_R_CTRL 1 fb_line_double 1
40 FB_R_CTRL 0 fb_enable 1
41
42 FB_W_CTRL 23-16 fb_alpha_threshold 0xff
43 FB_W_CTRL 15-8 fb_kval 0xff
44 FB_W_CTRL 3 fb_dither 1
45 FB_W_CTRL fb_packmode 2-0 0555_krgb_16bit 0
46 FB_W_CTRL fb_packmode 2-0 565_rgb_16bit 1
47 FB_W_CTRL fb_packmode 2-0 4444_argb_16bit 2
48 FB_W_CTRL fb_packmode 2-0 1555_argb_16bit 3
49 FB_W_CTRL fb_packmode 2-0 888_rgb_24bit_packed 4
50 FB_W_CTRL fb_packmode 2-0 0888_krgb_32bit 5
51 FB_W_CTRL fb_packmode 2-0 8888_argb_32bit 6
52
53 FB_W_LINESTRIDE 8-0 fb_line_stride 0xff In 8-byte units
54
55 FB_R_SOF1 23-0 frame_buffer_read_address_frame_1 0xfffffc
56
57 FB_R_SOF2 23-0 frame_buffer_read_address_frame_2 0xfffffc
58
59 FB_R_SIZE 29-20 fb_modulus 0x3ff In 4-byte units
60 FB_R_SIZE 19-10 fb_y_size 0x3ff
61 FB_R_SIZE 9-0 fb_x_size 0x3ff
62
63 FB_W_SOF1 24-0 frame_buffer_write_address_frame_1 0x1fffffc
64
65 FB_W_SOF2 24-0 frame_buffer_write_address_frame_2 0x1fffffc
66
67 FB_X_CLIP 26-16 fb_x_clip_max 0x7ff
68 FB_X_CLIP 10-0 fb_x_clip_min 0x7ff
69
70 FB_Y_CLIP 25-16 fb_y_clip_max 0x3ff
71 FB_Y_CLIP 9-0 fb_y_clip_min 0x3ff
72
73 FPU_SHAD_SCALE simple_shadow_enable 8 parameter_selection_volume_mode 0
74 FPU_SHAD_SCALE simple_shadow_enable 8 intensity_volume_mode 1
75 FPU_SHAD_SCALE 7-0 scale_factor_for_shadows 0xff
76
77 FPU_CULL_VAL 30-0 culling_comparison_value float_0_8_23
78
79 FPU_PARAM_CFG region_header_type 21 type_1 0
80 FPU_PARAM_CFG region_header_type 21 type_2 1
81 FPU_PARAM_CFG 19-14 tsp_parameter_burst_threshold 0x3f
82 FPU_PARAM_CFG 13-8 isp_parameter_burst_threshold 0x3f
83 FPU_PARAM_CFG 7-4 pointer_burst_size 0xf
84 FPU_PARAM_CFG 3-0 pointer_first_burst_size 0xf
85
86 HALF_OFFSET tsp_texel_sampling_position 2 top_left
87 HALF_OFFSET tsp_texel_sampling_position 2 center
88 HALF_OFFSET tsp_pixel_sampling_position 1 top_left
89 HALF_OFFSET tsp_pixel_sampling_position 1 center
90 HALF_OFFSET fpu_pixel_sampling_position 0 top_left
91 HALF_OFFSET fpu_pixel_sampling_position 0 center
92
93 FPU_PERP_VAL 30-0 perpendicular_triangle_compare float_0_8_23
94
95 ISP_BACKGND_D 31-4 background_plane_depth float_1_8_19
96
97 ISP_BACKGND_T 28 cache_bypass 1
98 ISP_BACKGND_T 27 shadow 1
99 ISP_BACKGND_T 26-24 skip 0b111
100 ISP_BACKGND_T 23-3 tag_address 0x1fffff In 32-bit units
101 ISP_BACKGND_T 2-0 tag_offset 0b111
102
103 ISP_FEED_CFG 23-14 cache_size_for_translucency 0x3ff Must be between 0x020 and 0x200
104 ISP_FEED_CFG 13-4 punch_through_chunk_size 0x3ff Must be between 0x020 and 0x200, must be larger than cache_size_for_translucency
105 ISP_FEED_CFG 3 discard_mode 1
106 ISP_FEED_CFG 0 pre_sort_mode 1
107
108 SDRAM_REFRESH 7-0 refresh_counter_value 0xff
109
110 SDRAM_ARB_CFG override_value 21-18 priority_only 0x0
111 SDRAM_ARB_CFG override_value 21-18 rendered_data 0x1
112 SDRAM_ARB_CFG override_value 21-18 texture_vq_index 0x2
113 SDRAM_ARB_CFG override_value 21-18 texture_normal_data_and_vq_codebook 0x3
114 SDRAM_ARB_CFG override_value 21-18 tile_accelerator_isp_tsp_data 0x4
115 SDRAM_ARB_CFG override_value 21-18 tile_accelerator_pointers 0x5
116 SDRAM_ARB_CFG override_value 21-18 sh4 0x6
117 SDRAM_ARB_CFG override_value 21-18 tsp_parameters 0x7
118 SDRAM_ARB_CFG override_value 21-18 tsp_region_data 0x8
119 SDRAM_ARB_CFG override_value 21-18 isp_pointer_data 0x9
120 SDRAM_ARB_CFG override_value 21-18 isp_parameters 0xa
121 SDRAM_ARB_CFG override_value 21-18 crt_controller 0xb
122 SDRAM_ARB_CFG arbiter_priority_control 17-16 priority_arbitration_only 0x0
123 SDRAM_ARB_CFG arbiter_priority_control 17-16 override_value_field 0x1
124 SDRAM_ARB_CFG arbiter_priority_control 17-16 round_robin_counter 0x2
125 SDRAM_ARB_CFG 15-8 arbiter_crt_page_break_latency_count_value 0xff
126 SDRAM_ARB_CFG 7-0 arbiter_page_break_latency_count_value 0xff
127
128 SDRAM_CFG 28-26 read_command_to_returned_data_delay 0b111
129 SDRAM_CFG 25-23 cas_latency_value 0b111
130 SDRAM_CFG 22-21 activate_to_activate_period 0b11
131 SDRAM_CFG 20-18 read_to_write_period 0b111
132 SDRAM_CFG 17-14 refresh_to_activate_period 0b1111
133 SDRAM_CFG 11-10 pre_charge_to_activate_period 0b11
134 SDRAM_CFG 9-6 activate_to_pre_charge_period 0b1111
135 SDRAM_CFG 5-4 activate_to_read_write_command_period 0b11
136 SDRAM_CFG 3-2 write_to_pre_charge_period 0b11
137 SDRAM_CFG 1-0 read_to_pre_charge_period 0b11
138
139 FOG_COL_RAM 23-16 red 0xff
140 FOG_COL_RAM 15-8 green 0xff
141 FOG_COL_RAM 7-0 blue 0xff
142
143 FOG_COL_VERT 23-16 red 0xff
144 FOG_COL_VERT 15-8 green 0xff
145 FOG_COL_VERT 7-0 blue 0xff
146
147 FOG_DENSITY 15-8 fog_scale_mantissa 0xff
148 FOG_DENSITY 7-0 fog_scale_exponent 0xff
149
150 FOG_CLAMP_MAX 31-24 alpha 0xff
151 FOG_CLAMP_MAX 23-16 red 0xff
152 FOG_CLAMP_MAX 15-8 green 0xff
153 FOG_CLAMP_MAX 7-0 blue 0xff
154
155 FOG_CLAMP_MIN 31-24 alpha 0xff
156 FOG_CLAMP_MIN 23-16 red 0xff
157 FOG_CLAMP_MIN 15-8 green 0xff
158 FOG_CLAMP_MIN 7-0 blue 0xff
159
160 SPG_TRIGGER_POS 25-16 trigger_v_count
161 SPG_TRIGGER_POS 9-0 trigger_h_count
162
163 SPG_HBLANK_INT 25-16 hblank_in_interrupt
164 SPG_HBLANK_INT hblank_int_mode 13-12 output_equal_line_comp_val 0x0
165 SPG_HBLANK_INT hblank_int_mode 13-12 output_every_line_comp_val 0x1
166 SPG_HBLANK_INT hblank_int_mode 13-12 output_every_line 0x2
167 SPG_HBLANK_INT 9-0 line_comp_val 0x3ff
168
169 SPG_VBLANK_INT 25-16 vblank_out_interrupt_line_number 0x3ff
170 SPG_VBLANK_INT 9-0 vblank_in_interrupt_line_number 0x3ff
171
172 SPG_CONTROL csync_on_h 9 hsync 0
173 SPG_CONTROL cysnc_on_h 9 csync 1
174 SPG_CONTROL sync_direction 8 input 0
175 SPG_CONTROL sync_direction 8 output 1
176 SPG_CONTROL 7 pal 1
177 SPG_CONTROL 6 ntsc 1
178 SPG_CONTROL 5 force_field2 1
179 SPG_CONTROL 4 interlace 1
180 SPG_CONTROL 3 spg_lock 1
181 SPG_CONTROL mcsync_pol 2 active_low 0
182 SPG_CONTROL mcsync_pol 2 active_high 1
183 SPG_CONTROL mvsync_pol 1 active_low 0
184 SPG_CONTROL mvsync_pol 1 active_high 1
185 SPG_CONTROL mhsync_pol 0 active_low 0
186 SPG_CONTROL mhsync_pol 0 active_high 1
187
188 SPG_HBLANK 25-16 hbend 0x3ff
189 SPG_HBLANK 9-0 hbstart 0x3ff
190
191 SPG_LOAD 25-16 vcount 0x3ff
192 SPG_LOAD 9-0 hcount 0x3ff
193
194 SPG_VBLANK 25-16 vbend 0x3ff
195 SPG_VBLANK 9-0 vbstart 0x3ff
196
197 SPG_WIDTH 31-22 eqwidth 0x3ff
198 SPG_WIDTH 21-12 bpwidth 0x3ff
199 SPG_WIDTH 11-8 vswidth 0b1111
200 SPG_WIDTH 6-0 hswidth 0x7f
201
202 TEXT_CONTROL code_book_endian 17 little_endian 0
203 TEXT_CONTROL code_book_endian 17 big_endian 1
204 TEXT_CONTROL index_endian 16 little_endian 0
205 TEXT_CONTROL index_endian 16 big_endian 1
206 TEXT_CONTROL 12-8 bank_bit 0x1f
207 TEXT_CONTROL 4-0 stride 0x1f
208
209 VO_CONTROL 21 pclk_delay_reset 1
210 VO_CONTROL 20-16 pclk_delay 0b1111
211 VO_CONTROL 8 pixel_double 1
212 VO_CONTROL field_mode 7-4 use_field_flag_from_spg 0x0
213 VO_CONTROL field_mode 7-4 use_inverse_of_field_flag_from_spg 0x1
214 VO_CONTROL field_mode 7-4 field_1_fixed 0x2
215 VO_CONTROL field_mode 7-4 field_2_fixed 0x3
216 VO_CONTROL field_mode 7-4 field_1_when_the_active_edges_of_hsync_and_vsync_match 0x4
217 VO_CONTROL field_mode 7-4 field_2_when_the_active_edges_of_hsync_and_vsync_match 0x5
218 VO_CONTROL field_mode 7-4 field_1_when_hsync_becomes_active_in_the_middle_of_the_vsync_active_edge 0x6
219 VO_CONTROL field_mode 7-4 field_2_when_hsync_becomes_active_in_the_middle_of_the_vsync_active_edge 0x7
220 VO_CONTROL field_mode 7-4 inverted_at_the_active_edge_of_vsync 0x8
221 VO_CONTROL blank_video 3 display_the_screen 0
222 VO_CONTROL blank_video 3 do_not_display_the_screen 1
223 VO_CONTROL blank_pol 2 active_low 0
224 VO_CONTROL blank_pol 2 active_high 1
225 VO_CONTROL vsync_pol 1 active_low 0
226 VO_CONTROL vsync_pol 1 active_high 1
227 VO_CONTROL hsync_pol 0 active_low 0
228 VO_CONTROL hsync_pol 0 active_high 1
229
230 VO_STARTX 9-0 horizontal_start_position 0x3ff
231
232 VO_STARTY 25-16 vertical_start_position_on_field_2 0x3ff
233 VO_STARTY 9-0 vertical_start_position_on_field_1 0x3ff
234
235 SCALER_CTL field_select 18 field_1 0
236 SCALER_CTL field_select 18 field_2 1
237 SCALER_CTL 17 interlace 1
238 SCALER_CTL 16 horizontal_scaling_enable 1
239 SCALER_CTL 15-0 vertical_scale_factor 0xffff
240
241 PAL_RAM_CTL pixel_format 1-0 argb1555 0
242 PAL_RAM_CTL pixel_format 1-0 rgb565 1
243 PAL_RAM_CTL pixel_format 1-0 argb4444 2
244 PAL_RAM_CTL pixel_format 1-0 argb8888 3
245
246 SPG_STATUS 13 vsync
247 SPG_STATUS 12 hsync
248 SPG_STATUS 11 blank
249 SPG_STATUS 10 fieldnum
250 SPG_STATUS 9-0 scanline
251
252 FB_BURSTCTRL 19-16 wr_burst 0b1111
253 FB_BURSTCTRL 14-8 vid_lat 0x7f
254 FB_BURSTCTRL 5-0 vid_burst 0x3f
255
256 FB_C_SOF 23-2 frame_buffer_current_read_address
257
258 Y_COEFF 15-8 coefficient_1 0xff
259 Y_COEFF 7-0 coefficient_0_2 0xff
260
261 PT_ALPHA_REF 7-0 alpha_reference_for_punch_through 0xff
262
263 FOG_TABLE 15-0 fog_table_data 0xffff
264
265 PALETTE_RAM 31-0 palette_data 0xffff_ffff